1
UT54ACTS157E
Quadruple 2 to 1 Multiplexers
July 2013
www.aeroflex.com/Logic
FEATURES
m CRH CMOS process
- Latchup immune
• High speed
• Low power consumption
• Wide power supply operating range of 3.0V to 5.5V
• Available QML Q or V processes
• 16-lead flatpack
• UT54ACTS157E-SMD-5962-96553
DESCRIPTION
The UT54ACTS157E is a monolithic data selector/multiplexer.
A 4-bit word is selected from one of two sources and is routed
to the four outputs. A separate strob e input , G, is provided.
The device is characterized over full HiRel temperature range
of -55C to +125C.
FUNCTION TABLE
PINOUTS
16-Lead Flatpack
Top View
LOGIC SYMBOL
INPUTS OUTPUT
STROBE
GSELECT
A/B DATA
A B Y
H X X X L
L L L X L
L L H X H
L H X L L
L H X H H
1
2
3
4
5
7
6
16
15
14
13
12
10
11
VDD
A/B
1A
1B
1Y
2A
2B
2Y
G
4A
4B
4Y
3A
3B
VSS 3Y
89
(15)
G(1)
A/B G1
EN
MUX
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
(2)
1A 1
(3)
1B 1
(5)
2A (6)
2B (11)
3A (10)
3B (14)
4A (13)
4B
(4) 1Y
(7) 2Y
(9) 3Y
(12) 4Y
2
LOGIC DIAGRAM
(12)
(9)
(4)
(7)
1A
1B
2A
2B
3A
3B
4A
4B
STROBE G
SELECT A/B
(2)
(3)
(5)
(6)
(11)
(10)
(14)
(13)
(15)
(1)
1Y
2Y
3Y
4Y
3
OPERATIONAL ENVIRONMENT1
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS1
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only , functional operation of the device at these
or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
2. Per MIL-STD-883, metho d 1012.1, Section 3.4. 1, PD = (Tj(max) - Tc(max) ) / jc
RECOMMENDED OPERATING CONDITIONS
PARAMETER LIMIT UNITS
Total Dose 1.0E6 rads(Si)
SEU Threshold 2108 MeV-cm2/mg
SEL Threshold 120 MeV-cm2/mg
Neutron Fluence 1.0E14 n/cm2
SYMBOL PARAMETER LIMIT UNITS
VDD Supply voltage -0.3 to 7.0 V
VI/O Voltage any pin -0.3 to VDD +0.3 V
TSTG Storage Temperature range -65 to +150 C
TJMaximum junction temperature +175 C
TLS Lead temperature (soldering 5 seconds) +300 C
JC Thermal resistance junction to case 15 C/W
IIDC input current 10 mA
PD2Maximum package power dissipation
permitted @ Tc = +125oC
3.3 W
SYMBOL PARAMETER LIMIT UNITS
VDD Supply voltage 3.0 to 5.5 V
VIN Input voltage any pin 0 to VDD V
TCTemperature range -55 to + 125 C
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DC ELECTRICAL CHARACTERISTICS FOR THE UT54ACTS157E7
( VDD = 3.0V to 5.5V; V SS = 0V6; -55C < TC < +125C)
SYMBOL DESCRIPTION CONDITION MIN MAX UNIT
VIL1 Low-level input voltage 1VDD from 4.5V to 5.5V 0.8 V
VIL2 Low-level input voltage 1VDD from 3.0V to 3.6V 0.8 V
VIH1 High-level input voltage 1VDD from 4.5V to 5.5V 0.5 VDD V
VIH2 High-level input voltage 1VDD from 3.0V to 3.6V 2.0 V
IIN Input leakage current VIN = VDD or VSS -1 1A
VOL1 Low-level output voltage 3IOL = 8mA
VDD = 4.5V to 5.5V
0.4 V
VOL2 Low-level output voltage 3IOL = 6mA
VDD = 3.0V to 3.6V
0.4 V
VOH1 High-level output voltage 3IOH = -8mA
VDD from 4.5V to 5.5V
0.7 VDD V
VOH2 High-level output voltage 3IOH = -6mA
VDD from 3.0V to 3.6V
2.4 V
IOS1 Short-circuit output current 2 ,4 VO = VDD and VSS
VDD from 3.0V to 3.6V
-200 200 mA
IOS2 Short-circuit output current 2 ,4 VO = VDD and VSS
VDD from 3.0V to 3.6V
-100 100 mA
IOL1 Low level output current 9VIN = VDD or VSS
VOL = 0.4V
VDD from 4.5V to 5.5V
8mA
IOL2 Low level output curren 9VIN = VDD or VSS
VOL = 0.4V
VDD from 3.0V to 3.6V
6mA
IOH1 High level output current 9VIN = VDD or VSS
VOH = VDD-0.4V
VDD from 4.5V to 5.5V
-8 mA
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Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%, - 50%,
as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but are guaranteed
to VIH(min) and VIL(max).
2. Supplied as a design limit but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed 3,765
pF/MHz.
4. Not more than one output may be shorted at a time for maximum duration of one second.
5. Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS at a
frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for the maximum radiation dose available for the respective device types.
8. Power dissipation specified per switching output.
9. Guaranteed by characterization, but not tested.
IOH29High level output current VIN = VDD or VSS
VOH = VDD-0.4V
VDD from 3.0V to 3.6V
-6 mA
Ptotal1 Power dissipation 2, 8 CL = 50pF
VDD = 4.5V to 5.5V
1.3 mW/
MHZ
Ptotal2 Power dissipation 2, 8 CL = 50pF
VDD = 3.0V to 3.6V
0.75 mW/
MHZ
IDDQ Quiescent Supply Current VIN = VDD or VSS
VDD from 3.0V to 5.5V
10 A
IDDQ Quiescent Supply Current
Delta
For input under test
VIN = VDD -2.1V
For all other inputs
VIN = VDD or VSS
VDD = 5.5V
1.6 mA
CIN Input capacitance 5 = 1MHz, VDD = 0V 15 pF
COUT Output capacitance 5 = 1MHz, VDD = 0V 15 pF
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AC ELECTRICAL CHARACTERISTICS FOR UT54ACTS157E2
(VDD = 5.0V 10%; VSS = 0V 1, -55C < TC < +125C)
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for the maximum radiation dose available for the respective device types.
SYMBOL PARAMETER CONDITION VDD MINIMUM MAXIMUM UNIT
tPHL1 mA or mB to mY CL=50pF 3.0V to 3.6V 3 20 ns
4.5V to 5.5V 211
tPLH1 mA or mB to mY CL=50pF 3.0V to 3.6V 3 18 ns
4.5V to 5.5V 2 10
tPHL2 G to mY CL=50pF 3.0V to 3.6V 3 18 ns
4.5V to 5.5V 2 10
tPLH2 G to mY CL=50pF 3.0V to 3.6V 3 18 ns
4.5V to 5.5V 2 10
tPHL3 A/B to mY CL=50pF 3.0V to 3.6V 3 19 ns
4.5V to 5.5V 211
tPLH3 A/B to mY CL=50pF 3.0V to 3.6V 3 17 ns
4.5V to 5.5V 2 10
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Packaging
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Ordering Information: UT54ACTS157E: SMD
Drawing Number:
96553 = UT54ACTS157E
Device Type:
02 = 1 rad(Si)/sec
Package Type:
X = 16-lead ceramic bottom-brazed dual-in-line Flatpack
Lead Finish: (Notes 1 & 2)
A = Solder
C = Gold
X = Optional
5962 ***** ** * * **
Total Dose: (Note 3 and 4)
R = 1E5 rads(Si)
F = 3E5 rads(Si)
G = 5E5 rads(Si)
H = 1E6 rads(Si)
03 = 50 to 300 rads(Si)/sec
Class Designator:
Q = QML Class Q
V = QML Class V
Notes:
1. Lead fini sh (A,C, or X) must be specified.
2. If an “X” is specified when ordering, part marking will match the lead finish and will be either “A” (solder) or “C” (gold).
3. Total dose radiation must be specified when ordering. QML Q and QML V not available without radiation hard ening. For pr ototype i nquiries, contact
factory.
4. Device type 02 is only offered with a TID tolerance guarantee of 3E5 rads(Si) or 1E6 rads(Si) and is tested in accordance with MIL-STD-883 Test
Method 1019 Condition A and section 3.11.2. Device type 03 is only offered with a TID tolerance guarantee of 1E5 rads(Si), 3E5 rads(Si), and 5E5
rads(Si), and is tested in accordance with MIL-STD-883 Test Method 1019 Condition A.
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Aeroflex Colorado Springs - Datasheet Definition
Advanced Datasheet - Product In Development
Preliminary Datasheet - Shipping Prototype
Datasheet - Shipping QML & Reduced HiRel