DEMO MANUAL DC1996A LTC2323/LTC2321 Dual 16-Bit/14-Bit/12-Bit, 5Msps/2Msps, Serial, High Speed SAR ADCs DESCRIPTION Demonstration circuit 1996A features the LTC(R)2323 family. With up to 5Msps, these differential, dual channel, 16-bit, serial, high speed successive approximation register (SAR) ADCs are available in a 28-lead QFN package. The LTC2323 family has an internal 20ppm/C reference and an SPI-compatible serial interface that supports CMOS and LVDS logic. Note the demo board is configured for CMOS operation by default; see the note under JP3 for LVDS operation. The following text refers to the LTC2323, but applies to all members of the family, the only difference being the sample rate and the number of bits. The DC1996A demonstrates the DC and AC performance of the LTC2323 in conjunction with the DC890 PScopeTM data collection board. Alternatively, by connecting the DC1996A into a customer application, the performance of the LTC2323 can be evaluated directly in that circuit. Design files for this circuit board are available at http://www.linear.com/demo L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and PScope is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. BOARD PHOTO DC POWER SUPPLY -9.5VDC GND 9.5VDC BPF HP8642B DC890 TO PC USB PORT dc1996a F02 BPF HP8642B Figure 1. DC1996A Connection Diagram dc1996afb 1 DEMO MANUAL DC1996A ASSEMBLY OPTIONS Table 1. DC1996A Assembly Options VERSION U1 PART NUMBER MAX CONVERSION RATE # OF BITS MAX CLOCK FREQUENCY DC1996A-A LTC2323CUFD-16#PBF 5Msps 16 110MHz DC1996A-B LTC2321CUFD-16#PBF 2Msps 16 64MHz DC1996A-C LTC2323CUFD-14#PBF 5Msps 14 110MHz DC1996A-D LTC2321CUFD-14#PBF 2Msps 14 62MHz DC1996A-E LTC2323CUFD-12 #PBF 5Msps 12 95MHz DC1996A-F LTC2321CUFD-12#PBF 2Msps 12 58MHz QUICK START PROCEDURE Demonstration circuit 1996A is easy to set up and evaluate for performance. Refer to Figure 1 and follow the procedure below. n n n n n Connect the DC1996A to a DC890 USB high speed data collection board using edge connector P1. The PScope software should recognize the DC1996A and configure itself automatically. n Click the Collect button (Figure 2) to begin acquiring data. The Collect button then changes to Pause, which can be used to stop data acquisition. Connect the DC890 to a host PC with a standard USB A/B cable. Apply a low jitter signal source to J2 to test channel 2, or to J4 to test channel 1. Note that the DC1996A is capable of accepting a differential input signal as well as a single-ended signal. See the Hardware Setup section for the jumper positions that correspond to these configurations. As a clock source, apply a low jitter 10dBm sine wave or square wave to connector J1. See Table 1 for maximum clock frequencies. Note that J1 has a 50 termination resistor to ground. Run the PScope software (Pscope.exe version K73, or later) supplied with the DC890 or download it from www.linear.com/software. Complete software documentation is available from the Help menu. Updates can be downloaded from the Tools menu. Check for updates periodically, as new features may be added. Figure 2. DC1996A PScope Screenshot dc1996afb 2 DEMO MANUAL DC1996A HARDWARE SETUP SIGNAL CONNECTIONS J1 CLK IN: This input has a 50 termination resistor, and is intended to be driven by a low jitter 10dBm sine or square wave. To achieve the full AC performance of this part, the clock jitter should be kept under 2ps. This input is capacitively coupled so that the input clock can be either 0V to 3.3V or 1.65V. This eliminates the need for level shifting. To run at the maximum conversion rate, apply the frequency specified in the Table 1. J2 Ch2+ Input: In the single-ended configuration, this is the channel 2 signal input. For differential operation, this serves as the positive channel 2 signal input. J3 Ch2- Input: This input is used only for differential operation. It serves as the negative channel 2 signal input. J4 Ch1+ Input: In the single-ended configuration, this is the channel 1 signal input. For differential operation, this serves as the positive channel 1 signal input. J5 Ch1- Input: This input is used only for differential operation. It serves as the negative channel 1 signal input. J6 FPGA Program: Factory use only. J7 JTAG: Factory use only. JP1 +IN2 Coupling: Use this jumper to select AC- or DCcoupling of the signal applied to J2. The default setting is DC. At very low input frequencies, using AC-coupling may degrade the distortion performance. JP2 Mode: Use this jumper to select the signal input mode for the channel 2 input of the LTC2323. The default setting is Diff. The Diff setting accepts a single-ended signal from J2 and applies it as a differential signal to channel 2 of the LTC2323. The Bip setting accepts a single-ended signal from J2 and applies it as a single-ended bipolar signal to channel 2 of the LTC2323. The Uni setting also accepts a single-ended signal from J2, but applies it as a unipolar signal to channel 2 of the LTC2323. JP3 Data Out: Use this jumper to select the data output format from the LTC2323. The default setting is CMOS. The output data will not be valid if the jumper is moved to the LVDS position unless the following changes have been made: Install 100 S0402 resistors at R26, 75, 76, 99 Reprogram the CPLD through J6 using the programming file LTC2323.pof found at: http://www.linear.com/demo/DC1996A Move JP3 to the LVDS position. JP4 -IN2 Coupling: Use this jumper to select AC- or DCcoupling of the signal applied to J3. The default setting is DC. At very low input frequencies, using AC-coupling may degrade the distortion performance. JP5 +IN1 Coupling: Use this jumper to select AC- or DCcoupling of the signal applied to J4. The default setting is DC. At very low input frequencies, using AC-coupling may degrade the distortion performance. JP6 CM1: Use this jumper to set the DC bias point for the signal applied to J4 when JP5 (+IN1 coupling) is in the AC position. The default setting is ADC. The EXT setting allows the use of an externally applied common mode voltage applied at E1 (EXT_CM1). JP7 CM2: Use this jumper to set the DC bias point for the signal applied to J2 when JP1 (+IN2 coupling) is in the AC position. The default setting is ADC. The EXT setting allows the use of an externally applied common mode voltage applied at E2 (EXT_CM2). JP8 Mode: Use this jumper to select the signal input mode for the channel 1 input of the LTC2323. The default setting is Diff. The Diff setting accepts a single-ended signal from J4 and applies it as a differential signal to channel 1 of the LTC2323. The Bip setting accepts a single-ended signal from J4 and applies it as a single-ended bipolar signal to channel 1 of the LTC2323. The Uni setting also accepts a single-ended signal from J4, but applies it as a unipolar signal to channel 1 of the LTC2323. dc1996afb 3 DEMO MANUAL DC1996A HARDWARE SETUP JP9 -IN1 Coupling: Use this jumper to select AC- or DCcoupling of the signal applied to J5. The default setting is DC. At very low input frequencies, using AC-coupling may degrade the distortion performance. JP10 VCCIO: Use this jumper to select the VCCIO supply voltage. The default setting is 2.5V. The 1.8V setting selects a 1.8V supply voltage. JP11 VDD: Use this jumper to select the VDD supply voltage. The default setting is 5V. The 3.3V setting selects a 3.3V supply voltage. JP12 EEPROM: Factory use only. JP13 OSC: Use this jumper to enable the onboard encode clock source. The default setting is OFF. The ON setting energizes this source. Refer to the DC1996A schematic for additional passive elements required to use the onboard source. PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER Required Circuit Components 1 20 C1, C2, C4, C5, C9, C11, C13, C18, C19, C22, C23, C29, C37, C51, C52, C58, C59, C82, C129, C130 CAP., X7R, 0.1F, 16V, 10%, 0603 NIC, NMC0603X7R104K16TRPF 2 24 C3, C6, C16, C17, C20, C21, C24-C26, C28, C30, C34, C47-C50, C53, C54, C57, C61, C70, C76, C79, C81 CAP., X5R, 10F, 6.3V, 20%, 0603 NIC, NMC0603X5R106M6.3TRPF4KF 3 0 C7, C8, C10, C14, C27, C35, C36, C40, C41, C60 CAP., 0603 OPT 4 2 C12, C41 CAP., NPO, 200pF, 16V, 5%, 0603 MURAA, GRM1885C1H201JA01D 5 12 C15, C32, C38, C39, C43, C45, C65, C67, C68, C71, C74, C77 CAP., X7R, 1F, 25V, 10%, 0603 TDK, C1608X7R1E105K 6 6 C31, C33, C55, C56, C106, C119 CAP., X5R, 4.7F, 6.3V, 10%, 0603 AVX, 06036D475KAT2A 7 2 C42, C44 CAP., X5R, 2.2F, 10V, 10%, 0603 MURATA, GRM188R61A225KE34D 8 1 C62 CAP., X7R, 47F, 10V, 10%, 1210 MURATA, GRM32ER71A476KE15L 9 5 C63, C69, C72, C75, C78 CAP., X7R, 0.01F, 6.3V, 10%, 0603 MURATA, GRM188R70J103KA01D 10 3 C64, C66, C73 CAP., X7R, 10F, 10V, 10%, 0805 MURATA, GRM21BR71A106KE51L 11 1 C80 CAP., X5R, 3.3F, 6.3V, 10%, 0603 AVX, 06036D335KAT2A 12 28 C83-C104, C108, C122-C126 CAP., X7R, 0.1F, 16V, 10%, 0402 NIC, NMC0402X7R104K16TRPF 13 1 C105 CAP., X5R, 47F, 6.3V, 20%, 0805 TAIYO YUDEN, JMK212BJ476MG-T 14 3 C107, C120, C121 CAP., X7R, 0.01F, 16V, 10%, 0402 NIC, NMC0402X7R103K16TRPF 15 1 C109 CAP., X7R, 1nF, 16V, 10%, 0402 AVX, 0402YC102KAT2A 16 3 C110, C111, C112 CAP., X7R, 22nF, 16V, 10%, 0402 AVX, 0402YC223KAT2A 17 2 C113, C128 CAP., X7R, 4.7nF, 16V, 10%, 0402 AVX, 0402YC472KAT2A 18 4 C114, C115, C116, C117 CAP., NP0, 10pF, 16V, 10%, 0402 AVX, 0402YA100KAT2A 19 1 C118 CAP., TANT, 470F 10V, 20%, 7343 AVX, TPSE477M010R0050 20 1 C127 CAP., X7R, 2.2nF, 16V, 10%, 0402 AVX, 0402YC222KAT2A 21 4 D1, D2, D3, D4 DIODE, SCHOTTKY, 30V, 200mW SOD-323 DIODE INC., BAT54WS-7-F 22 9 E1-E3, E5, E8-E12 TEST POINT, TURRET, 0.064" MILL-MAX, 2308-2-00-80-00-00-07-0 23 3 E4, E6, E7 TEST POINT, TURRET, 0.094" MILL-MAX, 2501-2-00-80-00-00-07-0 dc1996afb 4 DEMO MANUAL DC1996A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 24 11 JP1, JP3-JP7, JP9-JP11, JP13, JP15 HEADER, 1x3, 0.100" SAMTEC, TSW-103-07-L-S 25 2 JP2, JP8 HEADER, 2x3, 0.100" SAMTEC, TSW-103-07-L-D 26 2 J6, J7 HEADER, 2x5, 0.100" SAMTEC, TSW-105-07-L-D 27 5 J1, J2, J3, J4, J5 CONN BNC FEM JACK PC MNT STRGHT AMPHENOL CONNEX, 112404 28 1 L1 IND, FERRITE CHIP, 390, 2000mA, 1206 MURATA, BLM31PG391SN1L 29 15 R1, R2, R10, R21, R27, R46-R48, R51, R52, R57, R58, R60, R64, R66 RES., CHIP, 1k, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF1001V 30 0 R3, R7, R11, R22, R23, R25, R28, R29, R32, R34, R36, R37, R49, R50, R54, R123 RES., CHIP, 0603 OPT 31 2 R4, R17 RES., CHIP, 33, 1/10W, 5%, 0603 PANASONIC, ERJ-3GEYJ330V 32 11 R5, R6, R12, R20, R24, R30, R31, R35, R39, R40, R53 RES., CHIP, 0, 1/10W, 0603 PANASONIC, ERJ-3GEY0R00V 33 4 R8, R18, R33, R44 RES., CHIP, 49.9, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF49R9V 34 1 R9 RES., CHIP, 49.9, 1/4W, 1%, 1206 PANASONIC, ERJ-8ENF49R9V, 35 4 R13, R16, R38, R43 RES., CHIP, 0, 1/16W, 0402 PANASONIC, ERJ-2GE0R00X 36 4 R14, R15, R41, R42 RES., CHIP, 301, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF3010V 37 2 R19, R45 RES., CHIP, 150, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF1500V 38 0 R26, R75, R76, R99 RES., CHIP, 0402 39 2 R55, R56 RES., CHIP, 3.92k, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF3921V 40 1 R59 RES., CHIP, 499, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF4990V 41 1 R61 RES., CHIP, 866, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF8660V 42 1 R62 RES., CHIP, 3.09k, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF3091V 43 1 R63 RES., CHIP, 4.02k, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF4021V 44 1 R65 RES., CHIP, 1.43k, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF1431V 45 33 R69-R72, R77-R98, R100-R104, R119, R120 RES., CHIP, 33, 1/16W, 5%, 0402 PANASONIC, ERJ-2GEJ330X 46 1 R118 RES., CHIP, 1k, 1/16W, 1%, 0402 PANASONIC, ERJ-2EKF1001V 47 4 R105, R106, R107, R108 RES., CHIP, 4.99k, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF4991V 48 9 R109-R117 RES., CHIP, 10k, 1/16W, 5%, 0402 PANASONIC, ERJ-2GEYJ103V 49 1 R121 RES., CHIP, 10k, 1/16W, 5%, 0603 PANASONIC, ERJ-3GEYJ103V 50 1 R122 RES., CHIP, 100, 1/10W, 1%, 0603 PANASONIC, ERJ-3EKF1000V 51 3 U2, U3, U7 IC, INVERTER, UHS, SINGLE, SC70-5 FAIRCHILD, NC7SZ04P5X 52 2 U4, U5 IC, 400MHz, AMPLIFIER, MS8 LINEAR TECHNOLOGY, LT1819CMS8#PBF 53 1 U6 IC, FLIP FLOP, D-TYPE LOG, US8 ON SEMI., NL17SZ74USG 54 2 U8, U9 IC, VOLTAGE REFERENCE, MSOP8 LINEAR TECHNOLOGY, LTC6655BHMS84.096#PBF 55 2 U10, U21 IC, OP-AMP, MS8 LINEAR TECHNOLOGY, LT6202CS5#PBF 56 4 U11, U13, U14, U15 IC, MICROPOWER REGULATOR, SO8 LINEAR TECHNOLOGY, LT1763CS8#PBF 57 1 U12 IC, MICROPOWER NEG. REGULATOR, SOT-23 LINEAR TECHNOLOGY, LT1964ES5-SD#PBF 58 1 U16 IC, MICROPOWER REGULATOR, SO8 LINEAR TECHNOLOGY, LT1763CS8-2.5#PBF 59 1 U17 IC, LINEAR REGULATOR, SO8 LINEAR TECHNOLOGY, LT3021ES8-1.2#PBF dc1996afb 5 DEMO MANUAL DC1996A PARTS LIST ITEM QTY REFERENCE PART DESCRIPTION MANUFACTURER/PART NUMBER 60 1 U18 IC, EQFP, CYCLONE3, WIRE BOND, EQFP144 ALTERA, EP3C5E144C7 61 1 U19 IC, 4-BIT, FLASH MEMORY, SO8 ALTERA, EPCS4SI8 62 1 U20 IC, EEPROM, 2kBIT, 400kHz, 8TSSOP MICROCHIP, 24LC024-I/ST 63 1 Y1 OSCILLATOR, 106.2500MHz, 3.3V, SMD CTS-FREQUENCY CONTROLS, CB3LV-3I106M2500 64 12 SHOWN ON ASSY DWG SHUNT, 0.100", 2POS SAMTEC, SNT-100-BK-G 65 4 MH1-MH4 STANDOFF, NYLON, 0.25" KEYSTONE, 8831 (SNAP-ON) DC1996A-A Required Circuit Components 1 1 DC1996A GENERAL BOM 2 2 R67, R73 RES., CHIP, 1k, 1/16W, 5%, 0402 PANASONIC, ERJ-2EKF1001V 3 1 U1 I.C., DUAL SAR ADC, QFN28UFD-4X5 LINEAR TECHNOLOGY, LTC2323CUFD-16#PBF DC1996A-B Required Circuit Components 1 1 2 2 R67, R73 DC1996A GENERAL BOM RES., CHIP, 1k, 1/16W, 5%, 0402 PANASONIC, ERJ-2EKF1001V 3 1 U1 I.C., DUAL SAR ADC, QFN28UFD-4X5 LINEAR TECHNOLOGY, LTC2321CUFD-16#PBF DC1996A-C Required Circuit Components 1 1 DC1996A GENERAL BOM 2 2 R68, R73 RES., CHIP, 1k, 1/16W, 5%, 0402 PANASONIC, ERJ-2EKF1001V 3 1 U1 I.C., DUAL SAR ADC, QFN28UFD-4X5 LINEAR TECHNOLOGY, LTC2323CUFD-14#PBF DC1996A-D Required Circuit Components 1 1 2 2 R68, R73 DC1996A GENERAL BOM RES., CHIP, 1k, 1/16W, 5%, 0402 PANASONIC, ERJ-2EKF1001V 3 1 U1 I.C., DUAL SAR ADC, QFN28UFD-4X5 LINEAR TECHNOLOGY, LTC2321CUFD-14#PBF DC1996A-E Required Circuit Components 1 1 DC1996A GENERAL BOM 2 2 R67, R74 RES., CHIP, 1k, 1/16W, 5%, 0402 PANASONIC, ERJ-2EKF1001V 3 1 U1 I.C., DUAL SAR ADC, QFN28UFD-4X5 LINEAR TECHNOLOGY, LTC2323CUFD-12#PBF DC1996A-F Required Circuit Components 1 1 2 2 R67, R74 DC1996A GENERAL BOM RES., CHIP, 1k, 1/16W, 5%, 0402 PANASONIC, ERJ-2EKF1001V 3 1 U1 I.C., DUAL SAR ADC, QFN28UFD-4X5 LINEAR TECHNOLOGY, LTC2321CUFD-12#PBF dc1996afb 6 A B C D J5 J4 J3 C7 OPT +IN2 COUPLING C27 OPT C35 OPT -IN1 COUPLING C60 OPT VCM_BIAS_1 R53 0 C34 10uF 6.3V C57 10uF 6.3V AC DC JP9 C28 10uF 6.3V 2 4 6 C61 10uF 6.3V R45 150 C36 OPT R22 OPT R14 301 R49 OPT R41 301 R34 OPT JP8 HD2X3-100 C53 10uF 6.3V C50 10uF 6.3V DIFF 1 UNI 3 BIP 5 C8 OPT R11 OPT R31 0 R19 150 MODE C30 10uF 6.3V R32 OPT R54 OPT R48 1k JP5 R27 1k 2 4 6 R6 0 JP2 HD2X3-100 C24 10uF 6.3V C21 10uF 6.3V DIFF 1 UNI 3 BIP 5 MODE C3 10uF 6.3V R7 OPT R25 OPT R21 1k JP4 C48 10uF 6.3V AC DC VCM_BIAS_1 VREF_1 +IN1 COUPLING R30 0 C26 10uF 6.3V AC DC VCM_BIAS_1 -IN2 COUPLING R24 0 VCM_BIAS_2 R1 1k JP1 C20 10uF 6.3V AC DC VCM_BIAS_2 VREF_2 C6 10uF 6.3V C54 10uF 3 2 6 5 C25 10uF 5 6 2 3 V+ - + V- - + V- 5 1. ALL RESISTORS ARE IN OHMS, 0603. ALL CAPACITORS ARE IN MICROFARADS, 0603 R50 OPT R28 OPT R23 OPT R3 OPT 4 ASSY A B C D E F R44 49.9 C41 200pF NP0 R33 49.9 R18 49.9 C12 200pF NP0 * U5A LT1819CMS8 1 R42 301 R35 0 C37 0.1uF 7 U5B LT1819CMS8 V+ C29 0.1uF U4B LT1819CMS8 7 R15 301 R12 0 C9 0.1uF 1 R8 49.9 R43 0 0402 R38 0 0402 R16 0 0402 R13 0 0402 U1 LTC2323CUFD-16 LTC2321CUFD-16 LTC2323CUFD-14 LTC2321CUFD-14 LTC2323CUFD-12 LTC2321CUFD-12 C46 OPT C40 OPT C14 OPT C10 OPT 3 7 6 AIN2- AIN1+ AIN1- BITS 16 16 14 14 12 12 2 AIN2+ LVDS CMOS J1 C15 1uF VCCIO U1 C16 10uF 6.3V * EXT - + OPT 1k OPT 1k OPT 1k 3 R68 C58 V0.1uF 1 OPT 1k R73 4 3 JP6 C55 4.7uF 1k OPT R74 R51 1k C47 10uF 6.3V R39 0 R36 OPT C33 4.7uF C31 4.7uF R46 1k EXT_CM1 E1 3 2 1 19 SDO2+ 20 SDO2- SCK+ SCKCNVL CLKOUT+ CLKOUT- 21 22 9 17 18 15 REFOUT2 REFOUT1 C18 0.1uF 2 SDO1+ 16 SDO1- C23 0.1uF C22 0.1uF C17 10uF 6.3V R10 1k R2 1k C19 0.1uF C38 1uF CM1 C51 V+ 0.1uF ADC U10 LT6202CS5 C32 1uF R67 VCM_BIAS_1 Msps 5 2 5 2 5 2 VDD R9 49.9 1206 C5 0.1uF VCCIO QFN28UFD-4X5 R29 OPT VREF_1 AIN1- AIN1+ AIN2- AIN2+ JP3 1 2 3 DATA OUT CLK 200MHz MAX 2.5VPP 3 4 C1 0.1uF C42 2.2uF R20 33 PR VCC U6 NL17SZ74 7 8 VCCIO R17 33 C11 0.1uF U2 NC7SZ04P5X SHDN GND 4 3 2 1 C43 1uF CUSTOMER NOTICE GND VOUT_S GND VOUT_F VIN GND 4 C2 0.1uF 2 4 VCCIO VCM_BIAS_2 VREF_2 R4 33 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CSB CLKIN EXT - + SCALE = NONE DOUG S. KIM T. APPROVALS C59 V0.1uF 1 U21 LT6202CS5 3 2 1 R52 1k R47 1k EXT_CM2 E2 R121 10k 1 2 3 1 4 C44 2.2uF 5 6 7 TECHNOLOGY C56 4.7uF C49 10uF 6.3V R40 0 R37 OPT 8 JP13 2 3 R122 100 R123 OPT SHDN GND 4 3 2 1 C45 1uF DATE 04-01-14 1 LTC232XCUFD FAMILY DEMO CIRCUIT 1996A 04/01/2014, 12:58 PM IC NO. SHEET 1 2 OF 3 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only GND VOUT_S GND VOUT_F VIN GND U8 LTC6655BHMS8-4.096 +9V/+10V ON OFF GND EOH OSC OUT Y1 CB3LV VCC C130 0.1uF DOUG S. APPROVED TRUE DIFFERENTIAL INPUT DUAL ADC DATE: B SIZE +3V ADD 20 MIL SQUARE PAD OPENING ON TOP SOLDER MASK LAYER ON THESE CONNETIONS. +3V C129 0.1uF PRODUCTION 2 1 DESCRIPTION REVISION HISTORY REV TITLE: SCHEMATIC 4 3 JP7 CM2 C39 1uF SDO2+ SDO2- C52 V+ 0.1uF ADC ECO CLKOUT+ CLKOUT- SCK+ SCK- SDO1+ SDO1- U7 NC7SZ04P5X 2 C13 0.1uF LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. 5 6 7 8 CLR GND 2 VCCIO U9 LTC6655BHMS8-4.096 +9V/+10V 6 4 U3 NC7SZ04P5X VCCIO 5 3 C4 0.1uF U4A LT1819CMS8 NOTES: UNLESS OTHERWISE SPECIFIED AIN10V - 4.096V AIN1+ 0V - 4.096V AIN20V - 4.096V AIN2+ 0V - 4.096V R5 0 8 4 J2 25 5 3 VCM_BIAS_2 1 4 LVDS 14 OVDD 1 CP Q 3 3 2 1 3 2 1 3 2 1 3 2 1 5 3 2 D Q 5 4 8 8 4 13 5 4 + - 8 VDD1 8 VDD2 REFBG 12 28 VBYP1 24 VBYP2 GND GND GND GND GND 4 5 10 23 29 REFOUT1 26 REFOUT2 REFRTN1 REFRTN2 11 27 2 5 2 + - 5 A B C D DEMO MANUAL DC1996A SCHEMATIC DIAGRAMS dc1996afb 7 A B C D 5 GND +9V/+10V E7 E4 C62 47uF 16V 1210 C80 3.3uF 16V C77 1uF 16V C74 1uF 16V C71 1uF 16V C68 1uF 16V C65 1uF 16V 5 8 5 8 5 8 5 8 5 8 5 8 SHDN IN U17 LT3021ES8-1.2 SHDN IN U16 LT1763CS8-2.5 SHDN IN U15 LT1763CS8 SHDN IN U14 LT1763CS8 SHDN IN U13 LT1763CS8 SHDN IN U11 LT1763CS8 AGND +9V/+10V GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 GND GND GND 3 6 7 GND 6 8 4 5 4 SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT BYP SEN OUT 4 3 2 4 2 1 4 2 1 4 2 1 4 2 1 4 2 1 C78 0.01uF C75 0.01uF C72 0.01uF C69 0.01uF C63 0.01uF R66 1k R65 1.43k R64 1k R62 3.09k R60 1k R59 499 R58 1k R56 3.92k 3 2 1 JP11 VDD R63 4.02k JP10 VCCINT 5V 3.3V 2.5V VCCIO 1.8V R61 866 3 2 1 C81 10uF 6.3V +1.2V C79 10uF 6.3V +2.5V C76 10uF 6.3V +3V C73 10uF 10V 0805 VDD C70 10uF 6.3V VCCIO C66 10uF 10V 0805 V+ E12 E11 E10 E9 E8 E5 +1.2V +2.5V +3V VDD VCCIO V+ 3 3 -9V/-10V E6 3 SHDN IN GND ADJ OUT U12 LT1964ES5-SD 2 THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE C67 1uF 16V 2 1 4 5 R57 1k R55 3.92k SCALE = NONE DOUG S. KIM T. APPROVALS LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. -9V/-10V 2 E3 V- TECHNOLOGY V- 1 SHEET 2 LTC232XCUFD-16/-14 FAMILY DEMO CIRCUIT 1996A 04/01/2014, 01:00 PM IC NO. 2 OF 3 REV. 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com Fax: (408)434-0507 LTC Confidential-For Customer Use Only TRUE DIFFERENTIAL INPUT DUAL ADC DATE: B SIZE TITLE: SCHEMATIC C64 10uF 10V 0805 1 A B C D DEMO MANUAL DC1996A SCHEMATIC DIAGRAMS dc1996afb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. A B C D 19 27 36 41 48 57 63 82 95 108 118 123 131 140 145 + DA0 DA1 DA2 73 74 75 76 77 79 80 83 84 85 88 89 GND GND GNDA1 GND GND GND GND GND GND GNDA2 GND GND GND GND GND 5 VCCINT 29 VCCINT 45 VCCINT 61 VCCINT 78 VCCINT 102 VCCINT 116 VCCINT 134 VCCINT 17 VCCIO1 26 VCCIO2 40 VCCIO3 47 VCCIO3 56 VCCIO4 62 VCCIO4 81 VCCIO5 93 VCCIO6 117 VCCIO7 122 VCCIO7 130 VCCIO8 139 VCCIO8 35 VCCA1 107 VCCA2 37 VCCD_PLL1 109 VCCD_PLL2 CYCLONE3-EP3C5E144 PWR U18A CYCLONE3-EP3C5E144 IO1 IO2 IO3 IO4_RUP3 IO4_RDN3 IO5 IO6_VREF5 IO7 IO8_DIFFIOR8N IO9_DIFFIOR8P CLK7_DIFFCLK3N CLK6_DIFFCLK3P BANK5 5 * R67 C118 C119 470uF 4.7uF 7343 0603 VCCD_PLL C105 47uF 0805 +2.5V C93 0.1uF VCCIO C83 0.1uF +1.2V * R68 * R74 * R73 C86 0.1uF CLK2 CLK3 IO1 IO2 IO3_VREF2 IO4_RUP1 IO5_RDN1 IO6 BANK2 C96 0.1uF BANK6 24 25 28 30 31 32 33 34 C97 0.1uF C87 0.1uF C124 0.1uF C125 0.1uF C111 22nF C99 0.1uF C89 0.1uF C126 0.1uF C112 22nF C100 0.1uF C102 C103 0.1uF 0.1uF DA5 DA3 DA4 C104 0.1uF C127 2.2nF C128 4.7nF +1.2V L1 BLM31PG391SN1L C113 4.7nF C101 0.1uF 33 33 33 BANK3 38 39 42 43 44 46 49 50 51 52 53 BANK7 110 111 112 113 114 115 119 120 121 124 125 126 127 CONFIG 6 IO1_DATA1 8 IO2_FLASH_NCE 9 N_STATUS 12 DCLK 13 IO3_DATA0 14 NCONFIG 15 TDI 16 TCK 18 TMS 20 TDO 21 NCE 86 IO4_DEV_OE 87 IO5_DEV_CLRN 92 CONF_DONE 94 MSEL0 96 MSEL1 97 MSEL2 98 IO6_INIT_DONE 99 IO7_CRC_ERROR 101 IO8_NCEO 103 IO9_CLKUSR CYCLONE3-EP3C5E144 U18J CYCLONE3-EP3C5E144 IO1 IO2 IO3 IO4 IO5_RUP4 IO6_RDN4 IO7_VREF7 IO8_DIFFIOT16N IO9_DIFFIOT16P IO10 IO11 IO12_DIFFIOT12N IO13_DIFFIOT12P U18H CYCLONE3-EP3C5E144 IO1_DIFFIOB1P IO2_DIFFIOB1N IO3 IO4 IO5 IO6_VREF3 IO7_DIFFIOB9P IO8_DIFFIOB9N IO9 IO10_DIFFIOB11P IO11_DIFFIOB11N 4 TDI TCK TMS TDO NCE 33 33 33 33 33 33 33 VCCIO R116 10k 1 3 5 7 9 3 TDI BANK4 IO1_DIFFIOB12P IO2_DIFFIOB12N IO3 IO4_DIFFIOB16P IO5_DIFFIOB16N IO6 IO7_VREF4 IO8_RUP2 IO9_RDN2 IO10 IO11 IO12_DIFFIOB21P IO13_DIFFIOB21N IO14 54 55 58 59 60 64 65 66 67 68 69 70 71 72 BANK8 128 129 132 133 135 136 137 138 141 142 143 144 R118 1k R114 10k +3V 8 C116 10pF D3 BAT54WS +3V +3V C117 10pF C91 0.1uF 0402 2 +3V C92 0.1uF 0402 SCALE = NONE DOUG S. KIM T. APPROVALS D4 BAT54WS +3V THIS CIRCUIT IS PROPRIETARY TO LINEAR TECHNOLOGY AND SUPPLIED FOR USE WITH LINEAR TECHNOLOGY PARTS. CUSTOMER NOTICE C115 10pF D2 BAT54WS EPCS4SI8 NCS VCC 7 DATA VCC 6 VCC DCLK 5 GND ASDI U19 J6 HD2X5-100 1 3 5 7 9 SDO1+ SDO1- CLKOUT+ FPGA PROGRAM DB6 DB7 DB8 DB9 DB10 DB11 33 33 33 33 33 33 2 4 6 8 10 DB1 DB2 DB3 DB4 DB5 33 33 33 33 33 R76 OPT R99 OPT CLKOUT- 2 LINEAR TECHNOLOGY HAS MADE A BEST EFFORT TO DESIGN A CIRCUIT THAT MEETS CUSTOMER-SUPPLIED SPECIFICATIONS; HOWEVER, IT REMAINS THE CUSTOMER'S RESPONSIBILITY TO PCB DES. VERIFY PROPER AND RELIABLE OPERATION IN THE ACTUAL APP ENG. APPLICATION. COMPONENT SUBSTITUTION AND PRINTED CIRCUIT BOARD LAYOUT MAY SIGNIFICANTLY AFFECT CIRCUIT PERFORMANCE OR RELIABILITY. CONTACT LINEAR TECHNOLOGY APPLICATIONS ENGINEERING FOR ASSISTANCE. C114 10pF 1 2 3 4 +3V +3V R92 R94 R96 R98 R101 R103 R79 R81 R88 R91 R82 D1 BAT54WS +3V CYCLONE3-EP3C5E144 IO1_DIFFIOT11N IO2_DIFFIOT11P IO3_DIFFIOT10N IO4_DIFFIOT10P IO5 IO6_VREF8 IO7 IO8 IO9 IO10 IO11_DIFFIOT01N IO12_DIFFIOT01P U18I CYCLONE3-EP3C5E144 R113 10k TCK TDO TMS R117 10k J7 HD2X5-100 JTAG 2 4 6 8 10 R115 10k R112 10k SDO2+ SDO2- R111 10k DA10 DA11 DA12 DA13 DA14 DA15 DB0 DA6 DA7 DA8 DA9 R110 10k R75 OPT 33 33 33 33 +2.5V R109 10k VCCIO R93 R95 R97 R100 R102 R120 R104 R78 R80 R87 R90 1. ALL RESISTORS AND CAPACITORS ON THIS PAGE ARE 0402. 2. SEE ASSEMBLY TABLE ON PAGE 1 FOR R67, R68, R73, AND R74 VALUES. NOTES: UNLESS OTHERWISE SPECIFIED C123 0.1uF C110 22nF C98 0.1uF C88 0.1uF R83 R86 R89 C90 0.1uF 90 91 100 104 105 106 CYCLONE3-EP3C5E144 CLK5_DIFFCLK2N CLK4_DIFFCLK2P IO1 IO2 IO3_VREF6 IO4 C107 C108 C109 0.01uF 0.1uF 1nF C95 0.1uF C85 0.1uF C120 C121 C122 0.01uF 0.01uF 0.1uF C106 4.7uF 0603 C94 0.1uF C84 0.1uF VCCIO VCCIO CSB CLKIN SCK- SCK+ DB12 DB13 DB14 CNVCLK DB15 U18G 33 33 33 R26 OPT 33 33 33 33 33 U18F R84 R85 R77 R69 R70 R71 R72 R119 CYCLONE3-EP3C5E144 1 2 3 4 7 10 11 22 23 CYCLONE3-EP3C5E144 IO1 IO2 IO3 IO4 IO5_VREF1 IO6_DIFFL4P IO7_DIFFL4N CLK0 CLK1 U18E 1 2 3 1 2 U18D 1 2 4 1 2 DA1 DA0 DA3 DA2 DA5 DA4 DA7 DA6 DA9 DA8 DA11 DA10 DA13 DA12 DA15 DA14 CNVCLK DB1 DB0 DB3 DB2 DB5 DB4 DB7 DB6 DB9 DB8 DB11 DB10 DB13 DB12 DB15 DB14 8 VCC GND 6 5 7 3 2 1 1 2 3 JP12 PROG WP EEPROM R108 4.99k 0603 VCCIO 1 SHEET 3 LTC232XCUFD-16/-14 FAMILY DEMO CIRCUIT 1996A 04/01/2014, 12:59 PM IC NO. 2 OF 3 REV. LTC Confidential-For Customer Use Only 1630 McCarthy Blvd. Milpitas, CA 95035 Phone: (408)432-1900 www.linear.com R107 4.99k 0603 TECHNOLOGY Fax: (408)434-0507 SCL SDA WP A2 A1 A0 R106 4.99k 0603 R105 4.99k 0603 TRUE DIFFERENTIAL INPUT DUAL ADC DATE: B SIZE C82 0.1uF 0603 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 1 EDGE-CON-100 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51 53 P1 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 U20 24LC024-I /ST TITLE: SCHEMATIC 4 U18C ARRAY BANK1 5 EEPROM U18B A B C D DEMO MANUAL DC1996A SCHEMATIC DIAGRAMS dc1996afb 9 DEMO MANUAL DC1996A DEMONSTRATION BOARD IMPORTANT NOTICE Linear Technology Corporation (LTC) provides the enclosed product(s) under the following AS IS conditions: This demonstration board (DEMO BOARD) kit being sold or provided by Linear Technology is intended for use for ENGINEERING DEVELOPMENT OR EVALUATION PURPOSES ONLY and is not provided by LTC for commercial use. As such, the DEMO BOARD herein may not be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including but not limited to product safety measures typically found in finished commercial goods. As a prototype, this product does not fall within the scope of the European Union directive on electromagnetic compatibility and therefore may or may not meet the technical requirements of the directive, or other regulations. If this evaluation kit does not meet the specifications recited in the DEMO BOARD manual the kit may be returned within 30 days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BY THE SELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE. EXCEPT TO THE EXTENT OF THIS INDEMNITY, NEITHER PARTY SHALL BE LIABLE TO THE OTHER FOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES. The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user releases LTC from all claims arising from the handling or use of the goods. Due to the open construction of the product, it is the user's responsibility to take any and all appropriate precautions with regard to electrostatic discharge. Also be aware that the products herein may not be regulatory compliant or agency certified (FCC, UL, CE, etc.). No License is granted under any patent right or other intellectual property whatsoever. LTC assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or any other intellectual property rights of any kind. LTC currently services a variety of customers for products around the world, and therefore this transaction is not exclusive. Please read the DEMO BOARD manual prior to handling the product. Persons handling this product must have electronics training and observe good laboratory practice standards. Common sense is encouraged. This notice contains important safety information about temperatures and voltages. For further safety concerns, please contact a LTC application engineer. Mailing Address: Linear Technology 1630 McCarthy Blvd. Milpitas, CA 95035 Copyright (c) 2004, Linear Technology Corporation dc1996afb 10 Linear Technology Corporation LT 0414 REV B * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com LINEAR TECHNOLOGY CORPORATION 2014