NTLMS4506N Advance Information Power MOSFET 30 A, 30 V N-Channel SO-8 Leadless The SO-8LL (Leadless) package uses the power QFN package technology. It's footprint matches that of the standard SO-8 single die device. This Leadless SO-8 package provides low parasitic inductance compared to the standard SO-8 package allowing for higher frequency operation. http://onsemi.com D Features * Planar HD3E Process for Fast Switching Performance * Body Diode for Low trr and Qrr, Optimized for Synchronous * * * * * Operation Low RDSon to Minimize Conduction Loss Low Ciss to Minimize Driver Loss Optimized Qdg X RSDon (FOM) for Shootthrough Protection Low Gate Charge Surface Mount G S MARKING DIAGRAM 3[D] 1[S] xxxxx WWY 2[G] Product Summary Symbol Value VDS 30 V RDSon @ 10 V 3.5 m Qg 33 nC ID 30 A Qgd 10 nC SO-8 Leadless CASE 751S xxxxx Y WW = Specific Device Code = Year = Work Week PIN ASSIGNMENT PIN FUNCTION 1 S - SOURCE 2 G - GATE 3 D - DRAIN ORDERING INFORMATION Device Package Shipping NTLMS4506N SO-8 Leadless 2500 Tape & Reel This document contains information on a new product. Specifications and information herein are subject to change without notice. Semiconductor Components Industries, LLC, 2002 October, 2002 - Rev. 1 1 Publication Order Number: NTLMS4506N/D NTLMS4506N MAXIMUM RATINGS (TJ = 25C Unless otherwise specified) Parameter Symbol Value Units VDSS 30 Vdc Continuous VGS 20 Vdc Continuous @ TA = 25C (Note 1) Continuous @ TA = 25C (Note 2) Single Pulse (tp = 10 s) (Note 4) ID IDM IDM 20 30 84 A A A PD PD 2.5 6.0 W W Drain-to-Source Voltage Gate-to-Source Voltage Drain Current Maximum Power Dissipation (Steady State) @ TA = 25C (Note 1) Single Pulse (tp = 10 Secs) TA = 25C (Note 2) TJ and Tstg -55 to 150 C Starting TJ = 25C EAS 220 mJ Junction-to-Ambient (Note 1) Junction-to-Ambient (Note 2) Junction-to-Ambient (Note 3) RJA RJA RJA 50 20 100 C/W TL 260 C Operating and Storage Temperature Single Pulse Drain-to Source Avalanche Energy Thermal Resistance Maximum Lead Temperature for Soldering Purposes, 1/8" from Case for 10 Secs 1. 2. 3. 4. When surface mounted to an FR4 board using 1" pad size, (Cu Area 1.127 in2). 1" pad (Cu Area 0.911 in2), t < 10sec. When surface mounted to an FR4 board using minimum recommended pad size, (Cu Area 0.412 in2). Chip current capability limited by package. http://onsemi.com 2 NTLMS4506N ELECTRICAL CHARACTERISTICS (TJ = 25C Unless otherwise specified) Characteristics Symbol Min Typ Max Unit 30 - 33 25 - - Vdc mV/C - - - - 1.0 10 - - 100 nAdc 1.0 - 1.5 -3.8 2.0 - Vdc mV/C - - 3.5 4.8 4.4 5.8 gFS - 90 - Mhos Ciss - 4900 5150 pF Output Capacitance Coss - 1275 1352 Transfer Capacitance Crss - 380 400 td(on) - 30 36 tr - 15 19 td(off) - 110 132 tf - 35 42 QT(g) - 33 36 OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (Note 5) (VGS = 0 Vdc, ID = 250 Adc) Temperature Coefficient (Positive) V(br)DSS Zero Gate Voltage Drain Current (VDS = 24 Vdc, VGS = 0 Vdc) (VDS = 24Vdc, VGS = 0 Vdc, TJ = 150 C) Gate-Body Leakage Current Adc IDSS (VGS = 20 Vdc, VDS = 0 Vdc) IGSS ON CHARACTERISTICS (Note 5) Gate Threshold Voltage (Note 5) (VDS = VGS, ID = 250 Adc) Threshold Temperature Coefficient (Negative) VGS(th) Static Drain-to-Source On-Resistance (Note 5) VGS = 10 Vdc, ID = 30 Adc VGS = 4.5 Vdc, ID = 15 Adc RDS(on) Forward Transconductance (Note 5) (VDS = 10 Vdc, ID = 10 Adc) m DYNAMIC CHARACTERISTICS Input Capacitance (VDS = 30 Vdc, VGS = 0 V, f = 1 MHz) SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time (Ven = 10 Vdc, VDD = 15 Vdc, ID = 30 Adc, RG = 2 2.5 5 ) Turn-Off Delay Time Fall Time Gate Charge (VGS = 4.5 Vdc, ID = 30 Adc, VDS = 10 Vdc) (Note 5) Q1(gs) - 18 - Q2(gd) - 10 - Qsw - TBD - Qoss - TBD - - - 0.70 07 0.7 1.2 - ns nC SOURCE-DRAIN DIODE CHARACTERISTICS Forward On On-Voltage Voltage Reverse Recovery Time (IS = 15 Adc, VGS = 0 Vdc) (Note 5) ((IS = 1.5 Adc, VGS = 0 Vdc, TJ = 150C)) VSD (IS = 15 Adc, VGS = 0 Vdc, VDD = 24 V dIS/dt = 100 A/s) (Note 5) trr - 37 54 ta - 20 - tb - 18 - QRR - 0.026 - Reverse Recovery Stored Charge 5. Pulse Test: Pulse Width = 300 s, Duty Cycle = 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 Vdc ns C NTLMS4506N PACKAGE DIMENSIONS SO-8 Leadless CASE 751S-02 ISSUE A PIN #1 I.D. J D NOTES: 1. DIMENSIONS AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. H DIM A A1 B D D1 D2 D3 E E1 F G J1 J2 J3 E 0.20 A K 0.08 C C A1 0.08 K K MILLIMETERS MIN MAX 1.750 1.950 0.254 REF 0.900 1.100 6.000 BSC 3.046 3.246 0.154 0.354 1.246 1.446 5.000 BSC 4.392 4.592 2.940 3.140 0.400 0.600 0.680 0.880 0.250 0.450 0.154 0.354 K D2 J2 J1 D2 CCCCC CC CCC CCCCC CCCCC CCCCC D3 G J3 E1 F J2 B D1 J3 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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