SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354C - FEBRUARY 1994 - REVISED NOVEMBER 1996 D D D D D D 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 SN54LVT244B . . . FK PACKAGE (TOP VIEW) 1A2 2Y3 1A3 2Y2 1A4 2OE D SN54LVT244B . . . J OR W PACKAGE SN74LVT244B . . . DB, DW, OR PW PACKAGE (TOP VIEW) 2Y4 1A1 1OE VCC D State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation High-Impedance State During Power Up and Power Down Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Support Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25C ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Power Off Disables Inputs/Outputs, Permitting Live Insertion Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Packages, and Ceramic (J) DIPs 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 D description These octal buffers and line drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. The 'LVT244B is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. When VCC is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down. However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN74LVT244B is available in TI's shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed circuit board area. The SN54LVT244B is characterized for operation over the full military temperature range of -55C to 125C. The SN74LVT244B is characterized for operation from -40C to 85C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1996, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354C - FEBRUARY 1994 - REVISED NOVEMBER 1996 FUNCTION TABLE (each buffer) INPUTS OE A OUTPUT Y L H H L L L H X Z logic symbol 1 1OE 1A1 1A2 1A3 1A4 logic diagram (positive logic) 1OE EN 2 18 4 16 6 14 8 12 1Y1 1A1 19 1Y3 1A2 2A2 2A3 2A4 4 16 6 14 8 12 EN 11 9 13 7 15 5 17 3 1Y1 1Y2 1Y3 1Y4 2Y1 2Y2 2Y3 2OE 19 2Y4 This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 2A1 2A2 2A3 2A4 2 18 1Y4 1A4 2A1 2 1Y2 1A3 2OE 1 POST OFFICE BOX 655303 11 9 13 7 15 5 17 3 * DALLAS, TEXAS 75265 2Y1 2Y2 2Y3 2Y4 SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354C - FEBRUARY 1994 - REVISED NOVEMBER 1996 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high state or power-off state, VO (see Note 1) . . . . -0.5 V to 7 V Current into any output in the low state, IO: SN54LVT244B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74LVT244B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Current into any output in the high state, IO (see Note 2): SN54LVT244B . . . . . . . . . . . . . . . . . . . . . . . . 48 mA SN74LVT244B . . . . . . . . . . . . . . . . . . . . . . . 64 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Maximum power dissipation at TA = 55C (in still air) (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . 0.6 W DW package . . . . . . . . . . . . . . . . . . 1.6 W PW package . . . . . . . . . . . . . . . . . . . 0.7 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current flows only when the output is in the high state and VO > VCC. 3. The maximum package power dissipation is calculated using a junction temperature of 150C and a board trace length of 750 mils. For more information, refer to the Package Thermal Considerations application note in the ABT Advanced BiCMOS Technology Data Book. recommended operating conditions (see Note 4) SN54LVT244B SN74LVT244B MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage 0.8 0.8 V Input voltage 5.5 5.5 V IOH IOL High-level output current -24 -32 mA Low-level output current 48 64 mA t/v Input transition rise or fall rate t /VCC Power-up ramp rate High-level input voltage 2 Outputs enabled 2 10 200 TA Operating free-air temperature NOTE 4: Unused control inputs must be held high or low to prevent them from floating. -55 V 10 -40 ns/V s / V 200 125 V 85 C PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354C - FEBRUARY 1994 - REVISED NOVEMBER 1996 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH VCC = 2.7 V, VCC = MIN to MAX, II = -18 mA IOH = -100 A VCC = 2.7 V, IOH = -8 mA IOH = -24 mA VCC = 3 V VCC = 2 2.7 7V VOL VCC = 3 V II Ioff IOZPU IOZPD IOZH IOZL SN54LVT244B TYP MAX TEST CONDITIONS 0.5 0.5 0.4 0.4 IOL = 32 mA IOL = 48 mA 0.5 0.5 VI = 0 VI or VO = 0 to 4.5 V VO = 0.5 V to 3 V, VO = 0.5 V to 3 V, VCC = 3.6 3 6 V, V VI = VCC or GND G 0.55 Control inputs Data inputs 10 1 1 1 1 -5 100 A 100 100 A OE = 0 100 100 A 5 5 A A Outputs low Outputs disabled VCC = 3 V to 3.6 V, One input at VCC - 0.6 V, Other inputs at VCC or GND Ci VI = 3 V or 0 VO = 3 V or 0 -5 -5 0.19 0.19 5 5 0.19 0.19 0.3 0.2 PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 mA A mA 4 4 pF 7 7 pF All typical values are at VCC = 3.3 V, TA = 25C. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. This parameter is specified by characterization but is not tested. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 4 A A OE = 0 ICC Co 10 -5 VO = 3 V VO = 0.5 V IO = 0, 0 V 0.55 Outputs high ICC V 2 IOL = 24 mA IOL = 16 mA VCC = 3.6 36V UNIT V 2 0.2 VI = VCC or GND VI = VCC VCC = 3.6 V, -1.2 VCC-0.2 2.4 0.2 VCC = 0 or MAX, VCC = 1.5 V to 0, VCC = 3.6 V, SN74LVT244B TYP MAX MIN -1.2 VCC-0.2 2.4 IOH = -32 mA IOL = 100 A IOL = 64 mA VI = 5.5 V VCC = 0, VCC = 0 to 1.5 V, MIN SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354C - FEBRUARY 1994 - REVISED NOVEMBER 1996 switching characteristics over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54LVT244B PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y VCC = 3.3 V 0.3 V MIN MAX SN74LVT244B VCC = 2.7 V MIN MAX VCC = 3.3 V 0.3 V MIN TYP MAX VCC = 2.7 V MIN UNIT MAX 1 3.6 3.9 1.1 2.3 3.5 3.8 1.2 3.4 3.6 1.3 2.1 3.3 3.6 1 4.6 5.5 1.1 2.5 4.5 5.3 1.3 4.5 5.1 1.4 2.7 4.4 4.9 1.8 4.5 4.7 1.9 2.8 4.4 4.5 1.7 4.5 4.6 1.8 2.9 4.4 4.4 ns ns ns All typical values are at VCC = 3.3 V, TA = 25C. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SN54LVT244B, SN74LVT244B 3.3-V ABT OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCAS354C - FEBRUARY 1994 - REVISED NOVEMBER 1996 PARAMETER MEASUREMENT INFORMATION 6V S1 500 From Output Under Test Open GND CL = 50 pF (see Note A) TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 6V GND 500 2.7 V LOAD CIRCUIT 1.5 V Timing Input 0V tw tsu 2.7 V Input 1.5 V 1.5 V th 2.7 V 1.5 V Data Input 1.5 V 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 2.7 V 1.5 V Input 1.5 V 0V VOH 1.5 V Output 1.5 V VOL tPLH tPHL VOH Output 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 1.5 V 0V tPZL tPHL tPLH 2.7 V Output Control tPLZ Output Waveform 1 S1 at 6 V (see Note B) Output Waveform 2 S1 at GND (see Note B) 1.5 V tPZH 3V VOL + 0.3 V VOL tPHZ 1.5 V VOH - 0.3 V VOH [0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current. TI warrants performance of its semiconductor products and related software to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage ("Critical Applications"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. Inclusion of TI products in such applications is understood to be fully at the risk of the customer. Use of TI products in such applications requires the written approval of an appropriate TI officer. Questions concerning potential risk applications should be directed to TI through a local SC sales office. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards should be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor does TI warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. Copyright 1996, Texas Instruments Incorporated