VSC8582XKS-14 - MICROSEMI - Datasheet.Live

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Linecard Control

Processor

Ethernet Port

Ethernet Line Card

MAC Packet

Processing Linecard Control

Processor

Ethernet Line Card

MAC

Packet

Processing

Linecard Control

Processor

Ethernet Line Card

Fabric

Adapter

System Card

System Control

Processor

Fabric

Ethernet Port

VSC8582

Highlights

• Part of the world's ﬁ rst and only NIST

FIPS197 128/256-bit MACsec-support

family of GbE PHYs

• 802.1AE-2006, 802.1AEbn-2011, and

802.1AEbw-2013 compliant

• Exclusive patented "Tag-in-the-Clear" and

"Flow-Based" technologies enable MACsec

to work in any IPv4 or IPv6-based network

capable of supporting VLANs and/or MPLS

• One-step and two-step VeriTime™

timestamping over encapsulated links

including MPLS and PBB

• MPLS and Ethernet Y.1731 OAM

• EcoEthernet™ 2.0 green technology

• Supports clause 45 MDIO register access

• Enhanced SPI interface supports high port

count IEEE 1588 applications

Applications

• Wireless backhaul systems

• Carrier Ethernet cellular base systems

• Industrial automation systems

• Secure data center to data center

interconnects

The PHY enables network-wide Layer 2 MACsec encryption and

preserves nanosecond-level IEEE 1588v2 network timing accuracy with

a simple PHY upgrade.

The dual port VSC8582 GbE PHY with Intellisec and VeriTime is ideal for

securing cloud network applications including e-commerce, databases,

collaboration, smart grid, video, and enterprise or government

communications.

Intellisec enables a realistic and affordable Layer 2 MACsec

security solution. Intellisec is a patent-pending technology enabling

IEEE802.1AE MACsec encryption end-to-end over any network,

including multi-operator and cloud-based networks, independent of

the network's awareness of security protocols. Intellisec is not limited

to traditional MACsec link-based box-to-box applications. Likewise,

IntelliSec scales easily with the number of interfaces delivering signiﬁ cant

cost savings in network deployment.

VeriTime™ is Microsemi's patent-pending timing technology

that delivers the industry's most accurate IEEE 1588v2 timing

implementation. Integration of MACsec with IEEE 1588v2 time stamping

in the PHY is an efﬁ cient and low cost method to protect data passing

through the network while maintaining highly accurate time of day

(ToD). For these applications, the device supports daisy-chaining of SPI

interfaces for IEEE 1588v2 time stamping to reduce the number of pins

required on a target ASIC, SoC or FPGA.

VSC8582 supports Y.1731 OAM and MPLS-TP OAM for accurate

delay measurement and performance monitoring. In addition, the

VSC8582 includes dual recovered clock outputs for timing references in

Synchronous Ethernet solutions. Using Microsemi's Ring Resiliency™

technology, the PHY switches between master and slave timing without

interrupting the 1000BASE-T link.

VSC8582

Dual-Port 10/100/1000BASE-T, 100/1000BASE-X PHY with Synchronous Ethernet, VeriTime™, Intellisec™, and QSGMII/SGMII MAC

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Microsemi Corporation (Nasdaq: MSCC) offers a comprehensive portfolio of semiconductor and system solutions for aerospace

& defense, communications, data center and industrial markets. Products include high-performance and radiation-hardened

analog mixed-signal integrated circuits, FPGAs, SoCs and ASICs; power management products; timing and synchronization

devices and precise time solutions, setting the world’s standard for time; voice processing devices; RF solutions; discrete

components; enterprise storage and communication solutions, security technologies and scalable anti-tamper products;

Ethernet solutions; Power-over-Ethernet ICs and midspans; as well as custom design capabilities and services. Microsemi is

headquartered in Aliso Viejo, California and has approximately 4,800 employees globally. Learn more at www.microsemi.com.

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www.microsemi.com VPPD-03286. 1.1. 8/16

Best-in-Class Power Consumption

• Voltage-mode dual port GbE PHY

• EcoEthernet 2.0 green energy efﬁ ciency modes with ActiPHY

automatic link power down, PerfectReach™ intelligent cable

algorithm, and IEEE 802.3az (including support for legacy

MACs not supporting IEEE 802.3az)

• Fully optimized power consumption for all link speeds

Superior PHY and Interface Technology

• Two integrated 10/100/1000BASE-T Ethernet copper

transceivers (IEEE 802.3ab compliant) with VeriPHY™ cable

diagnostics

• Two dual media copper/ﬁ ber ports with unidirectional

IEEE802.3ah support

• SGMII and QSGMII SerDes MAC interface

• Patented line driver with low EMI voltage mode and integrated

line side termination resistors

• HP Auto-MDIX support

• Integrated AC-coupling capacitors for SGMII interface

• Jumbo frame support up to 16 kB with programmable

synchronization FIFOs

Advanced Carrier Ethernet Support

• Recovered clock outputs with programmable clock squelch

control and fast link failure indication (typical < 1 ms) for G.8261

SyncE applications

• IEEE 1588v2 timestamp packet correction support

• Flexible transmit and receive frequency timing per PHY port

• 1000BASE-T ring resiliency for switching between master/slave

timing while maintaining linkup integrity

• Integrated dual I2C Mux to control SFP and PoE modules

• IEEE 802.3bf timing and synchronization support

• IEEE 802.1ae MACsec with 256/128-bit encryption support

Key Speciﬁ cations

• 1.0 V core and 2.5 V I/O power supplies

• 3.3 V-tolerant 2.5 V inputs

• QSGMII v1.3, SGMII v1.9 and IEEE 1149.1 JTAG boundary

scan support

• Compliant with IEEE 802.3 (10/1000 BASE-T, 10BASE-Te,

100BASE-TX, 100BASE-FX, and 1000BASE-X)

• Various SKUs available supporting an operating

temperature range from 0 °C ambient to 125 °C junction OR

–40 °C ambient to 125 °C junction