74LVT125PW,118 - NXP Semiconductors / Philips Semiconductors

1. General description

The 74LVT125; 74LVTH125 is a high-performance BiCMOS product designed for VCC

operation at 3.3 V.

This device combines low static and dynamic power dissipation with high speed and high

output drive. The 74LVT125; 74LVTH125 device is a quad buffer that is ideal for driving

bus lines. The device features four output enable inputs (1OE, 2OE, 3OE and 4OE), each

controlling one of the 3-state outputs.

2. Features

nQuad bus interface

n3-state buffers

nOutput capability: +64 mA and −32 mA

nTTL input and output switching levels

nInput and output interface capability to systems at 5 V supply

nBus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

nLive insertion and extraction permitted

nNo bus current loading when output is tied to 5 V bus

nPower-up 3-state

nLatch-up protection:

u JESD78: exceeds 500 mA

nESD protection:

uMIL STD 883 method 3015: exceeds 2000 V

uMachine model: exceeds 200 V

3. Quick reference data

74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Rev. 06 — 6 March 2006 Product data sheet

Table 1. Quick reference data

GND = 0 V; T

amb

=25

Symbol Parameter Conditions Min Typ Max Unit

tPLH LOW-to-HIGH propagation

delay nA to nY CL = 50 pF; VCC = 3.3 V - 2.7 - ns

tPHL HIGH-to-LOW propagation

delay nA to nY CL = 50 pF; VCC = 3.3 V - 2.9 - ns

Product data sheet Rev. 06 — 6 March 2006 2 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

4. Ordering information

Ciinput capacitance VI = 0 V or 3.0 V - 4 - pF

Cooutput capacitance outputs disabled;

VO= 0 V or 3.0 V -8-pF

ICC quiescent supply current outputs disabled;

VCC = 3.6 V - 0.13 - mA

Table 1. Quick reference data

…continued

GND = 0 V; T

amb

=25

Symbol Parameter Conditions Min Typ Max Unit

Table 2. Ordering information

Type number Package

Temperature range Name Description Version

74LVT125D −40 °C to +85 °C SO14 plastic small outline package; 14 leads;

body width 3.9 mm SOT108-1

74LVT125DB −40 °C to +85 °C SSOP14 plastic shrink small outline package; 14 leads;

body width 5.3 mm SOT337-1

74LVT125PW −40 °C to +85 °C TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm SOT402-1

74LVT125BQ −40 °C to +85 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad ﬂat package; no leads; 14 terminals;

body 2.5 ×3×0.85 mm

SOT762-1

74LVTH125D −40 °C to +85 °C SO14 plastic small outline package; 14 leads;

body width 3.9 mm SOT108-1

74LVTH125DB −40 °C to +85 °C SSOP14 plastic shrink small outline package; 14 leads;

body width 5.3 mm SOT337-1

74LVTH125PW −40 °C to +85 °C TSSOP14 plastic thin shrink small outline package; 14 leads;

body width 4.4 mm SOT402-1

74LVTH125BQ −40 °C to +85 °C DHVQFN14 plastic dual in-line compatible thermal enhanced very

thin quad ﬂat package; no leads; 14 terminals;

body 2.5 ×3×0.85 mm

SOT762-1

Product data sheet Rev. 06 — 6 March 2006 3 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

5. Functional diagram

6. Pinning information

6.1 Pinning

Fig 1. Logic symbol Fig 2. IEC logic symbol

Fig 3. Logic diagram

mna228

1A 1Y

1OE

2A 2Y

2OE

3A 3Y

3OE

4A 4Y

4OE

mna229

1EN1

10 8

13 11

mna227

nOE

nA nY

(1) The die substrate is attached to the

exposed die pad using conductive die

attach material. It can not be used as

a supply pin or input.

Fig 4. Pin conﬁguration SO14, SSOP14

and TSSOP14 Fig 5. Pin conﬁguration DHVQFN14

125

1OE VCC

1A 4OE

1Y 4A

2OE 4Y

2A 3OE

2Y 3A

GND 3Y

001aac476

7 8

001aac477

125

Transparent top view

2Y 3A

2A 3OE

2OE 4Y

1Y 4A

1A 4OE

GND

1OE

VCC

6 9

5 10

4 11

3 12

2 13

terminal 1

index area

GND(1)

Product data sheet Rev. 06 — 6 March 2006 4 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

6.2 Pin description

7. Functional description

7.1 Function table

[1] H = HIGH voltage level;

L = LOW voltage level;

X = don’t care;

Z = high-impedance OFF-state.

Table 3. Pin description

Symbol Pin Description

1OE 1 1 output enable input (active LOW)

1A 2 1 data input

1Y 3 1 data output

2OE 4 2 output enable input (active LOW)

2A 5 2 data input

2Y 6 2 data output

GND 7 ground (0 V)

3Y 8 3 data output

3A 9 3 data input

3OE 10 3 output enable input (active LOW)

4Y 11 4 data output

4A 12 4 data input

4OE 13 4 output enable input (active LOW)

VCC 14 supply voltage

Table 4. Function table[1]

Control Input Output

nOE nA nY

LLL

HXZ

Product data sheet Rev. 06 — 6 March 2006 5 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

8. Limiting values

[1] The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings

are observed.

[2] The performance capability of a high-performance integrated circuit in conjunction with its thermal

environment can create junction temperatures which are detrimental to reliability.

9. Recommended operating conditions

Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to

GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage −0.5 +4.6 V

VIinput voltage [1] −0.5 +7.0 V

VOoutput voltage output in OFF-state or

HIGH-state [1] −0.5 +7.0 V

IIK input clamping current VI<0V - −50 mA

IOK output clamping current VO<0V - −50 mA

IOoutput current output in LOW-state - 128 mA

output in HIGH-state - −64 mA

Tstg storage temperature −65 +150 °C

Tjjunction temperature [2] - 150 °C

Table 6. Recommended operating conditions

Symbol Parameter Conditions Min Typ Max Unit

VCC supply voltage 2.7 - 3.6 V

VIinput voltage 0 - 5.5 V

VIH HIGH-state input voltage 2.0 - - V

VIL LOW-state input voltage - - 0.8 V

IOH HIGH-state output current - - −32 mA

IOL LOW-state output current none - - 32 mA

current duty cycle ≤50 %;

f≥1 kHz --64mA

∆t/∆V input transition rise and

fall rate 0 - 10 ns/V

Tamb ambient temperature in free air −40 - +85 °C

Product data sheet Rev. 06 — 6 March 2006 6 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

10. Static characteristics

Table 7. Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ Max Unit

Tamb =−40 °C to +85 °C[1]

VIK input clamping voltage IIK =−18 mA; VCC = 2.7 V - −0.9 −1.2 V

VOH HIGH-state output voltage IOH =−100 µA;

VCC = 2.7 V to 3.6 V VCC − 0.2 VCC − 0.1 - V

IOH =−8 mA; VCC = 2.7 V 2.4 2.5 - V

IOH =−32 mA; VCC = 3.0 V 2.0 2.2 - V

VOL LOW-state output voltage VCC = 2.7 V

IOL = 100 µA - 0.1 0.2 V

IOL = 24 mA - 0.3 0.5 V

VCC = 3.0 V

IOL = 16 mA - 0.25 0.4 V

IOL = 32 mA - 0.3 0.5 V

IOL = 64 mA - 0.4 0.55 V

ILI input leakage current

all input pins VCC = 0 V or 3.6 V; VI= 5.5 V - 1 10 µA

control pins VCC = 3.6 V; VI=V

CC or GND - ±0.1 ±1µA

data pins VCC = 3.6 V [2]

VI=V

CC - 0.1 1 µA

VI=0V - −1−5µA

IOFF power-off leakage current VCC = 0 V; VI or VO= 0 V to 4.5 V - 1 ±100 µA

IHOLD bus hold current data input VCC = 3 V [3]

VI = 0.8 V 75 150 - µA

VI = 2.0 V −75 −150 - µA

VCC = 0 V to 3.6 V

VI = 3.6 V ±500 - - µA

IEX external current into output output in HIGH-state when

VO>V

CC; VO= 5.5 V and

VCC = 3.0 V

- 60 125 µA

IO(pu/pd) power-up/power-down output

current VCC ≤1.2 V; VO= 0.5 V to VCC;

VI= GND or VCC;

nOE = don’t care

[4] -±1±100 µA

IOZ OFF-state output current VCC = 3.6 V; VI=V

IH or VIL

output HIGH: VO= 3.0 V - 1 5 µA

output LOW: VO= 0.5 V - −1−5µA

ICC quiescent supply current VCC = 3.6 V; VI= GND or VCC;

IO=0A

outputs HIGH - 0.13 0.19 mA

outputs LOW - 2 7 mA

outputs disabled [5] - 0.13 0.19 mA

Product data sheet Rev. 06 — 6 March 2006 7 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

[1] Typical values are measured at VCC = 3.3 V and Tamb =25°C.

[2] Unused pins at VCC or GND.

[3] This is the bus hold overdrive current required to force the input to the opposite logic state.

[4] This parameter is valid for any VCC between 0 V and 1.2 V with a transition time of up to 10 ms. From VCC = 1.2 V to VCC = 3.0 V to

3.6 V a transition time of 100 µs is permitted. This parameter is valid for Tamb =25°C only.

[5] ICC is measured with outputs pulled to VCC or GND.

[6] This is the increase in supply current for each input at the speciﬁed voltage level other than VCC or GND.

11. Dynamic characteristics

[1] Typical values are at VCC = 3.3 V and Tamb =25°C.

∆ICC additional quiescent supply

current per input pin; VCC = 3 V to 3.6 V;

one input at VCC −0.6 V and

other inputs at VCC or GND

[6] - 0.1 0.2 mA

Ciinput capacitance VI = 0 V or 3.0 V - 4 - pF

Cooutput capacitance outputs disabled;

VO= 0 Vor 3.0 V -8-pF

Table 7. Static characteristics

…continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Typ Max Unit

Table 8. Dynamic characteristics

Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8.

Symbol Parameter Conditions Min Typ Max Unit

Tamb =−40 °C to +85 °C[1]

tPLH LOW-to-HIGH propagation delay nAn to nY see Figure 6

VCC = 2.7 V - - 4.5 ns

VCC = 3.0 V to 3.6 V 1.0 2.7 4.0 ns

tPHL HIGH-to-LOW propagation delay nAn to nY see Figure 6

VCC = 2.7 V - - 4.9 ns

VCC = 3.0 V to 3.6 V 1.0 2.9 3.9 ns

tPZH output enable time nOE to nY see Figure 7

VCC = 2.7 V - - 6.0 ns

VCC = 3.0 V to 3.6 V 1.0 3.4 4.7 ns

tPZL output enable time nOE to nY see Figure 7

VCC = 2.7 V - - 6.5 ns

VCC = 3.0 V to 3.6 V 1.1 3.4 4.7 ns

tPHZ output disable time nOE to nY see Figure 7

VCC = 2.7 V - - 5.7 ns

VCC = 3.0 V to 3.6 V 1.8 3.7 5.1 ns

tPLZ output disable time nOE to nY see Figure 7

VCC = 2.7 V - - 4.0 ns

VCC = 3.0 V to 3.6 V 1.3 2.6 4.5 ns

Product data sheet Rev. 06 — 6 March 2006 8 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

12. Waveforms

VM = 1.5 V.

VOL and VOH are typical voltage output drop that occur with the output load.

Fig 6. Propagation delay input (nA) to output (nY)

VM = 1.5 V.

VOL and VOH are typical voltage output drop that occur with the output load.

Fig 7. Enable and disable times of 3-state outputs

mnb072

nA input

nY output

tPLH tPHL

GND

VOH

VOL

001aac475

tPZL

nY output

nOE input

VOL

VCC

VOH

GND

0 V

tPLZ

tPZH tPHZ

VOL + 0.3 V

VOH − 0.3 V

Product data sheet Rev. 06 — 6 March 2006 9 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Test data is given in Table 9.

Deﬁnitions test circuit:

RL = Load resistor.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = Test voltage for switching times.

Fig 8. Load circuitry for switching times

Table 9. Test data

Input Load VEXT

VIfitWtr, tfCLRLtPHZ, tPZH tPLZ, tPZL tPLH, tPHL

2.7 V ≤ 10 MHz 500 ns ≤ 2.5 ns 50 pF 500 ΩGND 6 V open

VEXT

VCC

VIVO

001aae235

DUT

PULSE

GENERATOR

VMVM

10 %

90 %

0 V

negative

pulse

positive

pulse

0 V

VMVM

90 %

10 %

Product data sheet Rev. 06 — 6 March 2006 10 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

13. Package outline

Fig 9. Package outline SOT108-1 (SO14)

UNIT A

max. A1A2A3bpcD

(1) E(1) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

inches

1.75 0.25

0.10 1.45

1.25 0.25 0.49

0.36 0.25

0.19 8.75

8.55 4.0

3.8 1.27 6.2

5.8 0.7

0.6 0.7

0.3 8

0.25 0.1

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

Note

1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.

1.0

0.4

SOT108-1

detail X

vMA

(A )

076E06 MS-012

pin 1 index

0.069 0.010

0.004 0.057

0.049 0.01 0.019

0.014 0.0100

0.0075 0.35

0.34 0.16

0.15 0.05

1.05

0.041

0.244

0.228 0.028

0.024 0.028

0.012

0.01

0.25

0.01 0.004

0.039

0.016

99-12-27

03-02-19

0 2.5 5 mm

scale

SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1

Product data sheet Rev. 06 — 6 March 2006 11 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Fig 10. Package outline SOT337-1 (SSOP14)

UNIT A1A2A3bpcD

(1) E(1) eH

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.21

0.05 1.80

1.65 0.25 0.38

0.25 0.20

0.09 6.4

6.0 5.4

5.2 0.65 1.25 0.2

7.9

7.6 1.03

0.63 0.9

0.7 1.4

0.9 8

0.13 0.1

DIMENSIONS (mm are the original dimensions)

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

SOT337-1 99-12-27

03-02-19

(1)

vMA

14 8

detail X

(A )

MO-150

pin 1 index

0 2.5 5 mm

scale

SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm SOT337-1

max.

Product data sheet Rev. 06 — 6 March 2006 12 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Fig 11. Package outline SOT402-1 (TSSOP14)

UNIT A1A2A3bpcD

(1) E(2) (1)

ELL

pQZywv θ

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05 0.95

0.80 0.30

0.19 0.2

0.1 5.1

4.9 4.5

4.3 0.65 6.6

6.2 0.4

0.3 0.72

0.38 8

0.13 0.10.21

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT402-1 MO-153 99-12-27

03-02-18

0.25

14 8

detail X

(A )

vMA

0 2.5 5 mm

scale

TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1

max.

1.1

pin 1 index

Product data sheet Rev. 06 — 6 March 2006 13 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

Fig 12. Package outline SOT762-1 (DHVQFN14)

terminal 1

index area

0.51

A1Eh

UNIT ye

0.2

REFERENCES

OUTLINE

VERSION EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 3.1

2.9

1.65

1.35

2.6

2.4 1.15

0.85

0.30

0.18

0.05

0.00 0.05 0.1

DIMENSIONS (mm are the original dimensions)

SOT762-1 MO-241 - - -- - -

0.5

0.3

0.1

0.05

0 2.5 5 mm

scale

SOT762-1

DHVQFN14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;

14 terminals; body 2.5 x 3 x 0.85 mm

A(1)

max.

AA1c

detail X

y1C

13 9

02-10-17

03-01-27

terminal 1

index area

E(1)

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

D(1)

Product data sheet Rev. 06 — 6 March 2006 14 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

14. Abbreviations

15. Revision history

Table 10. Abbreviations

Acronym Description

CMOS Complementary Metal Oxide Semiconductor

DUT Device Under Test

ESD ElectroStatic Discharge

TTL Transistor-Transistor Logic

Table 11. Revision history

Document ID Release date Data sheet status Change notice Supersedes

74LVT_LVTH125_6 20060306 Product data sheet - 74LVT125_5 (9397 750 14703)

Modiﬁcations: •Section 4: Added type numbers 74LVTH125D, 74LVTH125DB, 74LVTH125PW and

74LVTH125BQ.

74LVT125_5 20050210 Product data sheet - 74LVT125_4 (9397 750 14552)

74LVT125_4 20050207 Product data sheet - 74LVT125_3 (9397 750 13535)

74LVT125_3 20040624 Product data sheet - 74LVT125_2 (9397 750 03514)

74LVT125_2 19980219 Product speciﬁcation - 74LVT125_1

74LVT125_1 - - - -

Product data sheet Rev. 06 — 6 March 2006 15 of 16

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

16. Legal information

16.1 Data sheet status

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term ‘short data sheet’ is explained in section “Deﬁnitions”.

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status

information is available on the Internet at URL http://www.semiconductors.philips.com.

16.2 Deﬁnitions

Draft — The document is a draft version only. The content is still under

internal review and subject to formal approval, which may result in

modiﬁcations or additions. Philips Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included herein and shall have no liability for the consequences of

use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is intended

for quick reference only and should not be relied upon to contain detailed and

full information. For detailed and full information see the relevant full data

sheet, which is available on request via the local Philips Semiconductors

sales ofﬁce. In case of any inconsistency or conﬂict with the short data sheet,

the full data sheet shall prevail.

16.3 Disclaimers

General — Information in this document is believed to be accurate and

reliable. However, Philips Semiconductors does not give any representations

or warranties, expressed or implied, as to the accuracy or completeness of

such information and shall have no liability for the consequences of use of

such information.

Right to make changes — Philips Semiconductors reserves the right to

make changes to information published in this document, including without

limitation speciﬁcations and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — Philips Semiconductors products are not designed,

authorized or warranted to be suitable for use in medical, military, aircraft,

space or life support equipment, nor in applications where failure or

malfunction of a Philips Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. Philips Semiconductors accepts no liability for inclusion and/or use

of Philips Semiconductors products in such equipment or applications and

therefore such inclusion and/or use is for the customer’s own risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. Philips Semiconductors makes no

representation or warranty that such applications will be suitable for the

speciﬁed use without further testing or modiﬁcation.

Limiting values — Stress above one or more limiting values (as deﬁned in

the Absolute Maximum Ratings System of IEC 60134) may cause permanent

damage to the device. Limiting values are stress ratings only and operation of

the device at these or any other conditions above those given in the

Characteristics sections of this document is not implied. Exposure to limiting

values for extended periods may affect device reliability.

Terms and conditions of sale — Philips Semiconductors products are sold

subject to the general terms and conditions of commercial sale, as published

at http://www.semiconductors.philips.com/proﬁle/terms, including those

pertaining to warranty, intellectual property rights infringement and limitation

of liability, unless explicitly otherwise agreed to in writing by Philips

Semiconductors. In case of any inconsistency or conﬂict between information

in this document and such terms and conditions, the latter will prevail.

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or the

grant, conveyance or implication of any license under any copyrights, patents

or other industrial or intellectual property rights.

16.4 Trademarks

Notice: All referenced brands, product names, service names and trademarks

are the property of their respective owners.

17. Contact information

For additional information, please visit: http://www.semiconductors.philips.com

For sales ofﬁce addresses, send an email to: sales.addresses@www.semiconductors.philips.com

Document status[1][2] Product status[3] Deﬁnition

Objective [short] data sheet Development This document contains data from the objective speciﬁcation for product development.

Preliminary [short] data sheet Qualiﬁcation This document contains data from the preliminary speciﬁcation.

Product [short] data sheet Production This document contains the product speciﬁcation.

Philips Semiconductors 74LVT125; 74LVTH125

3.3 V quad buffer; 3-state

For more information, please visit: http://www.semiconductors.philips.com.

For sales office addresses, email to: sales.addresses@www.semiconductors.philips.com.

Date of release: 6 March 2006

Document identifier: 74LVT_LVTH125_6

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section ‘Legal information’.

18. Contents

1 General description. . . . . . . . . . . . . . . . . . . . . . 1

2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 1

4 Ordering information. . . . . . . . . . . . . . . . . . . . . 2

5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3

6 Pinning information. . . . . . . . . . . . . . . . . . . . . . 3

6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4

7 Functional description . . . . . . . . . . . . . . . . . . . 4

7.1 Function table. . . . . . . . . . . . . . . . . . . . . . . . . . 4

8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5

9 Recommended operating conditions. . . . . . . . 5

10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6

11 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7

12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10

14 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 14

15 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 14

16 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15

16.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15

16.2 Deﬁnitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

16.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 15

16.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 15

17 Contact information. . . . . . . . . . . . . . . . . . . . . 15

18 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16