SAMA5D27 SOM1 Kit1 SAMA5D27 SOM1 Kit1 User's Guide Scope This user's guide provides detailed information on the overall design of the SAMA5D27 SOM1 Kit1 and describes how to use the kit. The kit is the evaluation platform for the SAMA5D27 SIP (System-In-Package) and SOM (System-OnModule), and comprises: * a baseboard * a SAMA5D27 SOM soldered on the baseboard * a SAMA5D27 SIP soldered on the SOM * a USB cable See the figure below. Figure 1. SAMA5D27 SOM1 Kit1 Overview SOM (System-On-Module) SIP (System-In-Package) Baseboard (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 1 SAMA5D27 SOM1 Kit1 Table of Contents Scope.............................................................................................................................. 1 1. Object of Declaration................................................................................................. 3 2. Introduction................................................................................................................4 2.1. 2.2. Document Layout......................................................................................................................... 4 Reference Documents..................................................................................................................4 3. Product Overview...................................................................................................... 5 3.1. 3.2. 3.3. 3.4. Kit Contents..................................................................................................................................5 Features....................................................................................................................................... 5 Specifications............................................................................................................................... 6 Power Sources............................................................................................................................. 6 4. Baseboard Components............................................................................................8 4.1. 4.2. 4.3. 4.4. 4.5. Baseboard Overview.................................................................................................................... 8 Function Blocks.......................................................................................................................... 10 External Interfaces..................................................................................................................... 28 Debugging Capabilities.............................................................................................................. 33 PIO Usage on Expansion Connectors........................................................................................38 5. Installation and Operation........................................................................................45 5.1. 5.2. System and Configuration Requirements...................................................................................45 Baseboard Setup........................................................................................................................45 6. Errata.......................................................................................................................46 6.1. Incorrect NRST and WKUP Push Button Markings....................................................................46 7. Appendix: Schematics and Layouts........................................................................ 47 8. Revision History.......................................................................................................56 The Microchip Web Site................................................................................................ 57 Customer Change Notification Service..........................................................................57 Customer Support......................................................................................................... 57 Microchip Devices Code Protection Feature................................................................. 57 Legal Notice...................................................................................................................58 Trademarks................................................................................................................... 58 Quality Management System Certified by DNV.............................................................59 Worldwide Sales and Service........................................................................................60 (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 2 SAMA5D27 SOM1 Kit1 1. Object of Declaration EU Declaration of Conformity for SAMA5D27 SOM1 Kit1 This declaration of conformity is issued by the manufacturer. The development/evaluation tool is designed to be used for research and development in a laboratory environment. This development/evaluation tool is not a Finished Appliance, nor is it intended for incorporation into Finished Appliances that are made commercially available as single functional units to end users under EU EMC Directive 2004/108/EC and as supported by the European Commission's Guide for the EMC Directive 2004/108/EC (8th February 2010). This development/evaluation tool complies with EU RoHS2 Directive 2011/65/EU. This development/evaluation tool, when incorporating wireless and radio-telecom functionality, is in compliance with the essential requirement and other relevant provisions of the R&TTE Directive 1999/5/EC and the FCC rules as stated in the declaration of conformity provided in the module datasheet and the module product page available at www.microchip.com. For information regarding the exclusive, limited warranties applicable to Microchip products, please see Microchip's standard terms and conditions of sale, which are printed on our sales documentation and available at www.microchip.com. Signed for and on behalf of Microchip Technology Inc. at Chandler, Arizona, USA. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 3 SAMA5D27 SOM1 Kit1 2. Introduction 2.1 Document Layout The document is organized as follows: * Introduction * Product Overview - Important information about the kit * Board Components - Specifications of the kit and high-level description of the major components and interfaces * Installation and Operation - Instructions on how to get started with the kit * Errata * Appendix: Schematics and Layouts - Kit schematics and layout diagrams 2.2 Reference Documents The following Microchip documents are available and recommended as supplemental reference resources: Type Document Title Available Ref. No./Product Datasheet SAMA5D2 www.microchip.com/SAMA5D2 DS60001476 Datasheet SAMA5D2 System-On-Module (SOM) www.microchip.com/ATSAMA5D27SOM1 DS60001521 Datasheet SAMA5D2 System-In-Package (SIP) www.microchip.com/SAMA5D2 SIP DS60001484 (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 4 SAMA5D27 SOM1 Kit1 3. Product Overview 3.1 Kit Contents The kit includes the following: * One baseboard with soldered SOM * One USB cable 3.2 Features The kit comprises a baseboard with a soldered SAMA5D27 SOM1 module. The module features a SAMA5D27-D1G-CU SIP embedding a 1-Gbit DDR2 SDRAM. The SOM offers a reliable and costeffective embedded platform for building end products, as well as a small form factor, complemented by many connectivity interfaces. The SOM is a fully-featured industrially-certified single board computer designed for integration into customer applications. The SOM module is a purpose-built small footprint hardware platform equipped with a wide array of highspeed connectivity engineered to support various applications such as IoT endpoints, wearables, appliances or industrial equipment. The SOM integrates a 1-Gbit DDR2 SDRAM, a QSPI memory and a 10/100 Mbps Ethernet controller. 128 GPIO pins are provided by the SOM for general use in the system. All GPIO pins are independent and can be configured as inputs or outputs, with or without pull-up/pull-down resistors. The baseboard features a wide range of peripherals, as well as a user interface and expansion options, including two mikroBUSTM click interface headers to support over 300 MikroElektronika click boardsTM and one PmodTM interface. Table 3-1. Baseboard Features Characteristics Specifications Components Memory One QSPI Flash (unmounted) Tested with Macronix MX25L25673GM2I-08G Crypto One CryptoAuthenticationTM device ATECC508 USB Com Port One USB host One USB device Connector type C Connector type microAB One USB HSIC 2-pin header (not populated) Ethernet One Ethernet interface RJ45 connector CAN One CAN interface ATA6561 Video One LCD RGB 24-bit interface One ISC 12-bit interface 50-pin FPC connector 2x15 male connector Storage One standard SD card interface One microSD card interface With 3.3V/1.8V power switch - Debug port One J-Link-OB and J-Link-CDC Microchip SAM3U micro-controller with embedded J-Link firmware - One JTAG interface (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 5 SAMA5D27 SOM1 Kit1 Characteristics Specifications Components Board Monitor One RGB (Red, Green, Blue) LED Four push button switches - Power ON, Reset, Wakeup, User Free Expansion One tamper connector One Pmod connector 10-pin male connector 6-pin female connector Two mikroBUS interfaces 2x8-pin female connector Board Supply From USB A and/or USB J-Link-OB 5 VDC Power saving SuperCap - Refer to www.microchip.com for: * * 3.3 Sample code and technical support Linux software and demos Specifications Table 3-2. Kit Specifications 3.4 Characteristic Specification Ordering code ATSAMA5D27-SOM1-EK1 Board supply voltage USB-powered Temperature Operating: 0C to +70C Storage: -40C to +85C Relative humidity 0 to 90% (non-condensing) Baseboard dimensions 135 x 90 x 20 mm RoHS status Compliant Power Sources Two options are available to power up the baseboard: * USB powering through the USB Micro-AB connector (J17 - default configuration) * Powering through the USB Micro-AB connector on the J-Link-OB Embedded Debugger interface (J10) The two power sources can coexist. A priority mechanism manages the automatic switching between the two. The priority source is J-Link (J10), the secondary source is the USB port (J17). Table 3-3. Electrical Characteristics Electrical Parameter Value Input voltage 5VCC Maximum input voltage 6VCC (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 6 SAMA5D27 SOM1 Kit1 Electrical Parameter Value Maximum 3.3VDC current available 1.2A I/O voltage 3.3V only (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 7 SAMA5D27 SOM1 Kit1 4. Baseboard Components This section covers the specifications of the SAMA5D27 SOM1 Kit1 baseboard and provides a high-level description of the baseboard's major components and interfaces. This document is not intended to provide a detailed documentation about the processor or about any other component used on the baseboard. It is expected that the user will refer to the appropriate documents of these devices to access detailed information. 4.1 Baseboard Overview The fully-featured SAMA5D27 SOM1 Kit1 baseboard integrates multiple peripherals and interface connectors, as shown in the figure below. Figure 4-1. SAMA5D27 SOM1 Kit1 Baseboard Overview The following picture illustrates the kit block diagram. Figure 4-2. SAMA5D27 SOM1 Kit1 Block Diagram USB A&B USB-B Connector GPIO System Supplies POWER REGULATOR SPI Flash USB-A Connector USB Detection Dual LED POWER MONITOR Tri State USB Connector JLINK Power 5V/3.3V Push Button Power Cap Reset, Wkup DisBoot, User JLINK-OB JLINK-CDC SD Card Connector SDHC1 3.3V, 1.8V SDHC0 PIOBU Connector SAMA5D27-SOM1 UART LCD TWI DDR2, QSPI, EEPROM, ETHERNET PHY, GPIOs JTAG ISC Connector FLEXCOM RGB Leds Function Select MPU JTAG Interface ETH CAN RJ45 (c) 2017 Microchip Technology Inc. FPC Connector ISC JTAG SWITCH PCB JTAG Interface Power Switch VDDBU GPIO, SHDN DEBUG Interface uSD Connector CRYPTO QSPI 5V USB Power Switch ECC508 3v3, 1v8 User Guide CAN GPIO mikroBUS Interface Function Select GPIO mikroBUS Interface Pmod Interface DS50002667A-page 8 SAMA5D27 SOM1 Kit1 4.1.1 Default Jumper Settings The figure below shows the default jumper settings. Jumpers in red are configuration items and current measurement points. The following table describes the functionality of the jumpers. Figure 4-3. Default Jumper Settings Table 4-1. Jumper Settings Jumper Default Function J1 Closed VDD_MAIN_5V current measurement J2 Closed VDD_3V3 SOM current measurement J4 Closed VDDBU current measurement J7 Open Enables J-Link-OB (closed=disable) Erases SAM3U firmware code (closed=erase at power-up) Warning: Must remain open. If closed, the SAM3U contents are erased and J-Link functionality is discarded. J8 Open J9 Open Enables JTAG-CDC (closed=disable) J13 Open Disables SOM boot memories (closed=disable) (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 9 SAMA5D27 SOM1 Kit1 Jumper Default Function 4.1.2 J22 Closed Enables 3.3V power mikroBUS1 (closed=enable) J28 Closed Enables 3.3V power mikroBUS2 (closed=enable) Baseboard Connectors The following table describes the interface connectors on the SAMA5D27 SOM1 Kit1 baseboard. Table 4-2. Baseboard Interface Connectors Connector Interfaces to J5 CLK_AUDIO test point (not populated) J6 PCB-edge JTAG connector for factory-programming the J-Link-OB J10 USB-A MicroAB, J-Link-OB port J11 MPU SAMA5D27 JTAG 10-pin IDC connector J12 Standard SDMMC0 connector J14 microSD connector J15 Ethernet RJ45 connector J16 CAN 3-pin screw connector J17 USB-A MicroAB connector J18 HSIC 2-point header J19 USB-B type C connector J20-J23 Jumper to select Pmod functions J21 Pmod connector J24-25 mikroBUS1 connectors J26 Expansion TFT LCD connector for display module J27 ISC connector J29-J30 mikroBUS2 connectors J31 Tamper and analog comparator connector J32 SHDN test point (not populated) 4.2 Function Blocks 4.2.1 SAMA5D27 SOM1 The SAMA5D27 SOM1 main features are as follows: * Ultra-small SIP (SAMA5D27-D1G-CU) embedding an ultra-low-power SAMA5D27 Arm(R) Cortex(R)A5 processor and a 1 Gbit DDR2 SDRAM memory * SST26VF064 64 Mb QSPI Flash * 24AA02E48 2 Kb serial E2PROM with preprogrammed EUI node identity (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 10 SAMA5D27 SOM1 Kit1 * * MIC2800 power management device KSZ8081RNA Ethernet Phy 10/100 MHz RMII Refer to the SAMA5D27 SOM1 datasheet for more information. Figure 4-4. SAMA5D27 SOM1 Block Diagram VDDSDHC VDDISC TWI Interface Power Management Unit MIC2800-G4JYML MAIN 3.3V JTAG & DBGU Interfaces VDDBU 2K Serial EEPROM with EUI-48 Node Identity 24AA02E48T-I/OT DEBUG 7 * PIOBU BACKUP RXD WAKEUP RESET SHUTDOWN Disable Boot CLK_AUDIO MISC COMPP / COMPN 10BASE-T / 100BASE-TX PHY With RMII Support KSZ8081RNAIA MPU + DDR2 1Gb SAMA5D27-SiP LFBGA289 14 x 14 mm Pitch 0.8 mm SYSTEM 64Mbit Serial QUAD I/O Flash Memory SST26VF064B-104I/MF USB Dev. USB Host External QSPI Connection HSIC 4.2.2 Power Supply Topology and Power Distribution 4.2.2.1 Input Power Options CLASS-D Stereo Mono PDMIC Interface Camera Interface LCD Interface up to 24-bit SD-CARD Interface SDIO Interface eMMC Interface IS Interface SSC Interface QSPI Interface TWI Interface 2 * SPI Interfaces Up to 2 * CAN Up to 4 * ADC Inputs Up to 6 * PTC Buttons Up to 4 * FLEXCOM Up to 4 * UART 103 Mixable I/O As described previously, the board power source can come through either a USB connector (J10 or J17) connected to a PC or a 5VDC-USB power supply unit. Such USB power source is sufficient to supply the board in most applications. It is important to note that when the USB-powered operation is used, the USB-B Host port has a limited powering capability for the device connected to it down the way. If the USB-B Host port is required to provide full powering capabilities to a target device, then it is recommended to use an external DC-USB power supply unit as main power source for the whole system rather than a PC or a USB hub. The baseboard embeds a local power management stage comprising two sets of load switches, respectively implemented by MOSFET DMP2160 and DC/DC converter MIC23451. The following figure is a schematic of the power options. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 11 SAMA5D27 SOM1 Kit1 Figure 4-5. Input Powering J1 TSW-102-07-G-S 1 C4 100nF VDD_MAIN_5V 7 6 8 3 1 2 Q1-2 DMP2160 Q1-1 DMP2160 VBUS_JLINK 4 C1 100nF R3 10K 2 5 R1 100K VBUS_USBA 1 C9 100nF Q2-1 R8 100K 7 8 3 6 DMP2160 Q2-2 2 4 DMP2160 5 R12 100K DNP Note: PC/USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any project that requires only a 5V source at up to 500 mA. Jumper J1 is used to perform MAIN_5V current measurements on the baseboard. 4.2.2.2 Power Supply Requirements and Restrictions Detailed information on the device power supplies is provided in tables "SAMA5D2 Power Supplies" and "Power Supply Connections" in the SAMA5D2 Series datasheet. 4.2.2.3 Power-up and Power-down Considerations Power-up and power-down considerations are described in section "Power Considerations" of the SAMA5D2 Series datasheet. Caution: The power-up and power-down sequences provided in the SAMA5D2 Series datasheet must be respected for reliable operation of the device. These are respected by the on-board MIC23451. 4.2.2.4 Power Management The baseboard power management uses a MIC23451 PMIC, which is a triple synchronous buck regulator with HyperLight Load(R) mode featuring a power good indicator. The triple DC-DC step down power regulator delivers two outputs: 3.3V/2A and 1.8V/2A. While the external power is being applied, the baseboard can be shut down by software and then woken up by action on the PB2 push button, which activates the WKUP signal. The figure below shows the power management scheme. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 12 SAMA5D27 SOM1 Kit1 Figure 4-6. Baseboard Power Management J2 TSW-102-07-G-S 1 2 VDDIN_3V3 1 L1 2 180ohm at 100MHz J1 TSW-102-07-G-S VDD_MAIN_5V VOUT1 1 2 U1 C5 10uF C2 10uF R4 25 5 8 C3 10uF 3 6 9 100R C7 4.7uF R130 0R 21 R16 10K R7 DNP 10K R10 EN1 19 10K VDD_SDHC_3V3 L3 1 R2 309K 1uH 23 C6 4.7uF L2 2 180ohm at 100MHz R5 71K5 VOUT2 MIC23451 PG1 SW2 SNS2 FB2 4 18 VDD_SDHC_1V8 L6 1 1uH R6 301K 17 L5 2 180ohm at 100MHz C8 4.7uF R9 158K EN2 VOUT3 R19 16 DNP 0R 15 10K VOUT3 R13 FB3 7 12 VDD_3V3 L8 1 1uH R11 309K 14 C10 4.7uF L7 2 180ohm at 100MHz R14 71K5 PG3 BB_PWR_GOOD 1 2 10 27 PD8 13 10K SW3 SNS3 EN3 PGND1 PGND2 PGND3 EP2 R18 PG2 AGND1 AGND2 EP1 DNP 10K 11 24 28 VOUT2 R15 20 DNP 0R FB1 26 22 AVIN1 AVIN2 AVIN3 VOUT1 R17 SW1 SNS1 PVIN1 PVIN2 PVIN3 One PIO (PD8) is used to check the status of the main regulator. Table 4-3. Power Good Signal 4.2.2.5 PIO Mnemonic Signal Description PD8 BB_PWR_GOOD High level = power is established and at correct level Supply Group Configuration The main regulator provides the 3.3V for the SOM and all power supplies required by the baseboard: * * * * 3.3V SOM (VDDIN_3V3) 3.3V VDDSDHC (3.3V or 1.8V) 3.3V baseboard (VDD_3V3) 3.3V VDDBU Figure 4-7. SOM Power Lines VDDIN_3V3 U3F 16 17 VDDBU VDDIN_3V3 C16 2.2uF DNP C19 2.2uF DNP C17 100nF C18 100nF 55 C20 100nF 15 VDDSDHC C21 2.2uF DNP C22 100nF C23 2.2uF DNP C24 100nF 65 VDDIN_3V3_1 VDDIN_3V3_2 VDDBU VDDISC VDDSDHC GND_0 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 1 10 18 26 31 39 42 43 50 56 62 66 69 72 75 88 89 98 107 130 131 149 166 171 176 ATSAMA5D27-SOM1 4.2.2.6 Backup Power Supply The baseboard features a power source in order to permanently power the backup area of the SAMA5D2 device (refer to the SAMA5D2 Series datasheet). A super capacitor (C14) sustains such permanent power to VDDBU when all system power sources are off. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 13 SAMA5D27 SOM1 Kit1 Figure 4-8. VDDBU Powering Options J4 TSW-102-07-G-S VDD_3V3 2 D2 R20 3 1 100R RB160M-60TR C13 100nF BAT54C + C14 VDDBU 1 2 D1 0.2F/3.3V (Super)-Capacitor energy storage 4.2.3 Shutdown Circuitry On the baseboard, this circuitry is implemented but inhibited by default (R131 is not populated). The SHDN signal, output of the shutdown controller, signals the shutdown request to the power supply. This output signal is supplied by VDDBU that is present in Backup mode The shutdown controller manages the main power supply and is connected to the ENABLE input pin of the DC/DC converter providing the main power supplies of the system. Figure 4-9. Shutdown Controller VDD_MAIN_5V VDDBU R129 100K R132 100K R128 10K R131 3 SHDN R127 Q7 BSS138 1 10K Q6 BSS138 1 2 2 POWER ON 4.2.4 DNP 0R 3 PB3 Push Button Switches The baseboard features four push buttons: * * * One reset push button (PB1). When pressed and released, the baseboard is reset. One wakeup push button (PB2) connected to the SAMA5D27 WKUP pin, used to exit the processor from Backup mode. One power-on button (PB3). Figure 4-10. System Push Buttons VDDBU R126 100K DNP NRST R23 PB1 NRST 100R VDDBU R121 10K PB2 WKUP * R24 WAKE UP 100R One user momentary push button (PB4) connected to PIO PA29, and optionally to PIOBU1. The wakeup is available only if the shutdown controller is used (see figure Shutdown Controller). (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 14 SAMA5D27 SOM1 Kit1 Figure 4-11. User Push Button PB4 4.2.5 PIOBU1 R72 100R DNP PA29 R73 100R Additional Memories One additional memory, QSPI device U9, can be soldered on the baseboard. This QSPI Flash memory uses the same PIOs as the SOM QSPI. Such configuration makes it possible to choose between two bootable memories. The figure below illustrates the QSPI memory implementation. Figure 4-12. Optional QSPI Serial Data Flash on Baseboard VDD_3V3 R53 10K R54 10K VDD_3V3 PB7 QSPI1_IO0 5 PB8 QSPI1_IO1 2 PB9 QSPI1_IO2 3 PB10 QSPI1_IO3 7 U9 SI/SIO0 VCC SO/SIO1 GND SIO2 CS# SIO3 SCLK 8 C52 100nF 4 1 CS_QSPI1 6 QSPI1_SCK PB5 MX25L25673GM2I-08G DNP Table 4-4. QSPI Signal Descriptions Mnemonic Shared PIO Signal Description PB5 QSPI1_SCK QSPI on SOM Clock PB6 QSPI1_CS QSPI on SOM Chip select PB7 QSPI0_IO0 QSPI on SOM Data0 PB8 QSPI0_IO1 QSPI on SOM Data1 PB9 QSPI0_IO2 QSPI on SOM Data2 PB10 QSPI0_IO3 QSPI on SOM Data3 CS Disable Boot One jumper (J13) controls the selection (CS#) of the bootable memory components (QSPI) using a noninverting 3-state buffer. Figure 4-13. CS Disable Boot VDD_3V3 J13 R59 10K 1 2 4.2.5.1 PIO TSW-102-07-G-S VDD_3V3 (SOM) DISABLE_BOOT 1 PB6 PB6 QSPI1_CS 2 3 U10 OE IN VCC OUT R60 10K 5 CS_QSPI1 4 GND C55 100nF NL17SZ125 DNP The rule of operation is: * * PB1 (RESET) pressed and J13 open = booting from QSPI on SOM PB1 (RESET) pressed and J13 closed = booting from QSPI on baseboard if fitted. The QSPI on SOM is disabled. Refer to the SAMA5D2 Series datasheet for more information on standard boot strategies and sequencing. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 15 SAMA5D27 SOM1 Kit1 4.2.6 4.2.6.1 Secure Digital Multimedia Card (SDMMC) Interface The SD (Secure Digital) Card is a non-volatile memory card format used as a mass storage memory in mobile devices. Secure Digital Multimedia Card (SDMMC) Controller The baseboard features two Secure Digital Multimedia Card (SDMMC) interfaces that support the MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the SDIO V3.0 specification. It is compliant with the SD Host Controller Standard V3.0 Specification. * * 4.2.6.2 The SDMMC0 interface is connected to a standard SD card interface. The SDMMC1 interface is connected to a microSD card interface. SDMMC0 Card Connector (J12) A standard MMC/SD card connector, connected to SDMMC0, is mounted on the top side of the baseboard. The SDMMC0 communication is based on a 12-pin interface (clock, command, write protect, power switch and data (8)). A card detection switch is included. The figure below illustrates the SDMMC0 interface implementation. Figure 4-14. SDMMC0 VDDSDHC VDD_3V3 R52 0R R56 RR1 10K 68K PA12 SDMMC0_WP PA3 PA2 PA13 PA0 SDMMC0_DA1 SDMMC0_DA0 SDMMC0_CD SDMMC0_CK PA1 PA5 PA4 SDMMC0_CDA SDMMC0_DA3 SDMMC0_DA2 PA6 PA7 PA8 PA9 SDMMC0_DA4 SDMMC0_DA5 SDMMC0_DA6 SDMMC0_DA7 RR2 68K R57 10K C53 10uF R58 10K 8 7 6 5 4 3 2 1 9 C54 100nF J12 16 15 14 13 12 11 10 SD/MMCPlus CARD (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 16 SAMA5D27 SOM1 Kit1 Figure 4-15. Standard SD Socket J12 Location The table below describes the pin assignment of SDMMC connector J12. Table 4-5. Standard SD Socket J12 Pin Assignment Pin No Mnemonic PIO Signal Description 1 SDMMC0_DAT3_PA5 PA5 Data line 2 SDMMC0_CMD_PA1 PA1 Command/response line 3 GND - GND 4 VDDSDHC (3.3V or 1.8V) - 5 SDMMC0_CK_PA0 PA0 Clock line 6 SDMMC0_CD_PA13 PA13 Card detect 7 SDMMC0_DAT0_PA2 PA2 Data line 8 SDMMC0_DAT1_PA3 PA3 Data line 9 SDMMC0_DAT2_PA4 PA4 Data line 10 SDMMC0_DAT4_PA6 PA6 Data line 11 SDMMC0_DAT5_PA7 PA7 Data line (c) 2017 Microchip Technology Inc. User Guide Power line DS50002667A-page 17 SAMA5D27 SOM1 Kit1 Pin No Mnemonic PIO Signal Description 12 SDMMC0_DAT6_PA8 PA8 Data line 13 SDMMC0_DAT7_PA9 PA9 Data line 14 SDMMC0_WP_PA12 PA12 Write protect signal 15 GND - GND 16 GND - GND Table 4-6. SDMMC1 Power Command Mnemonic Signal Description PA11 SDMMC0_VDDSEL Select 3.3V or 1.8V SDMMC1 Card Connector (J14) A microSD card connector, connected to SDMMC1, is mounted on the top side of the baseboard. The SDMMC1 communication is based on a 6-pin interface (clock, command and four data). A card detection switch is included. The microSD connector can be used to connect any microSD card for mass storage. Figure 4-16. SDMMC1 microSD VDD_3V3 R61 R62 10K PA30 PA19 PA18 SDMMC1_CD SDMMC1_DAT1 SDMMC1_DAT0 PA22 SDMMC1_CK PA28 PA21 PA20 SDMMC1_CDA SDMMC1_DAT3 SDMMC1_DAT2 R63 10K RR3 68K 0R C56 10uF C57 100nF J14 10 SW2 8 7 6 5 4 3 2 1 SW1 4.2.6.3 PIO 9 (c) 2017 Microchip Technology Inc. User Guide 11 12 13 14 DM3AT-SF-PEJM5 DS50002667A-page 18 SAMA5D27 SOM1 Kit1 Figure 4-17. microSD Socket J14 Location The table below describes the pin assignment of microSD connector J14. Table 4-7. microSD Socket J14 Pin Assignment Pin No Mnemonic PIO Signal Description 1 SDMMC1_DAT2 PA20 Data bit 2 2 SDMMC1_DAT3 PA21 Data bit 3 3 SDMMC1_CDA PA28 Command 4 VCC - 3.3V supply voltage 5 SDMMC1_CK PA22 Clock 6 GND - Common ground 7 SDMMC1_DAT0 PA18 Data bit 0 8 SDMMC1_DAT1 PA19 Data bit 1 9 SW1 GND Ground 10 SDMMC1_CD PA30 Card detection switch 11 GND - Common ground 12 GND - Common ground (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 19 SAMA5D27 SOM1 Kit1 Pin No 4.2.6.4 Mnemonic PIO Signal Description 13 GND - Common ground 14 GND - Common ground CryptoAuthenticationTM ATECC508A is a member of the CryptoAuthentication family of crypto engine authentication devices with highly secure hardware-based key storage. The ATECC508A features a flexible command set enabling use in many applications, including network/IoT node protection, anti-counterfeiting, firmware or media protection, secure data storage and user password checking. The device (U11) is mounted in an 8-lead UDFN package. For more information, refer to the ATECC508A datasheet on www.microchip.com. Figure 4-18. CryptoAuthentication ATECC508 VDD_3V3 PD21 TWD0 5 PD22 TWCK0 6 1 2 U11 SDA SCL NC1 NC2 VCC GND NC3 NC4 8 4 3 7 C58 100nF ATECC508A Table 4-8. ATECC508 PIO Signal Descriptions PIO Mnemonic Shared Signal Description PD21 TWD0 SOM E2PROM 24AA02E48 TWI data PD22 TWCK0 SOM E2PROM 24AA02E48 TWI clock 4.2.7 Communication Interfaces This section describes the signals and connectors related to the ETH, USB and CAN communication interfaces. 4.2.7.1 Ethernet 10/100 (GMAC) Port The on-board SOM integrates a 10/100 Mbps Ethernet controller (KSZ8081RNA) allowing direct connection to any 10/100 Mbps Ethernet-based Local Area Network, for full interaction with local servers and wide area networks such as the Internet. ETH signals from the SOM are connected to a RJ45 MagJack. Additionally, for monitoring and control purposes, a LED functionality is carried on the RJ45 connector to indicate link status. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 20 SAMA5D27 SOM1 Kit1 Figure 4-19. Ethernet PHY J15 TX+ 1 TD+ 1 CT 4 2 TX- TD- 2 TX- 3 RX+ RD+ 3 RX+ CT 5 RD- 6 RX- 6 75 75 4 75 NC R69 RX+ RX- C64 100nF GND_ETH 8 470R EARTH_ETH 9 Left Green LED 10 Right yellow LED 12 VDD_3V3 TX- 8 11 15 16 EARTH_ETH TX+ 7 1nF 75 7 RXC63 100nF 5 13 14 TX+ ETH_LED0 LINK ETH_LED0 Figure 4-20. Ethernet RJ45 Connector J15 Location The table below describes the pin assignment of Ethernet connector J15. Table 4-9. Ethernet RJ45 Connector J15 Pin Assignment Pin No Mnemonic Signal Description 1 TX+ Transmit positive differential pair 2 TX- Transmit negative differential pair 3 RX+ Receive positive differential pair 4 Decoupling capacitor - (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 21 SAMA5D27 SOM1 Kit1 Pin No 4.2.7.2 Mnemonic Signal Description 5 Decoupling capacitor - 6 RX- Receive negative differential pair 7 NC - 8 EARTH / GND Common ground 9 ACT LED (A) LED activity (not used) 10 ACT LED (K) LED activity (not used) 11 LINK LED (K) LED link connection 12 LINK LED (A) LED link connection 13 EARTH / GND Common ground 14 EARTH / GND Common ground 15 NC - 16 NC - USB Interfaces The USB (Universal Serial Bus) is a hot-pluggable general-purpose high-speed I/O standard for computer peripherals. The standard defines connector types, cabling, and communication protocols for interconnecting a wide variety of electronic devices. The USB 2.0 Specification defines data transfer rates as high as 480 Mbps (also known as High Speed USB). A USB host bus connector uses 4 pins: a power supply pin (5V), a differential pair (D+ and D- pins) and a ground pin. The baseboard features three USB communication ports named USB-A to USB-C: * * * 4.2.7.3 USB-A device interface - One USB device standard micro-AB connector. - This port offers a VBUS detection function through the R81-R83 resistor ladder. - The USB-A port is used as a secondary power source and as a communication link for the baseboard, and derives power from the PC over the USB cable. In most cases, this port is limited to 500 mA. USB-B (host port B high- and full-speed interface) - One USB host type C connector. - The USB-B host port is equipped with a 500 mA high-side power switch. USB-C (High-Speed Inter-Chip/HSIC port) - One USB high-speed host port with an HSIC interface. - The port is connected to a single 2-pin header (not populated). USB-A Interface The figure below shows the USB implementation on the USB-A port terminated on a micro USB type microAB connector. The USB-A port (J17) features a VBUS insert detection function through ladder-type resistors R70 and R71. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 22 SAMA5D27 SOM1 Kit1 Figure 4-21. USB-A Type microAB Connector VBUS_USBA R70 100K 6 8 C65 20pF 7 11 10 SHD 9 USBA_VBUS_5V R71 200K PD20 C12 100nF J17 1 VBUS DM 2 3 DP 4 ID 5 GND Top/Bot Top/Bot USBA_DM USBA_DP Micro AB EARTH_USB_A Table 4-10. USB-A PIO Signal Description PIO Mnemonc Shared Signal Description PD20 USBA_VBUS_5V - VBUS insertion detection Figure 4-22. USB-A Type microAB Connector J17 Location The table below describes the pin assignment of USB-A connector J17. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 23 SAMA5D27 SOM1 Kit1 Table 4-11. USB-A Connector J17 Pin Assignment Mnemonic Signal Description 1 VBUS 5V power 2 DM Data minus 3 DP Data plus 4 ID On-the-go identification 5 GND Common ground USB-B Interface The figure below shows the USB implementation on the USB-B port terminated on USB Type C connector J19. USBB_VBUS_5V A4 A9 B9 B4 GND6 GND5 EARTH_USB_B 25 26 Figure 4-23. USB-B Type C Connector VBUS1 VBUS2 VBUS3 VBUS4 J19 TX1+ TX1RX1+ RX1TX2+ TX2RX2+ RX2D1+ D1- 27 GND7 GND1 GND2 GND3 GND4 GND8 A1 A12 B12 B1 28 4.2.7.4 Pin No D2+ D2CC1 CC2 SBU1 SBU2 USB C A2 A3 B11 B10 B2 B3 A11 A10 A6 A7 Top/Bot Top/Bot USBB_DP USBB_DM B6 B7 VDD_3V3 R78 36K R79 36K A5 B5 A8 B8 C69 330pF C70 330pF EARTH_USB_B (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 24 SAMA5D27 SOM1 Kit1 Figure 4-24. USB-B Type C Connector J19 Location The table below describes the pin assignment of USB-B connector J19. Table 4-12. USB-B Connector J19 Pin Assignment Pin No Mnemonic Signal Description A1 GND Ground return A2 SSTXp1 SuperSpeed differential pair #1, TX, positive (NOT USED) A3 SSTXn1 SuperSpeed differential pair #1, TX, negative (NOT USED) A4 VBUS Bus power A5 CC1 Configuration channel A6 DP1 USB 2.0 differential pair, position 1, positive A7 DN1 USB 2.0 differential pair, position 1, negative A8 SBU1 Sideband use (SBU) A9 VBUS Bus power A10 SSRXn2 SuperSpeed differential pair #2, RX, negative (NOT USED) A11 SSRXp2 SuperSpeed differential pair #2, RX, positive (NOT USED) A12 GND Ground return (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 25 SAMA5D27 SOM1 Kit1 Pin No Mnemonic Signal Description B12 GND Ground return B11 SSRXp1 SuperSpeed differential pair #1, RX, positive (NOT USED) B10 SSRXn1 SuperSpeed differential pair #1, RX, negative (NOT USED) B9 VBUS Bus power B8 SBU2 Sideband use (SBU) B7 DN2 USB 2.0 differential pair, position 2, negative B6 DP2 USB 2.0 differential pair, position 2, positive B5 CC2 Configuration Channel B4 VBUS Bus power B3 SSTXn2 SuperSpeed differential pair #2, TX, negative (NOT USED) B2 SSTXp2 SuperSpeed differential pair #2, TX, positive (NOT USED) B1 GND Ground return USB-B Power Switch The USB-B Host port is equipped with a 500 mA high-side power switch for self-powered and buspowered applications. If the client device is bus-powered, the carrier can supply a 5V, 500mA power to the client device. The USBB_EN_5V_PA27 signal controls the power switch and current limiter, the Microchip MIC2025, which in turn supplies power to a bus-powered client device. Per the USB specification, bus-powered USB 2.0 devices are limited to a maximum of 500 mA. The MIC2025 limits the current and indicates an overcurrent with the USBB_OVCUR_PD19 signal. Figure 4-25. USB-B Power Switch VDD_3V3 R138 10K L12 1 USBB_VBUS_5V C66 100nF C67 10uF 2 180ohm at 100MHz 8 6 U13 EN: Active High 1 EN OUT_2 OUT_1 FLG IN GND NC2 NC1 USBB_OVCUR 3 R77 10K VDD_MAIN_5V 7 C68 100nF 5 USBB_POWR_EN 2 PA27 PD19 4 MIC2025 Table 4-13. Power Switch PIO Signal Descriptions PIO Mnemonic PA27 USBB_POWR_EN USBB_EN_5V PD19 4.2.7.5 USBB_OVCUR Shared Signal Description - Power switch enable (active high) - Indicates overcurrent (open drain) HSIC Interface High-Speed Inter-Chip (HSIC) is a standard for USB chip-to-chip interconnect with a 2-signal (strobe, data) source synchronous serial interface using 240 MHz DDR signaling to provide only high-speed 480 Mbps data rate. The interface operates at high speed, 480 Mbps, and is fully compatible with existing USB software stacks. It meets all data transfer needs through a single unified USB software stack. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 26 SAMA5D27 SOM1 Kit1 The HSIC interface is connected to two-point header J18. This connector is not mounted. Figure 4-26. HSIC Interface J18 J18 2 1 Top/Bot Top/Bot HSIC_DATA HSIC_STRB DNP TSW-102-07-G-S 4.2.7.6 CAN Interface This section lists the signals related to the Controller Area Network (CAN) interface. The CAN interface transmits and receives signals from the SOM. CAN PIOs PC26 and PC27 are connected to the CAN transceiver (ATA6561) and the output signals from the transceiver are connected to the screw connector (J16) physically located on top of the baseboard. Figure 4-27. CAN Interface VDD_3V3 VDD_MAIN_5V 3 C59 100nF 2 PC26 CANTX1 1 PC27 CANRX1 4 C62 15pF R65 0R U12 VCC STBY GND CANH CANL TXD VIO RXD PAD 1 8 7 6 5 R67 62R 9 ATA6561-GBQW C61 100nF J16 2 R66 62R 3 C60 4.7uF Screw 3x1 R68 0R Figure 4-28. CAN Connector J16 Location (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 27 SAMA5D27 SOM1 Kit1 Table 4-14. CAN Connector J16 Pin Assignment Pin Mnemonic Signal Description 1 CANH Differential positive 2 CANL Differential negative 3 GND Ground 4.3 External Interfaces 4.3.1 LCD TFT Interface The baseboard provides a FPC connector with 24 bits of data and control signals to the LCD interface. Other signals are used to control the LCD and are available on connector J26: TWI, SPI, two GPIOs for interrupt, 1-wire and power supply lines. This connector is used to connect LCD display type TM43xx series or TM7000 series from PDA Inc (www.pdaatl.com). A 50-pin FPC (J26) header is provided on the baseboard to interface the LCD module with 24-bit parallel RGB. The connector provides two PIOs as interrupts, one SPI and a TWI port to interface the MaXTouch touch controller or QTouch button controller embedded on the LCD module. In order to operate correctly out of the processor with various LCD modules, two voltage lines are available: 3.3V and 5VCC (default). Both are selected by 0R resistors R81 and R83. Figure 4-29. LCD Expansion Header Interface VDD_MAIN_5V VDD_3V3 R81 R83 0R NRST J26 R85 0R PC4 PA17 PA16 PA15 PA14 PC8 PC6 PC5 PC7 LCDPWM IRQ2 IRQ1 TWCK_LCD TWD_LCD LCDDISP SPI0_NPCS0 SPI0_ MISO SPI0_ MOSI SPI0_ SPCK LCDDEN LCDHSYNC LCDVSYNC LCDPCK PC2 PC1 PC0 PB31 LCDDAT23 LCDDAT22 LCDDAT21 LCDDAT20 PB30 PB29 PB28 PB27 LCDDAT19 LCDDAT18 LCDDAT17 LCDDAT16 PB26 PB25 PB24 PB23 LCDDAT15 LCDDAT14 LCDDAT13 LCDDAT12 PB22 PB21 PB20 PB19 LCDDAT11 LCDDAT10 LCDDAT9 LCDDAT8 PB18 PB17 PB16 PB15 LCDDAT7 LCDDAT6 LCDDAT5 LCDDAT4 PB14 PB13 PB12 PB11 LCDDAT3 LCDDAT2 LCDDAT1 LCDDAT0 LCD_PWM_PC3 PC25 PD1 PA17 (c) 2017 Microchip Technology Inc. 0R DNP R119 100R User Guide 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 52 51 DS50002667A-page 28 SAMA5D27 SOM1 Kit1 Figure 4-30. LCD Connector J26 Location The table below describes the pin assignment of LCD connector J26. Table 4-15. LCD Connector J26 Pin Assignment Pin No Signal PIO Signal 1 ID PA17 ID 2 GND GND GND 3 LCDDAT0 PB11 D0 Data line (BLUE0) 4 LCDDAT1 PB12 D1 Data line (BLUE1) 5 LCDDAT2 PB13 D2 Data line (BLUE2) 6 LCDDAT3 PB14 D3 Data line (BLUE3) 7 - - GND 8 LCDDAT4 PB15 D4 Data line (BLUE4) 9 LCDDAT5 PB16 D5 Data line (BLUE5) 10 LCDDAT6 PB17 D6 Data line (BLUE6) 11 LCDDAT7 PB18 D7 Data line (BLUE7) 12 - GND GND (c) 2017 Microchip Technology Inc. RGB Interface Function Shared with SPI_NPCS0 pin 40 GND GND GND User Guide DS50002667A-page 29 SAMA5D27 SOM1 Kit1 Pin No Signal PIO Signal 13 LCDDAT8 PB19 D8 Data line (GREEN0) 14 LCDDAT9 PB20 D9 Data line (GREEN1) 15 LCDDAT10 PB21 D10 Data line (GREEN2) 16 LCDDAT11 PB22 D11 Data line (GREEN3) 17 - - GND GND 18 LCDDAT12 PB23 D12 Data line (GREEN4) 19 LCDDAT13 PB24 D13 Data line (GREEN5) 20 LCDDAT14 PB25 D14 Data line (GREEN6) 21 LCDDAT15 PB26 D15 Data line (GREEN7) 22 - GND GND GND 23 LCDDAT16 PB27 D16 Data line (RED0) 24 LCDDAT17 PB28 D17 Data line (RED1) 25 LCDDAT18 PB29 D18 Data line (RED2) 26 LCDDAT19 PB30 D19 Data line (RED3) 27 - - GND GND 28 LCDDAT20 PB31 D20 Data line (RED4) 29 LCDDAT21 PC0 D21 Data line (RED5) 30 LCDDAT22 PC1 D22 Data line (RED6) 31 LCDDAT23 PC2 D23 Data line (RED7) 32 - GND GND GND 33 LCDPCK PC7 PCLK Pixel clock 34 LCDVSYNC PC5 VSYNC/CS Vertical sync 35 LCDHSYNC PC6 HSYNC/WE Horizontal sync 36 LCDDEN PC8 DATA_ENABLE 37 SPI_SPCK PA14 SPI_SCK SPI clock 38 SPI_MOSI PA15 SPI_MOSI SPI Master OUT Slave IN 39 SPI_MISO PA16 SPI_MISO SPI Master IN Slave OUT 40 SPI_NPCS0 PA17 SPI_CS SPI chip select 41 LCDDISP PC4 ENABLE Display enable signal 42 TWD PD4 TWI_SDA I2C data line (maXTouch) 43 TWCK PD5 TWI_SCL I2C clock line (maXTouch) 44 GPIO PD1 IRQ1 (c) 2017 Microchip Technology Inc. RGB Interface Function Data enable maXTouch interrupt line User Guide DS50002667A-page 30 SAMA5D27 SOM1 Kit1 Pin No 4.3.2 Signal PIO Signal RGB Interface Function 45 GPIO PC25 IRQ2 Interrupt line for other I2C devices 46 LCDPWM PC3 PWM Backlight control 47 RESET nRST RESET Reset for both display and maXTouch 48 Main_5V/3V3 VCC VCC 3.3V or 5V supply (R81/R83 selected) 49 Main_5V/3V3 VCC VCC 3.3V or 5V supply (R81/R83 selected) 50 GND GND GND GND Image Sensor (ISC) Interface This section describes the signals and connectors related to the ISC interface. The Image Sensor Controller (ISC) system manages incoming data from a parallel or serial CSI-2 based CMOS/CCD sensor. The system supports a single active interface, as well as the ITU-R BT 656/1120 422 protocol with an 8-bit or 10-bit data width and raw Bayer format. The internal image processor includes adjustable white balance, color filter array interpolation, color correction, gamma correction, 12-bit to 10bit compression, programmable color space conversion, as well as horizontal and vertical chrominance subsampling module. Figure 4-31. ISC Interface VDD_3V3 J27 PD6 PC18 PC20 PC10 PC12 PC14 PC16 ISC_RST TWCK_ISC ISC_D1 ISC_D3 ISC_D5 ISC_D7 ISC_D9 ISC_D11 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 ISC_PWD TWD_ISC ISC_MCK ISC_VSYNC ISC_HSYNC ISC_PCK ISC_D0 ISC_D2 ISC_D4 ISC_D6 ISC_D8 ISC_D10 PD7 PC24 PC23 PC9 PC11 PC13 PC15 PC17 PC22 PC21 PC19 TSW-115-07-G-D (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 31 SAMA5D27 SOM1 Kit1 Figure 4-32. ISC Connector J27 Location The table below describes the pin assignment of ISC connector J27. Table 4-16. ISC Connector J27 Pin Assignment SAMA5D27 Function Signal Pin No Signal PIO SAMA5D27 PIO Function 3.3V power - VDD_3V3 1 2 GND - Ground 3.3V power - VDD_3V3 3 4 GND - Ground Reset PD6 ISC_RST 5 6 ISC_PWD PD7 Power down TWI clock PD5 TWCK_ISC 7 8 TWD_ISC PD4 TWI data Ground - GND 9 10 ISC_MCK PC24 Master clock Ground - GND 11 12 ISC_VSYN PC22 C Vertical sync Ground - GND 13 14 ISC_HSYN PC23 C Horizontal sync Ground - GND 15 16 ISC_PCK Clock (c) 2017 Microchip Technology Inc. User Guide PC21 DS50002667A-page 32 SAMA5D27 SOM1 Kit1 SAMA5D27 Signal Pin No Signal Function PIO Ground - GND 17 18 Data1 PC10 ISC_D1 19 Data3 PC12 ISC_D3 Data5 PC14 Data7 SAMA5D27 PIO Function ISC_D0 PC9 Data0 20 ISC_D2 PC11 Data2 21 22 ISC_D4 PC13 Data4 ISC_D5 23 24 ISC_D6 PC15 Data6 PC16 ISC_D7 25 26 ISC_D8 PC17 Data8 Data9 PC18 ISC_D9 27 28 ISC_D10 PC19 Data10 Data11 PC20 ISC_D11 29 30 GND - Ground Note: ISC and LCD share the same TWI interface. 4.3.3 RGB LED The baseboard features one RGB LED which can be controlled by the user. The three LED cathodes are controlled via GPIO PWM or timer/counter pins. Figure 4-33. RGB LED Indicators R74 2K2 3 PA10 LED_Red R134 Q8 BSS138 100R 1 D5 2 1 R75 3 PB1 LED_Green R135 100R 1 R137 10K 2K2 Q9 BSS138 4 3 VDD_3V3 Red Green Anode 2 Blue 2 RGB R76 1K 3 PA31 LED_blue R136 Q10 BSS138 100R 1 R133 10K 2 Table 4-17. RGB LED PIOs Signal PIO Function - PA10 TIOA1 LED_GREEN PWM MBUS1 PB1 PWML1 LED_BLUE PWM MBUS2 PA31 PWML0 LED_RED 4.4 Shared Debugging Capabilities The baseboard includes two main debugging interfaces to provide debug-level access to the SAMA5D2: * * One UART through USB J-Link-CDC Two JTAG interfaces, one connected from the MPU using connector J11 and one through the JLink-OB interface USB port J10 (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 33 SAMA5D27 SOM1 Kit1 4.4.1 Debug JTAG This section describes the signals and connectors related to the JTAG interface. A 10-pin JTAG header is provided on the baseboard to facilitate software development and debugging using various JTAG emulators. The interface signals have a voltage level of 3.3V. Figure 4-34. JTAG Interface VDD_3V3 R46 100K VDD_3V3 R47 100K J11 RTCK_IN R50 DNP 0R R120 10K 1 3 5 7 9 2 4 6 8 10 R51 100R R48 100K JTAG_TMS JTAG_TCK JTAG_TDO JTAG_TDI NRST FTSH-105-01-F-DV-K Figure 4-35. JTAG Connector J11 Location The table below describes the pin assignment of JTAG connector J11. Table 4-18. JTAG/ICE Connector J11 Pin Assignment Pin No Mnemonic Signal Description 1 VTref. 3.3V power This is the target reference voltage (main 3.3V). 2 TMS TEST MODE SELECT JTAG mode set input into target processor 3 GND Common ground 4 TCK TEST CLOCK - Output timing signal, for synchronizing test logic and control register access JTAG clock signal into target processor (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 34 SAMA5D27 SOM1 Kit1 Pin No Mnemonic 4.4.2 Signal Description 5 GND Common ground 6 TDO JTAG TEST DATA OUTPUT - Serial data input from the target JTAG data output from target processor 7 RTCK - Input return test clock signal from the target Some targets with a slow system clock must synchronize the JTAG inputs to internal clocks. In the present case, such synchronization is unneeded and TCK is merely looped back into RTCK. 8 TDI TEST DATA INPUT - Serial data output line, sampled on the rising edge of the TCK JTAG data input into target processor signal 9 GND Common ground 10 nRST RESET Active-low reset signal. Target processor reset signal. Embedded Debugger (J-Link-OB) Interface The baseboard includes a built-in SEGGER J-Link-On-Board device. The functionality is implemented with an ATSAM3U4C microcontroller in an LQFP100 package. The ATSAM3U4C provides JTAG functions and a bridge USB/Serial debug port (CDC). One dual LED D4 mounted on the baseboard shows the status of the J-Link-On-Board device. J-Link-OB-ATSAM3U4C was designed in order to provide an efficient, low-cost, on-board alternative to the standard J-Link. The internal J-Link-OB connects to the target only after it receives a first command; otherwise, it remains disabled. The USB J-Link-OB port is used as a secondary power source and as a communication link for the baseboard, and derives power from the PC over the USB cable. This port is limited in most cases to 500 mA. A single PC USB port is sufficient to power the baseboard. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 35 SAMA5D27 SOM1 Kit1 Figure 4-36. J-Link-OB Interface VDD_3V3_3U VDD_3V3_3U J6 ENSPI BOT TOP 7 11 VBUS DM DP ID GND J10 L9 1 1 2 3 4 5 100K 42 77 39R 80 39R 81 76 R40 R41 XIN XOUT FWUP DHSDM DFSDM DFSDP DHSDP Top/Bot Top/Bot 45 1 79 SHD 9 Micro AB 10 VBUS_JLINK 6 8 R39 VDD_3V3_3U GNDBU GNDANA GNDUTMI GNDPLL GND1 GND2 GND3 VDD_3V3_3U XIN32 XOUT32 26 TRSTIN 27 TRSTOUT R29 28 29 TRESIN 30 TRESOUT R33 31 32 33 37 38 39 RX_3U 40 TX_3U 41 TDI_IN 10 11 TMS_IN 12 13 TCK_OUT 14 TMS_OUT 17 18 TDI_OUT 19 TDO_IN 20 TCK_IN 5 21 ENSPI TCK_OUT 23 3U_PA25 24 3U_PA26 25 96 84 LED1_3U 85 LED2_3U D4 6 Red 86 RTCK_IN 0R R30 NRST 100R NRST 150R 1 Xout Y1 4 2 3 Xin 12Mhz DNP C28 8.2pF DNP C29 8.2pF DNP VDD_3V3_3U 4 C71 100nF 2 Y2 VCC OUT 12Mhz GND NC 3 R139 0R Xin 1 ASE-12.000MHZ-LC-T R42 VDD_3V3_3U 220R R43 220R Green Bi Color 46 3 82 72 35 61 89 Xin 75 Xout 74 JLINK SAM3U VBG VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 50 49 10pF 88 60 36 22 78 6K8 C27 TEST JTAGSEL VDDPLL R37 44 0R DNP 48 VDDCORE_1 VDDCORE_2 VDDCORE_3 VDDCORE_4 VDDCORE_5 VDD_3V3_3U R36 C26 10nF 87 83 9 34 59 1N4148 1 NRST NRSTB VDDOUT 2 57 C25 10nF 47 100R AD12BVREF ADVREF 73 R35 D3 PA0/PGMNCMD PA1/PGMRDY PA2/PGMNOE PA3/PGMNVALID PA4/PGMM0 PA5/PGMM1 PA6/PGMM2 PA7/PGMM3 PA8/PGMD0 PA9/PGMD1 PA10/PGMD2 PA11/PGMD3 PA12/PGMD4 PA13/PGMD5 PA14/PGMD6 PA15/PGMD7 PA16/PGMD8 PA17/PGMD9 PA18/PGMD10 PA19/PGMD11 PA20/PGMD12 PA21/PGMD13 PA22/PGMD12 PA23/PGMD15 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 ERASE VDDIN 10K 4 2 52 VDD_3V3_3U R34 43 R31 100R TDI TDO/TRACESWO TCK/SWCLK TMS/SWDIO 53 51 54 56 55 pads on PCB U4 ATSAM3U4CA-AU 90 91 92 7 8 97 98 99 100 71 70 93 94 95 69 16 15 68 67 66 65 64 63 62 58 1 2 TDI_3U TDO_3U TCK_3U TMS_3U 8 10 12 14 16 7 9 11 13 15 J8 NRST_3U PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 2 4 VDDBU VDDANA VDDUTMI 1 Side Side 3 VDDout 2 VDDout 180ohm at 100MHz EARTH0 C30 C31 C32 100nF 100nF 100nF 4.4.2.1 C33 4.7uF C34 C35 C36 100nF 100nF 100nF 100nF C40 C41 C42 C43 C44 C45 C38 C39 4.7uF100nF 100nF 100nF 100nF 100nF 100nF 100nF C37 Disabling J-Link-OB (ATSAM3U4C) Jumper J7 disables the J-Link-OB-ATSAM3U4C JTAG functionality. When the jumper is installed, it grounds pin 25 (PA26) of the ATSAM3U4C that is normally pulled high. * * Jumper J7 not installed: J-Link-OB-ATSAM3U4C is enabled and fully functional. Jumper J7 installed: J-Link-OB-ATSAM3U4C is disabled and an external JTAG controller can be used through the 10-pin JTAG port J11. Jumper JP9 disables only the J-Link functionality. The debug serial com port that is emulated through a Communication Device class (CDC) of the same USB connector remains operational (if J9 is open). Figure 4-37. Enabling/Disabling J-Link-OB and J-Link-CDC VDD_3V3_3U VDD_3V3_3U R32 10K R38 10K J7 J9 3U_PA25 3U_PA26 1 2 1 2 TSW-102-07-G-S TSW-102-07-G-S Disable JLINK CDC Disable JLINK JTAG Jumper J7 disables the JTAG functionality only. The debug serial com port that is emulated through a CDC of the same USB connector remains operational. When J7 is on and the J-Link-OB-ATSAM3U4C JTAG disabled, the JTAG function is available through connector J11. A quad analog switch (NLAS3899B) is used to select and isolate the JTAG interface. Table 4-19. J-Link-OB and J-Link-CDC Jumper J7 Settings Jumper J7 J-Link-OB JTAG MPU Open Active Inactive Closed Inactive Active (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 36 SAMA5D27 SOM1 Kit1 Table 4-20. J-Link-OB and J-Link-CDC Jumper J9 Settings Jumper J9 J-Link-CDC Open Active Closed Inactive Figure 4-38. JTAG Switch VDD_3V3_3U TDI_OUT TDI_IN R44 150R C48 100nF SOM_TDI PD28 13 14 VCC NCD 16 COMD A B IN NOD NOB C D IN COMB 12 SOM_TCK 11 R45 150R PD27 TCK_OUT TCK_IN 10 3U_PA26 NOC COMC 9 JTAG_TMS NLAS3899B 8 JTAG_TDO 5 NCB NCC 7 3 NOA COMA TDO_IN SOM_TD0 4 PD29 NCA GND 3U_PA26 2 6 JTAG_TDI 1 15 JTAG_TCK U8 SOM_TMS R49 4.4.3 PD30 TMS_OUT TMS_IN 150R Hardware UART via J-Link-CDC In addition to the J-Link-OB functionality, the ATSAM3U4C microcontroller provides a bridge to a debug serial port (UART DBGU) of the processor on a SOM board. The port is made accessible over the same USB connection used by JTAG by implementing Communication Device Class (CDC), which allows terminal communication with the target device. This feature is enabled only if microcontroller pin 24 (PIO PA25) is not grounded. The pin is normally pulled high and controlled by jumper J9. * * Jumper J9 not installed: the J-Link-CDC is enabled and fully functional. Jumper J9 installed: the J-Link-CDC device is disabled. The USB Communications Device Class (CDC) enables to convert the USB device into a serial communication device. The target device running USB-Device CDC is recognized by the host as a serial interface (USB2COM, virtual COM port) without the need to install a special host driver (since the CDC is standard). All PC software using a COM port work without modifications with this virtual COM port. Under Windows, the device shows up as a COM port; under Linux, as a /dev/ACMx device. This enables the user to use host software which was not designed to be used with USB, such as a terminal program. Figure 4-39. Debug COM Port Isolation VDD_3V3_3U 3U_PA25 1 DBGU_TXD PD3 2 3 U5 OE VCC IN OUT 5 RX_3U 4 VDD_3V3_3U GND NL17SZ126 C46 C47 100nF 100nF 1 TX_3U 2 3 U6 OE VCC IN OUT 5 4 DBGU_RXD PD2 GND NL17SZ126 (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 37 SAMA5D27 SOM1 Kit1 Table 4-21. Debug COM Port PIOs Signal Descriptions PIO Mnemonic Shared Signal Description PD2 DBGU_RXD - Receive data PD3 DBGU_TXD - Transmit data Figure 4-40. J-Link-OB and CDC USB Connector J10 Location The table below describes the pin assignment of USB connector J14. Table 4-22. USB Connector J14 Pin Assignment Pin No 4.4.3.1 Mnemonic Signal Description 1 VBUS 5V power 2 DM Data minus 3 DP Data plus 4 ID Not used 5 GND Common ground Baseboard Edge Connector This connector (J6) is used to upgrade or download code to the ATSAM3U4C microcontroller JLINK-OB. The J-Link-OB software is factory-programmed. 4.5 PIO Usage on Expansion Connectors This section describes the signals and connectors related to the PIO usage on expansion connectors. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 38 SAMA5D27 SOM1 Kit1 The baseboard includes numerous peripherals. Many of these are connected to the GPIO block so that the I/O pins can be configured to carry out many alternative functions. This provides great flexibility to select a function multiplexing scheme for the pins that satisfy the interface need for a particular application. Note that most pins are configured as GPIO inputs, with a 100 Kohm pull-up resistor, after reset. 4.5.1 PIOBU Interface The baseboard features eight tamper pins for static or dynamic intrusion detection, UART reception, and two analog pins for comparison. For a description of intrusion detection, refer to the SAMA5D2 datasheet, chapter "Security Module". Figure 4-41. PIOBU Connector J31 PIOBU2 PIOBU4 PIOBU6 PIOBU7 COMPN R110 R112 R114 R116 R118 330R 330R 330R 330R 0R 1 3 5 7 9 2 4 6 8 10 R111 R113 R115 R117 330R 330R 0R 0R PIOBU3 PIOBU5 RXD COMPP FTS-105-01-L-DV Figure 4-42. PIOBU Connector J31 Location The table below describes the pin assignment of PIOBU connector J31. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 39 SAMA5D27 SOM1 Kit1 Table 4-23. PIOBU Connector J31 Pin Assignment Signal 4.5.2 Pin No. Signal PIOBU2 1 2 PIOBU3 PIOBU4 3 4 PIOBU5 PIOBU6 5 6 RXD PIOBU7 7 8 COMPP COMPN 9 10 GND mikroBUS Interfaces The SAMA5D27 SOM1 Kit1 hosts two pairs of 8-pin female headers acting as mikroBus interfaces. The mikroBUS standard defines the main board sockets and add-on boards (a.k.a. "click boards") used for interfacing microprocessors with integrated modules with proprietary pin configuration and silkscreen markings. The pinout consists of three groups of communication pins (SPI, UART and TWI), four additional pins (PWM, interrupt, analog input and reset) and two power groups (+3.3V and GND on the left, and 5V and GND on the right 1x8 header). Figure 4-43. mikroBUS1 Interface Connectors VDD_3V3 J22 VDD_MAIN_5V 2 1 R80 0R DNP TSW-102-07-G-S J24 PD25 PB2 (c) 2017 Microchip Technology Inc. AN_mBUS1 RST_mBUS1 NPCS1 SPCK_mBUS1 MISO_mBUS1 MOSI_mBUS1 1 2 3 4 5 6 7 8 J25 PB1 PB0 PB3 PB4 PWM_mBUS1 INT_mBUS1 RX_mBUS1 TX_mBUS1 TWCK_mBUS1 TWD_mBUS1 User Guide 1 2 3 4 5 6 7 8 DS50002667A-page 40 SAMA5D27 SOM1 Kit1 Figure 4-44. mikroBUS1 Connectors J24 and J25 Location The table below describes the pin assignment of mikroBUS1 connectors J24 and J25. Table 4-24. mikroBUS1 Connectors J24 and J25 Pin Assignment SAMA5D27 SAMA5D27 Function PIO J24 Signal J25 Signal PIO Function Analog input PD25 AN 1 1 PWM PB1 PWM Reset PB2 RST 2 2 RST PB0 Interrupt SPI clock PD0 SPCK 3 3 RX PB3 UART receive SPI MISO PC30 MISO 4 4 TX PB4 UART transmit SPI MOSI PC29 MOSI 5 5 TWCK PA23 TWI clock SPI chip select PC28 NPCS 6 6 TWD PA24 TWI data 3.3VCC - 3.3V 7 7 +5V NC 5V supply GROUND - GND 8 8 GND _ GROUND (c) 2017 Microchip Technology Inc. Pin No. User Guide DS50002667A-page 41 SAMA5D27 SOM1 Kit1 Figure 4-45. mikroBUS2 Interface Connectors VDD_3V3 J28 VDD_MAIN_5V 2 1 R109 0R DNP TSW-102-07-G-S J29 PD26 PA26 AN_mBUS2 RST_mBUS2 NPCS0 SPCK_mBUS2 MISO_mBUS2 MOSI_mBUS2 1 2 3 4 5 6 7 8 J30 PA31 PA25 PD23 PD24 PWM_mBUS2 INT_mBUS2 RX_mBUS2 TX_mBUS2 TWCK_mBUS2 TWD_mBUS2 1 2 3 4 5 6 7 8 Figure 4-46. mikroBUS2 Interface Connectors J29 and J30 Location The table below describes the pin assignment of mikroBUS2 connectors J29 and J30. Table 4-25. mikroBUS2 Connectors J29 and J30 Pin Assignment SAMA5D27 SAMA5D27 Function PIO J29 Signal J30 Signal PIO Function Analog input PD26 AN 1 1 PWM PA31 PWM Reset PA26 RST 2 2 RST PA25 Interrupt SPI clock PC31 SPCK 3 3 RX PD23 UART receive SPI MISO PC30 MISO 4 4 TX PD24 UART transmit SPI MOSI PC29 MOSI 5 5 TWCK PA23 TWI clock SPI chip select PC28 NPCS 6 6 TWD PA24 TWI data 3.3VCC - 3.3V 7 7 +5V NC 5V supply GROUND - GND 8 8 GND _ GROUND (c) 2017 Microchip Technology Inc. Pin No. User Guide DS50002667A-page 42 SAMA5D27 SOM1 Kit1 4.5.3 Pmod Interface Pmod devices are Digilent's line of small I/O interface boards that offer an ideal way to extend the capabilities of programmable logic and embedded control boards. They allow sensitive signal conditioning circuits and high-power drive circuits to be placed where they are most effective - near sensors and actuators. The Pmod interface on the baseboard is a 6-pin connector. The 6-pin version provides four digital I/O signal pins, one power pin and one ground pin. Note: The Pmod interface is shared with the ISC interface. Thus, the ISC and Pmod interfaces cannot be used at the same time. Figure 4-47. Pmod Interface Connector VDD_3V3 J21 PMOD_1 PMOD_2 PMOD_3 PMOD_4 1 2 3 4 5 6 SSQ-106-02-G-S-RA Figure 4-48. Pmod Connector J21 Location 4.5.3.1 Pmod Configuration A set of jumpers, J20 and J23, is used to configure this type of interface. The table below describes the jumper configuration to select one of the Pmod functions (SPI, TWI or USART). (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 43 SAMA5D27 SOM1 Kit1 Figure 4-49. Pmod Jumper Configuration Flexcom3_IO2_SPCK PC18 PC18 R82 39R PC19 PC19 R84 22R Flexcom3_IO1_MISO PC20 PC20 R86 22R Flexcom3_IO0_MOSI PC21 PC21 R87 22R Flexcom3_IO3_NPCS0 PC22 PC22 R88 22R Flexcom3_IO4_NPCS1 PMOD_3 Flexcom3_IO1_MISO PMOD_2 Flexcom3_IO0_MOSI PMOD_1 Flexcom3_IO3_NPCS0 J20 1 2 3 4 5 6 TSW-106-07-G-S Flexcom3_IO2_SPCK 1 PMOD_4 2 Flexcom3_IO4_NPCS1 3 J23 TSW-103-07-G-S Figure 4-50. Pmod Jumpers J20 and J23 Location Table 4-26. Pmod Configuration Mode Jumper J20 Jumper J23 Selected Function 1-2, 3-4, 5-6 1-2 SPI 2-3, 4-5 - TWI 1-2, 3-4, 5-6 2-3 USART (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 44 SAMA5D27 SOM1 Kit1 5. Installation and Operation 5.1 System and Configuration Requirements The SAMA5D27 SOM1 Kit1 requires the following: * * 5.2 Personal Computer USB cable (included in the kit box) Baseboard Setup Follow these steps to verify proper operation of the kit: 1. 2. 3. 4. 5. 6. Unpack the baseboard, taking care to avoid electrostatic discharge. Check the default jumper settings. Connect the USB Micro-AB cable to connector J10 (JLINK-OB). Connect the other end of the cable to a free port of your PC. Open a terminal (console 115200, N, 8, 1) on your Personal Computer. Reset the baseboard. A startup message appears on the console. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 45 SAMA5D27 SOM1 Kit1 6. Errata 6.1 Incorrect NRST and WKUP Push Button Markings The PCB silkscreen markings for push buttons PB1 (NRST) and PB2 (WKUP) were inverted. PB1/NRST is actually located to the left of PB2/WKUP, as shown in the figure below. However, the produced baseboards have been patched with stickers, which currently convey correct information to the user. This information is given in case the stickers get removed and/or to clarify the actual baseboards' appearance versus the design files printouts. Figure 6-1. NRST Push Button Location NRST (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 46 SAMA5D27 SOM1 Kit1 7. Appendix: Schematics and Layouts This appendix contains the following schematics and layouts: * Title and Revision History * Block Diagram * PIO Muxing Table * Power Supply * SAMA5D27 - SOM * JTAG and DBGU * SD and QSPI * Ethernet and USB * Expansion and Connectors Figure 7-1. Title and Revision History 5 4 D 2 SHEET NAME DATE REVISION 01 Title & Revision History 6 Mar 2017 SAMA5D27-SOM-BB_ 02 Block Diagram 10 Aug 2017 SAMA5D27-SOM1-EK1_REVB 03 PIO Muxing 04 Power Supply 05 SAMA5D27SOM 06 JTAG & DBUG 07 SD & QSPI 08 Ethernet & USB 09 Expansion & Connectors 1 Revision History Schematic: SAMA5D27-SOM1-EK1 SHEET 3 REVA DESCRIPTION Prototype Release D New Release C C B B A A B A REV Title & Revision History RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 1 9 1 DS50002667A-page 47 SAMA5D27 SOM1 Kit1 Figure 7-2. Block Diagram 5 4 3 2 1 Sheet 4 Push Buttons D Reset WAKE UP 5V INPUT POWER Sheet 8 Sheet 4 USB A,B,C Power rails PIO USB DEVICE Embedded debugger JTAG MICROCHIP ATSAMA5D27-SOM1 C PIO A SD/MMC0 Card Interface PIO B QSPI Sheet 4 PMU or Super Cap USB B Host USB C HSIC Sheet 8 User LEDs Push Buttons D USB A OTG 5V INPUT VBAT JTAG Connector C Sheet 6 SD/MMC1 SD Card interface PIO A Sheet 7 B PIO A,B,C,D ISC mikroBUS LCD Connector Connector 1&2 Ethernet CAN interface 10/100M bps Pmod Sheet 8 Sheet 9 A B PIO A,B,C,D A B A REV Block Diagram RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 2 9 1 DS50002667A-page 48 SAMA5D27 SOM1 Kit1 Figure 7-3. PIO Muxing Table 5 4 3 2 1 PIO Muxing & Jumper setting PIOA USAGE LCD D C B A PIOA USAGE USAGE PIOB PIOB USAGE PIOC USAGE PA0 SDMMC0_CK PA16 SPI0_ MISO PB0 INT_mBUS1 PB16 LCDDAT5 PC0 LCDDAT21 NC 1 PA1 SDMMC0_CDA PA17 SPI0_NPCS0 PB1 LED_Green/PWM_mBUS1 PB17 LCDDAT6 PC1 LCDDAT22 GND 2 PA2 SDMMC0_DA0 PA18 SDMMC1_DAT0 PB2 RST_mBUS1 PB18 LCDDAT7 PC2 LCDDAT23 LCDDAT0 3 PA3 SDMMC0_DA1 PA19 SDMMC1_DAT1 PB3 RX_mBUS1 PB19 LCDDAT8 PC3 LCDPWM LCDDAT1 4 PA4 SDMMC0_DA2 PA20 SDMMC1_DAT2 PB4 TX_mBUS1 PB20 LCDDAT9 PC4 LCDDISP LCDDAT2 LCDDAT10 PC5 LCDVSYNC 5 PA5 SDMMC0_DA3 PA21 SDMMC1_DAT3 PB5 QSPI1_SCK PB21 LCDDAT3 6 PA6 SDMMC0_DA4 PA22 SDMMC1_CK PB6 QSPI1_CS PB22 LCDDAT11 PC6 GND 7 PA7 SDMMC0_DA5 PA23 TWCK_mBUS1&2 PB7 QSPI1_IO0 PB23 LCDDAT12 PC7 LCDPCK LCDDAT4 8 PA8 SDMMC0_DA6 PA24 TWD_mBUS1&2 PB8 QSPI1_IO1 PB24 LCDDAT13 PC8 LCDDEN LCDDAT5 9 PA9 SDMMC0_DA7 PA25 INT_mBUS2 PB9 QSPI1_IO2 PB25 LCDDAT14 PC9 ISC_D0 LCDDAT6 10 PA10 PB10 QSPI1_IO3 PB26 LCDDAT15 PC10 ISC_D1 PB11 LCDDAT0 PB27 LCDDAT16 PC11 ISC_D2 LCDDAT1 PB28 LCDDAT17 PC12 ISC_D3 User Button PB13 LCDDAT2 PB29 LCDDAT18 PC13 ISC_D4 PA30 SDMMC1_CD PB14 LCDDAT3 PB30 LCDDAT19 PC14 ISC_D5 PA31 LED_blue/PWM_mBUS2 PB15 LCDDAT4 PB31 LCDDAT20 PC15 ISC_D6 PA11 12 PA12 SDMMC0_WP PA28 LCDDAT8 13 PA13 SDMMC0_CD PA29 LCDDAT9 14 PA14 SPI0_ SPCK LCDDAT10 15 PA15 SPI0_ MOSI LCDDAT11 16 GND 17 LCDDAT12 18 LCDDAT13 19 PC16 LCDDAT14 20 PC17 LCDDAT15 21 PC18 GND 22 PC19 LCDDAT16 23 PC20 LCDDAT17 24 LCDDAT18 25 LCDDAT19 LCDHSYNC PB12 11 LED_Red SDMMC0_VDDSEL PA26 LCDDAT7 GND PA27 RST_mBUS2 USBB_POWR_EN SDMMC1_CDA D C PIOC USAGE PIOD USAGE ISC_D7 PD0 ISC_D8 PD1 ISC_D9 PD2 ISC_D10 PD3 ISC_D11 PD4 PC21 ISC_PCK PC22 ISC_VSYNC 26 PC23 ISC_HSYNC GND 27 PC24 LCDDAT20 28 LCDDAT21 29 LCDDAT22 30 PC27 LCDDAT23 31 PC28 GND 32 PC29 LCDPCK PIOD USAGE JUMPER DESCRIPTION NPCS1_mBUS2 PD16 NA IRQ1 PD17 NA DBGU_RXD PD18 NA J1 CLOSE I VDD_MAIN_5V Measurement DBGU_TXD PD19 USBB_OVCUR J2 CLOSE I VDD_3V3 Measurement TWD_LCD_ISC PD20 USBA_VBUS_5V J4 CLOSE I VDDBU Measurement PD5 TWCK_LCD_ISC PD21 TWD0 J7 OPEN Disable JLINK JTAG PD6 ISC_RST PD22 TWCK0 J8 OPEN ERASE SAM3U PD7 ISC_PWD PD23 RX_mBUS2 OPEN Disable JLINK CDC ISC_MCK PD8 BB_PWR_GOOD PD24 TX_mBUS2 J9 J13 PC25 IRQ2 PD9 NA PD25 AN_mBUS1 J22 OPEN CLOSE PC26 CANTX1 PD10 NA PD26 AN_mBUS2 POWER SELECT J28 CLOSE CANRX1 PD11 NA PD27 SOM_TCK POWER SELECT MOSI_mBUS1&2 PD12 NA PD28 MISO_mBUS1&2 PD13 NA PD29 SOM_TD0 33 PC30 SPCK_mBUS1&2 PD14 NA PD30 SOM_TMS PC31 NPCS0_mBUS1 PD15 NA PD31 NA LCDVSYNC 34 LCDHSYNC 35 LCDDEN 36 SPI0_ SPCK 37 SPI0_ MOSI 38 SPI0_ MISO 39 SPI0_NPCS0 40 LCDDISP 41 TWD1 42 TWCK1 43 IRQ1 44 IRQ2 45 LCDPWM NRST 46 VCC 48 VCC 49 GND 50 PART DEFAULT FUNCTION Disable boot SOM_TDI B A 47 B A REV PIO Muxing RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 3 9 1 DS50002667A-page 49 SAMA5D27 SOM1 Kit1 Figure 7-4. Power Supply 5 4 3 2 1 J2 TSW-102-07-G-S 1 2 VDDIN_3V3 1 J1 TSW-102-07-G-S 8 3 C1 100nF R3 10K 2 5 R4 1 C9 100nF Q2-1 7 8 6 3 DMP2160 R8 100K 25 5 8 C3 10uF 3 6 9 100R C7 4.7uF R130 0R R16 VBUS_USBA C5 10uF C2 10uF R1 100K 21 10K PVIN1 PVIN2 PVIN3 4 R7 DNP 10K R10 10K R17 DNP 0R DMP2160 5 VOUT2 R15 R12 100K DNP 19 EN1 R19 DNP 0R PD8 16 15 10K VOUT3 R13 VDD_MAIN_5V VOUT2 MIC23451 1 R6 301K 1uH 17 FB2 C8 4.7uF R131 13 10K 7 12 SW3 SNS3 EN3 1 1uH R11 309K 14 FB3 VDD_3V3 L8 R14 71K5 PG3 C DNP 0R 3 Q7 BSS138 1 2 J4 TSW-102-07-G-S Q6 BSS138 1 2 VDDBU D1 2 2 R20 D2 3 1 100R RB160M-60TR + C14 PB3 1 2 10K L7 180ohm at 100MHz C10 4.7uF VDD_3V3 R127 2 R128 10K 3 SHDN L5 180ohm at 100MHz R9 158K PG2 1 2 10 27 R129 100K 4 18 SW2 SNS2 VDD_SDHC_1V8 L6 EN2 BB_PWR_GOOD D 2 R5 71K5 PG1 VDDBU R132 100K L2 180ohm at 100MHz C6 4.7uF VOUT3 DNP 10K R18 C 20 1 R2 309K 1uH 23 FB1 VDD_SDHC_3V3 L3 26 22 SW1 SNS1 AVIN1 AVIN2 AVIN3 VOUT1 Q2-2 2 VOUT1 U1 4 AGND1 AGND2 EP1 C4 100nF VDD_MAIN_5V Q1-2 DMP2160 7 6 2 11 24 28 1 PGND1 PGND2 PGND3 EP2 Q1-1 DMP2160 VBUS_JLINK 1 2 D L1 180ohm at 100MHz C13 100nF BAT54C 0.2F/3.3V POWER ON B (Super)-Capacitor energy storage OPTIONAL B VDD_SDHC_3V3 VDD_SDHC_1V8 VDDSDHC VDDBU R21 DNP 0R R22 DNP 0R Z1 11.1 11.1 MH3 PTH MH4 PTH 4 PB2 WAKE UP PA11 1 SDMMC0_VDDSEL R26 10K D S1 1 5 R25 0R Through Holes IN A IN=0: S1 Closed IN=1: S2 Closed ADG849 3 100R 1 R121 10K R24 S2 GND 6 WKUP Z4 11.1 MH2 PTH 1 U2 VDDBU A Z3 Z2 11.1 MH1 PTH 1 NRST C15 100nF VDD NRST VDD_3V3 PB1 100R 2 R126 100K DNP R23 System Button B A REV Power Supply RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 4 9 1 DS50002667A-page 50 SAMA5D27 SOM1 Kit1 Figure 7-5. SAMA5D27 - SOM 5 4 3 U3D U3A PA00 PA01 PA02 PA03 PA04 PA05 PA06 PA07 PA08 PA09 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 D 80 SDMMC0_CK 76 SDMMC0_CDA 83 SDMMC0_DA0 81 SDMMC0_DA1 84 SDMMC0_DA2 85 SDMMC0_DA3 86 SDMMC0_DA4 79 SDMMC0_DA5 78 SDMMC0_DA6 77 SDMMC0_DA7 82 LED_Red 87 SDMMC0_VDDSEL 92 SDMMC0_WP 91 SDMMC0_CD 111 SPI0_ SPCK 109 SPI0_ MOSI 112 SPI0_ MISO 108 SPI0_NPCS0 105 SDMMC1_DAT0 101 SDMMC1_DAT1 104 SDMMC1_DAT2 103 SDMMC1_DAT3 106 SDMMC1_CK 102 TWCK_mBUS1&2 99 TWD_mBUS1&2 97 INT_mBUS2 100 RST_mBUS2 90 USBB_POWR_EN 95 SDMMC1_CDA 96 User Button 94 SDMMC1_CD 93 PD00 PD01 PD02 PD03 PD04 PD05 PD06 PD07 PD08 PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 PA16 PA17 PA18 PA19 PA20 PA21 PA22 PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 121 113 23 24 27 21 22 25 28 2 NPCS1_mBUS2 IRQ1 DBGU_RXD DBGU_TXD TWD_LCD_ISC TWCK_LCD_ISC ISC_RST ISC_PWD BB_PWR_GOOD PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 1 VDDIN_3V3 16 17 C16 2.2uF DNP VDDBU C19 2.2uF DNP VDDIN_3V3 C17 100nF C18 100nF 55 C20 100nF 15 LED_blue PA31 PWM_mBUS2 PA31 PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PD28 PD29 PD30 58 57 19 20 30 29 110 34 53 51 52 54 USBB_OVCUR USBA_VBUS_5V TWD0 TWCK0 RX_mBUS2 TX_mBUS2 AN_mBUS1 AN_mBUS2 SOM_TCK SOM_TDI SOM_TD0 SOM_TMS PD19 PD20 PD21 PD22 PD23 PD24 PD25 PD26 PD27 PD28 PD29 PD30 VDDSDHC C21 2.2uF DNP C22 100nF C23 2.2uF DNP C24 100nF 65 U3F VDDIN_3V3_1 VDDIN_3V3_2 GND_0 GND_1 GND_2 GND_3 GND_4 GND_5 GND_6 GND_7 GND_8 GND_9 GND_10 GND_11 GND_12 GND_13 GND_14 GND_15 GND_16 GND_17 GND_18 GND_19 GND_20 GND_21 GND_22 GND_23 GND_24 VDDBU VDDISC VDDSDHC 1 10 18 26 31 39 42 43 50 56 62 66 69 72 75 88 89 98 107 130 131 149 166 171 176 D ATSAMA5D27-SOM1 ATSAMA5D27-SOM1 ATSAMA5D27-SOM1 U3B PB00 PB01 PB02 PB03 PB04 PB05 PB06 PB07 PB08 PB09 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 C B LED_Green 119 122 124 123 125 134 127 133 128 132 135 148 151 155 150 162 154 157 152 158 156 164 161 160 168 159 169 163 167 144 165 143 INT_mBUS1 145 141 146 142 136 137 140 139 138 2 9 175 3 4 8 12 174 5 172 6 14 7 11 170 13 173 115 114 117 118 120 116 LCDDAT21 LCDDAT22 LCDDAT23 LCDPWM LCDDISP LCDVSYNC LCDHSYNC LCDPCK LCDDEN ISC_D0 ISC_D1 ISC_D2 ISC_D3 ISC_D4 ISC_D5 ISC_D6 ISC_D7 ISC_D8 ISC_D9 ISC_D10 ISC_D11 ISC_PCK ISC_VSYNC ISC_HSYNC ISC_MCK IRQ2 CANTX1 CANRX1 MOSI_mBUS1&2 MISO_mBUS1&2 SPCK_mBUS1&2 NPCS0_mBUS1 RST_mBUS1 RX_mBUS1 TX_mBUS1 QSPI1_SCK QSPI1_CS QSPI1_IO0 QSPI1_IO1 QSPI1_IO2 QSPI1_IO3 LCDDAT0 LCDDAT1 LCDDAT2 LCDDAT3 LCDDAT4 LCDDAT5 LCDDAT6 LCDDAT7 LCDDAT8 LCDDAT9 LCDDAT10 LCDDAT11 LCDDAT12 LCDDAT13 LCDDAT14 LCDDAT15 LCDDAT16 LCDDAT17 LCDDAT18 LCDDAT19 LCDDAT20 PB0 PB1 PWM_mBUS1 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 PB25 PB26 PB27 PB28 PB29 PB30 PB31 C SHDN J32 TSW-101-07-G-S 1 SHDN DNP WKUP J5 TSW-101-07-G-S 1 A PC00 PC01 PC02 PC03 PC04 PC05 PC06 PC07 PC08 PC09 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 PC0 PC1 PC2 PC4 PC5 PC6 PC7 PC8 PC9 PC10 PC11 PC12 PC13 PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 60 RXD 32 61 DNP DISABLE_BOOT TX+ TXRX+ RXETH_LED0 PC3 R27 39R 49 NRST ATSAMA5D27-SOM1 U3C 35 126 41 40 38 37 36 U3E SHDN USBA_DM USBA_DP WKUP USBB_DM USBB_DP NRST DATA STROBE RXD COMPP COMPN CLK_AUDIO DIS_BOOT PIOBU1 PIOBU2 PIOBU3 PIOBU4 PIOBU5 PIOBU6 PIOBU7 ETH-TXP ETH-TXM ETH-RXP ETH-RXM ETH-LED0 LCD_PWM_PC3 RFU0 RFU1 RFU2 R28 10K 67 68 USBA_DM USBA_DP 70 71 USBB_DM USBB_DP 74 73 HSIC_DATA HSIC_STRB 63 64 COMPP COMPN 33 44 48 47 46 59 45 PIOBU1 PIOBU2 PIOBU3 PIOBU4 PIOBU5 PIOBU6 PIOBU7 B 129 147 153 ATSAMA5D27-SOM1 A B A REV ATSAMA5D27-SOM1 SAMA5D27SOM RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 5 9 1 DS50002667A-page 51 SAMA5D27 SOM1 Kit1 Figure 7-6. JTAG and DBGU 5 4 3 2 1 JLINK-OB interface VDD_3V3_3U J6 VDD_3V3_3U ENSPI BOT TOP 78 50 49 Xin 75 Xout 74 VDD_3V3_3U R39 SHD ID GND 7 11 1 2 3 4 5 VBUS DM DP J10 L9 77 39R 80 39R 81 76 VBG XIN32 XOUT32 XIN XOUT FWUP DHSDM DFSDM DFSDP DHSDP Top/Bot Top/Bot 45 1 79 9 Micro AB 10 VBUS_JLINK 6 8 C 42 100K R40 R41 JLINK SAM3U TEST JTAGSEL VDD_3V3_3U 1 GNDBU GNDANA GNDUTMI GNDPLL GND1 GND2 GND3 44 0R DNP 48 6K8 10pF VDDIO_1 VDDIO_2 VDDIO_3 VDDIO_4 C27 3U_PA26 R30 100R NRST 1 2 NRST 150R TSW-102-07-G-S 1 Xout Y1 4 2 C28 8.2pF DNP 3 Disable JLINK JTAG Xin C29 8.2pF DNP 12Mhz DNP VDD_3V3_3U VDD_3V3_3U 4 C71 100nF Y2 VCC OUT 12Mhz 2 GND NC 3 R139 0R Xin R38 10K 1 ASE-12.000MHZ-LC-T J9 3U_PA25 R42 VDD_3V3_3U 220R R43 220R 1 2 TSW-102-07-G-S Green Bi Color VDDout 180ohm at 100MHz C30 C31 C32 C33 4.7uF 100nF 100nF 100nF C37 C34 C35 C36 100nF 100nF 100nF 100nF VDD_3V3_3U C44 C42 C43 C45 C40 C41 C38 C39 4.7uF100nF 100nF 100nF 100nF 100nF 100nF 100nF 3U_PA25 1 R44 1 100nF TX_3U SOM_TDI R47 100K RTCK_IN R50 1 3 5 7 9 DNP 0R 2 4 6 8 10 R51 100R 5 RX_3U 4 VDD_3V3_3U GND C46 13 U6 C47 OE VCC IN OUT B 5 4 DBGU_RXD 150R PD27 TCK_OUT TCK_IN 9 COMC NCC SOM_TCK R45 Debug Com Port isolation NLAS3899B 150R JTAG_TMS PD30 TMS_OUT TMS_IN A JTAG switches B A REV JTAG Interface JTAG & DBUG RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 PD2 GND 10 3U_PA26 SOM_TMS JTAG_TMS JTAG_TCK JTAG_TDO JTAG_TDI NRST 2 3 NCD 16 15 14 COMB 12 11 R48 100K FTSH-105-01-F-DV-K R120 10K C D IN R49 J11 A NOD NOB 8 JTAG_TDO R46 100K VDD_3V3 OUT NL17SZ126 COMD A B IN 5 VDD_3V3 VCC COMA SOM_TD0 4 NCA NCB PD29 3 NOC TDO_IN GND 3U_PA26 2 100nF 7 C51 C50 2.2uF MIC5528 6 JTAG_TDI 1 NOA U8 VDD_3V3_3U 3 4 IN 100nF 100nF C48 VDD_MAIN_5V C49 2.2uF VCC 150R JTAG_TCK 1 2 5 7 OE VDD_3V3_3U TDI_OUT TDI_IN PD28 VIN VOUT1 VOUT2 GND NC EN EP U5 NL17SZ126 90 ohms differential trace impedance U7 2 3 Max trace-length mismatch between USB signals pairs should be no greater than 3.8mm 6 DBGU_TXD PD3 Routing USB B C Disable JLINK CDC VDDout 2 EARTH0 D J7 0R 46 3 82 72 35 61 89 R37 AD12BVREF ADVREF 88 60 36 22 VDD_3V3_3U R36 C26 10nF ERASE VDDPLL 1 1N4148 26 TRSTIN 27 TRSTOUT R29 28 29 TRESIN 30 TRESOUT R33 31 32 33 37 38 39 RX_3U 40 TX_3U 41 TDI_IN 10 11 TMS_IN 12 13 TCK_OUT 14 TMS_OUT 17 18 TDI_OUT 19 TDO_IN 20 TCK_IN 5 21 ENSPI TCK_OUT 23 3U_PA25 24 3U_PA26 25 96 84 LED1_3U 85 LED2_3U D4 6 Red 86 RTCK_IN PA0/PGMNCMD PA1/PGMRDY PA2/PGMNOE PA3/PGMNVALID PA4/PGMM0 PA5/PGMM1 PA6/PGMM2 PA7/PGMM3 PA8/PGMD0 PA9/PGMD1 PA10/PGMD2 PA11/PGMD3 PA12/PGMD4 PA13/PGMD5 PA14/PGMD6 PA15/PGMD7 PA16/PGMD8 PA17/PGMD9 PA18/PGMD10 PA19/PGMD11 PA20/PGMD12 PA21/PGMD13 PA22/PGMD12 PA23/PGMD15 PA24 PA25 PA26 PA27 PA28 PA29 PA30 PA31 NRST NRSTB VDDCORE_1 VDDCORE_2 VDDCORE_3 VDDCORE_4 VDDCORE_5 D3 2 4 2 57 C25 10nF 47 100R VDDOUT R35 10K 87 83 9 34 59 VDD_3V3_3U R34 43 R31 100R VDDIN pads on PCB R32 10K TDI TDO/TRACESWO TCK/SWCLK TMS/SWDIO 73 51 54 56 55 VDD_3V3_3U PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 PB17 PB18 PB19 PB20 PB21 PB22 PB23 PB24 1 2 TDI_3U TDO_3U TCK_3U TMS_3U U4 ATSAM3U4CA-AU 90 91 92 7 8 97 98 99 100 71 70 93 94 95 69 16 15 68 67 66 65 64 63 62 58 J8 NRST_3U 8 10 12 14 16 52 D 2 4 VDDBU VDDANA VDDUTMI 7 9 11 13 15 53 1 Side Side 3 6 9 1 DS50002667A-page 52 SAMA5D27 SOM1 Kit1 Figure 7-7. SD and QSPI 5 4 VDD_3V3 2 QSPI Flash D R53 10K 3 R54 10K VDDSDHC D QSPI1_IO0 5 PB8 QSPI1_IO1 2 PB9 QSPI1_IO2 3 PB10 QSPI1_IO3 7 U9 SI/SIO0 VCC SO/SIO1 GND SIO2 CS# SIO3 SCLK VDD_3V3 R52 0R VDD_3V3 PB7 1 8 4 C52 100nF 1 CS_QSPI1 6 QSPI1_SCK MX25L25673GM2I-08G DNP R56 RR1 10K 68K PB5 PA12 SDMMC0_WP PA3 PA2 PA13 PA0 SDMMC0_DA1 SDMMC0_DA0 SDMMC0_CD SDMMC0_CK PA1 PA5 PA4 SDMMC0_CDA SDMMC0_DA3 SDMMC0_DA2 PA6 PA7 PA8 PA9 SDMMC0_DA4 SDMMC0_DA5 SDMMC0_DA6 SDMMC0_DA7 RR2 68K R57 10K C53 10uF R58 10K 8 7 6 5 4 3 2 1 9 C54 100nF 16 15 14 J12 13 12 11 10 SD/MMCPlus CARD Disable boot C C VDD_3V3 SD/MMC0 Card Interface J13 1 2 R59 10K TSW-102-07-G-S VDD_3V3 (SOM) DISABLE_BOOT 1 PB6 PB6 2 QSPI1_CS 3 U10 OE VCC IN OUT R60 10K 5 CS_QSPI1 4 C55 100nF GND NL17SZ125 DNP VDD_3V3 R61 B R62 10K R63 10K RR3 68K 0R B C57 100nF C56 10uF J14 VDD_3V3 PD21 TWD0 PD22 TWCK0 5 6 1 2 U11 SDA SCL NC1 NC2 VCC GND NC3 NC4 8 4 3 7 C58 100nF PA30 PA19 PA18 SDMMC1_CD SDMMC1_DAT1 SDMMC1_DAT0 PA22 SDMMC1_CK PA28 PA21 PA20 SDMMC1_CDA SDMMC1_DAT3 SDMMC1_DAT2 10 SW2 8 7 6 5 4 3 2 1 SW1 Crypto Authentication 9 11 12 13 14 DM3AT-SF-PEJM5 SDMMC1 SD Card interface ATECC508A A A B A REV SD & QSPI RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 7 9 1 DS50002667A-page 53 SAMA5D27 SOM1 Kit1 Figure 7-8. Ethernet and USB 5 4 L10 1 2 R64 3 2 180ohm at 100MHz VDD_3V3 VDD_MAIN_5V GND_ETH EARTH_ETH 1 D J15 TX+ 2 TX- TD+ CT 4 TD- 2 RX+ RD+ 3 CT 5 6 RX- RD- 6 NC 7 75 75 3 1 3 4 TX+ TX- RXC63 100nF 75 2 PC26 CANTX1 1 PC27 CANRX1 4 C62 15pF RX+ VCC STBY GND CANH CANL TXD VIO RXD PAD 1 8 5 R67 62R 9 ATA6561-GBQW C61 100nF J16 2 R66 62R 7 6 3 C60 4.7uF RX- C64 100nF CAN Interface 8 Right yellow LED EARTH_ETH Left Green LED R74 2K2 9 11 10 12 3 VDD_3V3 C R69 ETH_LED0 LINK 470R PA10 ETH_LED0 LED_Red R134 LED Q8 BSS138 100R 1 2 VBUS_USBA R70 100K 6 8 9 B SHD ID GND 1 2 3 4 5 Top/Bot Top/Bot R75 GND6 GND5 VBUS1 VBUS2 VBUS3 VBUS4 TX1+ TX1- TX2+ TX2RX2+ RX2- USB B D1+ D1- 27 D2+ D2CC1 CC2 SBU1 SBU2 USB C 28 GND7 GND1 GND2 GND3 GND4 GND8 A1 A12 B12 B1 Anode 2 Blue 2 RGB R76 PA31 USBA_DM USBA_DP LED_blue J18 1K Top/Bot Top/Bot R136 R133 10K HSIC_DATA HSIC_STRB Q10 BSS138 100R 1 2 User Button DNP TSW-102-07-G-S Routing USB RX1+ RX1- Green 3 Micro AB USB C B PB4 90 ohms differential trace impedance J19 3 VDD_3V3 Red Routing HSIC Refers to Specif Max trace-length mismatch between USB signals pairs should be no greater than 3.8mm 25 26 USBB_VBUS_5V A4 A9 B9 B4 R137 10K 4 2K2 Q9 BSS138 100R 1 C12 100nF 2 1 EARTH_USB_A EARTH_USB_B PD20 LED_Green R135 J17 VBUS DM DP 7 11 10 USBA_VBUS_5V R71 200K C65 20pF USB A PB1 Routing HSIC EARTH_USB_A A 1 3 L11 180ohm at 100MHz C D5 2 1 D Screw 3x1 R68 0R 8 15 16 EARTH_ETH TX+ R65 0R U12 GND_ETH 1nF 75 7 C59 100nF TX- RX+ 5 13 14 1 100 ohms differential trace impedance Routing top or bottom 0R PIOBU1 R72 100R DNP PA29 R73 100R VDD_3V3 A2 A3 R138 10K B11 B10 L12 1 USBB_VBUS_5V B2 B3 C66 100nF A11 A10 A6 A7 Top/Bot Top/Bot USBB_DP USBB_DM B6 B7 C67 10uF 2 8 180ohm at 100MHz 6 EN: Active High 1 EN OUT_2 OUT_1 FLG IN GND VDD_3V3 C68 100nF R79 36K 5 NC2 NC1 USBB_POWR_EN 2 USBB_OVCUR 3 R77 10K VDD_MAIN_5V 7 R78 36K U13 PA27 PD19 4 MIC2025 A A5 B5 A8 B8 L13 1 C69 330pF C70 330pF B A 2 REV 180ohm at 100MHz Ethernet & USB EARTH_USB_B (c) 2017 Microchip Technology Inc. PPn PPn DES. 1/1 4 3 User Guide 2 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 EARTH_USB_B 5 RevB INIT EDIT MODIF. SCALE 8 9 1 DS50002667A-page 54 SAMA5D27 SOM1 Kit1 Figure 7-9. Expansion and Connectors 5 4 3 VDD_3V3 J22 VDD_MAIN_5V 2 1 R80 0R DNP TSW-102-07-G-S J24 Flexcom3_IO2_SPCK 1 PMOD_4 2 Flexcom3_IO4_NPCS1 3 J25 1 2 3 4 5 6 7 8 AN_mBUS1 RST_mBUS1 NPCS1 SPCK_mBUS1 MISO_mBUS1 MOSI_mBUS1 PWM_mBUS1 INT_mBUS1 RX_mBUS1 TX_mBUS1 TWCK_mBUS1 TWD_mBUS1 PB1 PB0 PB3 PB4 1 2 3 4 5 6 7 8 J21 PMOD_1 PMOD_2 PMOD_3 PMOD_4 1 2 3 4 5 6 J23 D SSQ-106-02-G-S-RA VDD_MAIN_5V R82 PC18 R81 R83 Flexcom3_IO1_MISO PC19 R84 22R PC20 R86 22R Flexcom3_IO0_MOSI PC21 PC21 R87 22R Flexcom3_IO3_NPCS0 PC22 PC22 R88 22R Flexcom3_IO4_NPCS1 R90 2K2 C R91 R94 22R 22R TWD_mBUS1 TWCK_mBUS1 R95 R96 22R 22R TWD_mBUS2 TWCK_mBUS2 PC30 SPCK_mBUS1&2 R98 R100 39R 39R SPCK_mBUS1 SPCK_mBUS2 PC29 MISO_mBUS1&2 R103 R104 22R 22R MISO_mBUS1 MISO_mBUS2 PC28 MOSI_mBUS1&2 R105 R106 22R 22R MOSI_mBUS1 MOSI_mBUS2 PC31 NPCS0_mBUS1 R107 22R NPCS0 PD0 NPCS1_mBUS2 R108 22R NPCS1 VDD_3V3 R92 2K2 PD4 PD5 R93 2K2 TWD_LCD_ISC TWCK_LCD_ISC R97 R99 22R 22R TWD_LCD TWCK_LCD R101 R102 22R 22R TWD_ISC TWCK_ISC ISC VDD_3V3 B J27 PD6 VDD_3V3 J28 VDD_MAIN_5V 2 1 PC18 PC20 R109 0R DNP TSW-102-07-G-S J29 PD26 PA26 1 2 3 4 5 6 7 8 AN_mBUS2 RST_mBUS2 NPCS0 SPCK_mBUS2 MISO_mBUS2 MOSI_mBUS2 0R DNP 0R J26 R85 PC10 PC12 PC14 PC16 1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 ISC_RST TWCK_ISC ISC_D1 ISC_D3 ISC_D5 ISC_D7 ISC_D9 ISC_D11 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 ISC_PWD TWD_ISC ISC_MCK ISC_VSYNC ISC_HSYNC ISC_PCK ISC_D0 ISC_D2 ISC_D4 ISC_D6 ISC_D8 ISC_D10 PC4 PA17 PA16 PA15 PA14 PC8 PC6 PC5 PC7 PC2 PC1 PC0 PB31 LCDDAT23 LCDDAT22 LCDDAT21 LCDDAT20 PB30 PB29 PB28 PB27 LCDDAT19 LCDDAT18 LCDDAT17 LCDDAT16 PB26 PB25 PB24 PB23 LCDDAT15 LCDDAT14 LCDDAT13 LCDDAT12 PB22 PB21 PB20 PB19 LCDDAT11 LCDDAT10 LCDDAT9 LCDDAT8 PB18 PB17 PB16 PB15 LCDDAT7 LCDDAT6 LCDDAT5 LCDDAT4 PB14 PB13 PB12 PB11 LCDDAT3 LCDDAT2 LCDDAT1 LCDDAT0 PC24 PC23 PC9 PC11 PC13 PC15 PC17 R119 PA17 PD7 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0R LCDPWM IRQ2 IRQ1 TWCK_LCD TWD_LCD LCDDISP SPI0_NPCS0 SPI0_ MISO SPI0_ MOSI SPI0_ SPCK LCDDEN LCDHSYNC LCDVSYNC LCDPCK LCD_PWM_PC3 PC25 PD1 Flexcom3_IO2_SPCK 39R PC20 PC19 VDD_3V3 TWD_mBUS1&2 TWCK_mBUS1&2 VDD_3V3 NRST PC18 PA24 PA23 LCD TSW-103-07-G-S PMOD mikroBUS 1 R89 2K2 1 VDD_3V3 1 2 3 4 5 6 TSW-106-07-G-S D PD25 PB2 2 J20 PMOD_3 Flexcom3_IO1_MISO PMOD_2 Flexcom3_IO0_MOSI PMOD_1 Flexcom3_IO3_NPCS0 100R C B 52 51 PC22 PC21 PC19 TSW-115-07-G-D J30 PA31 PA25 PD23 PD24 PWM_mBUS2 INT_mBUS2 RX_mBUS2 TX_mBUS2 TWCK_mBUS2 TWD_mBUS2 1 2 3 4 5 6 7 8 TAMPER J31 A PIOBU2 PIOBU4 PIOBU6 PIOBU7 COMPN mikroBUS 2 R110 R112 R114 R116 R118 330R 330R 330R 330R 0R 1 3 5 7 9 2 4 6 8 10 R111 R113 R115 R117 330R 330R 0R 0R A PIOBU3 PIOBU5 RXD COMPP B A FTS-105-01-L-DV REV Expansion & Connectors RevB PPn PPn INIT EDIT MODIF. SCALE DES. 1/1 (c) 2017 Microchip Technology Inc. 4 3 User Guide 2 DATE VER. DATE REV. SHEET B SAMA5D27-SOM1-EK1 5 10-AUG-17 XXX XX-XXX-XX 06-MAR-17 XXX XX-XXX-XX 9 9 1 DS50002667A-page 55 SAMA5D27 SOM1 Kit1 8. Revision History Table 8-1. Revision History Doc. Rev. Changes A First release (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 56 SAMA5D27 SOM1 Kit1 The Microchip Web Site Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * * * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives Customer Change Notification Service Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at http://www.microchip.com/. Under "Support", click on "Customer Change Notification" and follow the registration instructions. Customer Support Users of Microchip products can receive assistance through several channels: * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://www.microchip.com/support Microchip Devices Code Protection Feature Note the following details of the code protection feature on Microchip devices: * * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 57 SAMA5D27 SOM1 Kit1 * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Legal Notice Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 58 SAMA5D27 SOM1 Kit1 ISBN: 978-1-5224-2088-0 Quality Management System Certified by DNV ISO/TS 16949 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California (R) (R) and India. The Company's quality system processes and procedures are for its PIC MCUs and dsPIC (R) DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 59 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Canada - Toronto Tel: 905-695-1980 Fax: 905-695-2078 Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2943-5100 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 China - Dongguan Tel: 86-769-8702-9880 China - Guangzhou Tel: 86-20-8755-8029 China - Hangzhou Tel: 86-571-8792-8115 Fax: 86-571-8792-8116 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-3326-8000 Fax: 86-21-3326-8021 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-3019-1500 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 Taiwan - Kaohsiung Tel: 886-7-213-7830 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 Finland - Espoo Tel: 358-9-4520-820 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 France - Saint Cloud Tel: 33-1-30-60-70-00 Germany - Garching Tel: 49-8931-9700 Germany - Haan Tel: 49-2129-3766400 Germany - Heilbronn Tel: 49-7131-67-3636 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Germany - Rosenheim Tel: 49-8031-354-560 Israel - Ra'anana Tel: 972-9-744-7705 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Padova Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Tel: 47-7289-7561 Poland - Warsaw Tel: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 (c) 2017 Microchip Technology Inc. User Guide DS50002667A-page 60