Features
1 of 11
Optimum Technology
Matching® Applied
GaAs HBT
InGaP HBT
GaAs MESFET
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
NOT FOR NEW DESIGNS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trade-
mark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
Product Description
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
InP HBT
LDMOS
RF MEMS
FPD750SOT343E
LOW-NOISE HIGH-LINEARITY PACKAGED
pHEMT
The FPD750SOT343CE is a packaged depletion mode pseudomorphic
High Electron Mobility Transistor (pHEMT). It utilizes a 0.25µmx750µm
Schottky barrier gate. RFMD’s 0.25µm process ensures class-leading
noise performance. The use of a small footprint plastic package allows for
cost effective system implementation.
(at 1850MHz)
0.5dB NF Min
20dBm Output Power (P1dB)
16.5dB Small-Signal Gain
(SSG)
37 dBm Output IP3
RoHS-compliant (Directive
2002/95/EC)
Applications
802.11a, b, g and WiMAX
LNAs
PCS/Cellular High Linearity
LNAs
Other Types of Wireless Infra-
structure Systems.
DS100526
NOT FOR NEW DESIGNS
Package: SOT343
FPD750SOT34
3E Low- Noise
High-Linearity
Packaged
pHEMT
RF Parameter Typical Performance Unit Condition
0.9GHz 1.85GHz 2.6GHz 3.5GHz
OP1dB at Gain Compression 20 19 20 20.5 dBm VDS=3.3V, IDS=40mA
Small-Signal Gain (SSG) 22 16.5 14 11 dB VDS=3.3V, IDS=40mA
PAE 50454550%V
DS=3.3V, IDS=40mA, POUT=P1dB
Maximum Stable Gain (|S21/S12|) 24 20 18 16 dB VDS=3.3V, IDS=40mA
Noise Figure (NF) 0.5 0.6 0.7 0.8 dB VDS =3.3V, IDS=40mA
OIP3 (15dB to 5dB below P1dB) 32313132dBmV
DS=3.3V, IDS=40mA
35 37 35 38 dBm VDS=3.3V, IDS=80mA, POUT=9dBm per tone
*Note: Based on measured data taken on applications circuits.
RF/DC Parameter Electrical Specification Unit Condition
Min. Typ. Max.
Frequency 2.0 GHz
OP1dB at Gain Compression 17 dBm VDS=3.3V, IDS=40mA
Small-Signal Gain (SSG) 16 dB VDS=3.3V, IDS=40mA
Saturated Drain-Source Current (IDSS) 185 230 280 mA VDS= 1.3V, VGS 0V
Transconductance (GM) 200 ms VDS =1.3V, VGS=0V
Pinch-Off Voltage (VP) |0.7| |1.0| |1.3| V VDS= 1.3V, IDS=0.75mA
Gate-Source Breakdown Vltg (VBDGS)|13| |16| V I
GS=0.75mA
Gate-Drain Breakdown Vltg (VBDGD) |13| |18| V IDS=0.75mA
Thermal Resistivity (JC) * 143 C/W VDS >3V
*Note: All devices are 100% RF and DC tested at 2GHz with ZS=ZL=50. TAMBIENT=22C.
2 of 11 DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
NOT FOR NEW DESIGNS
FPD750SOT343E
Biasing Guidelines
Active bias circuits provide good performance stabilization over variations of operating temperature, but require a larger num-
ber of components compared to self-bias or dual-biased. Such circuits should include provisions to ensure that gate bias is
applied before drain bias, otherwise the pHEMT may be induced to self-oscillate. Contact your Sales Representative for addi-
tional Information.
Dual-bias circuits are relatively simple to implement, but will require a regulated negative voltage supply for depletion-mode
devices.
For standard Class A operation, a 50% of IDSS bias point is recommended. A small amount of RF gain expansion prior to onset
of compression is normal for this operating point. A class A/B bias of 25% to 33% offers an optimized solution for NF and OIP3.
Note: The recommended method for measuring IDSS, or any particular
IDS, is to set the drain-source voltage (VDS) at 1.3V. This measurement
point avoids the onset of spurious self-oscillation which would normally
distort the current measurement (this effect has been filtered from the
I-V curves presented). Setting the VDS> 1.3V will generally cause errors
in the current measurements, even in stabilized circuits.
Absolute Maximum Ratings1
Parameter Rating Unit
Drain-Source Voltage (VDS)
(-3V<VGS <-0.5V)
6V
Gate-Source Voltage (VGS)
(0V<VDS <+8V)
-3 V
Drain-Source Current (IDS)
(For VDS>2V)
IDSS
Gate Current (IG)
(Forward or reverse)
7.5 m A
RF Input Power (PIN)2
(Under any acceptable bias state)
22 dBm
Channel Operating Temperature (TCH)
(Under any acceptable bias state)
175 °C
Storage Temperature (TSTG)
(Non-Operating Storage)
-55 to 150 °C
Total Power Dissipation (PTOT)3, 4, 5 1.1 W
Gain Compression
(Under any bias conditions) 5dB
Simultaneous Combination of Limits6
(2 or more max. limits)
80 %
Notes:
1TAMBIENT =22°C unless otherwise noted; exceeding any one of these absolute max-
imum ratings may cause permanent damage to the device.
2Max. RF input limit must be further limited if input VSWR>2.5:1.
3Users should avoid exceeding 80% of 2 or more Limits simultaneously.
4Total Power Dissipation (PTOT) defined as (PDC +PIN)–POUT, where PDC: DC Bias
Power, PIN: RF Input Power, POUT: RF Output Power.
Total Power Dissipation to be de-rated as follows above 22°C:
PTOT =1.1-(1/JC)xTPACK, where TPACK =source tab lead temperature above
22°C and JC=143°C/W.
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical perfor-
mance or functional operation of the device under Absolute Maximum Rating condi-
tions is not implied.
RoHS status based on EUDirective2002/95/EC (at time of this document revision).
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended appli-
cation circuitry and specifications at any time without prior notice.
DC IV Curv es F PD 75 0SOT89
0. 00
0. 05
0. 10
0. 15
0. 20
0. 25
0. 30
0.0 0. 5 1 .0 1 .5 2.0 2. 5 3. 0 3.5 4.0 4.5 5 .0 5.5 6. 0
Dr a i n- Sou r ce Vo l t ag e (V)
Drai n-Sour ce Current ( A)
VG = - 1. 5 0
VG = - 1 . 2 5 V
VG = - 1 . 0 0 V
VG = - 0 . 7 5 V
VG = - 0 . 5 0 V
VG = - 0 . 2 5 V
VG =0V
3 of 11
NOT FOR NEW DESIGNS
DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT343E
Typical Frequency Response
Note: Typical gain and noise figure variation against frequency is shown above. The devices were biased nominally at
VDS=3.3V, IDS=40mA. The test devices were tuned for minimum noise figure and maximum gain using tuners at the device
input and output ports.
Typical RF Performance at 1.85GHz
Note: Typical power transfer curves at two bias conditions are shown above. The data is taken with the device mounted on eval-
uation board tuned at 1.85GHz for low noise and gain as shown in the reference design included in this document.
Note: Typical intermodulation performance is shown above. The data is taken with the device mounted on evaluation board
tuned at 1.85GHz for low noise and gain as shown in the 1.85GHz reference design in this document. The FPD750SOT343CE
0.5 1.5 2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5
Freq uency (GHz)
MSG & S21 vs Frequency Biased @ 3.3V, 40mA
0
4
8
12
16
20
24
28
Mag S21 & MSG (dB)
MSG
S21
N.F.min vs Frequency Biase d @ 3.3V
0.00
0.20
0.40
0.60
0.80
1.00
1.20
0.6
1.2
1.8
2.4
3.0
3.6
4.2
4.8
5.4
6.0
Frequency (GHz)
N.F.min (d B)
ID = 80mA
ID = 40mA
Power Trans fer Characteristic
VDS = 3. 3V IDS = 4 0mA at f = 1. 85 GHz
7.0
9.0
11. 0
13. 0
15. 0
17. 0
19. 0
21. 0
23. 0
-10. 0 -8.0 -6.0 -4. 0 -2. 0 0.0 2.0 4.0 6.0 8.0 10.0
I n put P ow er ( dBm)
Output Power (dBm)
-1.00
0.00
1.00
2.00
3.00
4.00
5.00
6.00
7.00
Ga in Compre ssio n
(
dB
)
P out (d Bm)Co mp Point
Power Tra nsfer Characterist ic
VDS = 3. 3V I DS = 80mA a t f = 1.85GHz
7.0
9.0
11.0
13.0
15.0
17.0
19.0
21.0
23.0
-10. 0 -8.0 -6.0 -4. 0 -2. 0 0. 0 2.0 4.0 6.0 8.0 10.0 12.0
Input Power (dBm)
Output Power (dBm)
-1.00
0.00
1.00
2.00
3.00
4.00
5.00
6.00
7.00
Gai n Compressi on (dB)
Pout (dBm) Comp Point
Typical Intermodulation Performance
VDS = 3.3 V IDS = 40mA at
f = 1.85GHz
2
4
6
8
10
12
14
-12.3 -11.3 -10. 3 -9. 3 -8. 3 -7.3 -6.3 -5. 3 -4.3 -3.3
Input Power (dBm)
Ou t pu t P ow er
(
dBm
)
-60
-54
-48
-42
-36
-30
-24
3 rd Ord er IM Pr od uct s ( dB c)
Pout ( dBm ) 3rd s (d Bc)
Typical Intermodulation Performance
VDS = 3. 3V IDS = 80 mA at f
= 1. 85GH
z
2
4
6
8
10
12
14
-12. 8 -11. 8 -10.8 -9.8 -8.8 -7.8 -6.8 -5.8 -4.9 -3.9
Input Po wer (dBm)
Output Power (dBm)
-68
-62
-56
-50
-44
-38
-32
3r d Or de r I M Pr o du ct s ( d Bc)
Pout (dBm) 3r ds ( dBc)
4 of 11 DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
NOT FOR NEW DESIGNS
FPD750SOT343E
has enhanced Intermodulation performance with an OIP3 value of up to P1dB+16dBm. This effect can be seen when the
device is biased at ID=80mA by the bough in the 3rd order product plot line.
Noise Parameters
Biased at VDS =3.3V, IDS =40mA Biased at VDS=3.3V, IDS=80mA
Freq. N.F.min
(GHz) (dB) Mag
A
ngle
0.60 0.37 0.770 12.2 0.108
0.90 0.40 0.689 21.2 0.100
1.20 0.43 0.614 30.6 0.092
1.50 0.46 0.546 40.4 0.084
1.80 0.49 0.485 50.6 0.077
2.10 0.52 0.431 61.1 0.069
2.40 0.55 0.383 72.1 0.063
2.70 0.58 0.342 83.4 0.057
3.00 0.61 0.307 95.1 0.053
3.30 0.64 0.280 107.2 0.049
3.60 0.67 0.258 119.8 0.046
3.90 0.70 0.244 132.7 0.043
4.20 0.73 0.236 146.0 0.042
4.50 0.76 0.236 159.6 0.040
4.80 0.78 0.242 173.7 0.040
5.10 0.81 0.254 -171.9 0.041
5.40 0.84 0.273 -157.0 0.044
5.70 0.87 0.299 -141.8 0.050
6.00 0.90 0.332 -126.1 0.061
Rn/50
Γopt
Freq. N.F.min
(GHz) (dB) Mag. Angle
0.60 0.39 0.732 11.5 0.129
0.90 0.42 0.644 22.1 0.115
1.20 0.46 0.564 33.0 0.102
1.50 0.50 0.492 44.2 0.090
1.80 0.53 0.428 55.9 0.079
2.10 0.57 0.372 67.9 0.070
2.40 0.60 0.324 80.2 0.063
2.70 0.64 0.283 93.0 0.057
3.0 0 0. 68 0.251 106.2 0.053
3.3 0 0. 71 0.227 119.7 0.050
3.6 0 0. 75 0.210 133.6 0.049
3.9 0 0. 79 0.202 147.9 0.048
4.2 0 0. 83 0.201 162.5 0.048
4.5 0 0. 86 0.208 177.5 0.049
4.80 0.90 0.223 - 167. 1 0.051
5.10 0.94 0.247 - 151. 4 0.056
5.40 0.97 0.277 - 135. 2 0.065
5.70 1.01 0.317 - 118. 7 0.080
6.00 1.05 0.364 - 101. 8 0.106
Rn/50
Γopt
5 of 11
NOT FOR NEW DESIGNS
DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT343E
Reference Design (0.9GHz)
Note: OIP3 measured at POUT of 9dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick FR4 with 1/2oz.
Cu on both sides.
DC blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate
DC bias line for stability.
Parameter Typical Unit
Gain 22 dB
P1dB 20 dBm
OIP332 dBm
NF 0.5 dB
S11 -5 dB
S22 -10 dB
VD3.3 V
VG-0.4 to -0.6 V
ID40 mA
Component Value Description
Lg 56nH LL 1608 Toko chip inductor
Ld 56nH LL 1608 Toko chip inductor
L1 15nH LL 1608 Toko chip inductor
L2 4.7nH LL 1608 Toko chip inductor
15pF
Lg
33pF L1
0. 01 uF 20 O
+1.0uF
+
15pF 0. 0 1u F
Ld
33pF
L2
Q1
Vg Vd
1.45"
0.63"
33pF 33pF
20 Ohm
15pF
15pF
0.01uF
0.01uF 1.0uF
Vd-Vg
FPD750SOT343 EVAL Boa rd
Schematic
56 nH 56 nH
L1 L2
@ 90 0MHz
RF IN RF OUT
6 of 11 DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
NOT FOR NEW DESIGNS
FPD750SOT343E
Reference Design (1.85 GHz)
Note: OIP3 measured at POUT of 9dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick FR4 with 1/2oz.
Cu on both sides.
DC blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate
DC bias line for stability.
Parameter Typical Unit
Gain 16.5 dB
P1dB 19 dBm
OIP331 dBm
NF 0.6 dB
S11 -6 dB
S22 -10 dB
VD3.3 V
VG-0.4 to -0.6 V
ID40 mA
Component Value Description
Lg 22nH LL 1608 Toko chip inductor
Ld 22 nH LL 1608 Toko chip inductor
L1 2.2nH LL 1005 Toko chip inductor
L2 1.8nH LL 1005 Toko chip inductor
C2 1.0pF ATC 600S chip inductor
15p F
Lg
33pF L1
0.01u F
20
O
+1.0uF
+
1 5pF 0.01uF
Ld
33p F
C2
L2
Q1
Vg Vd
1.45"
0.63"
33pF 33pF
20 Ohm
15pF
15pF
0.01uF
0.01uF 1.0uF
Vd-Vg
FPD750SOT343 EVAL Board
Schematic
22 nH 22 nH
L1 L2
C2
@ 1.85GHz
RF IN
RF OU
T
7 of 11
NOT FOR NEW DESIGNS
DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT343E
Reference Design (2.6GHz)
Note: OIP3 measured at POUT of 9dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick FR4 with 1/2oz.
Cu on both sides.
DC blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate
DC bias line for stability.
Parameter 2.5 2.6 2.7 Unit
Gain 14.2 14 13.5 dB
P1dB 20 21 21 dBm
OIP330.5 31 31 dBm
NF 0.8 0.7 0.75 dB
S11 -20 -25 -20 dB
S22 -7 -8 -10 dB
VD3.3 V
VG-0.4 to -0.6 V
ID40 mA
Component Value Description
Lg 18nH LL 1608 Toko chip inductor
Ld 18 nH LL 1608 Toko chip inductor
L1 1.2nH LL 1005 Toko chip inductor
L2 2.7nH LL 1005 Toko chip inductor
C1 1.0pF ATC 600S chip inductor
C2 1.8pF ATC 600S chip inductor
15 pF
Lg
33pF L1
0.01uF
20O
+1. 0uF
+
15pF 0.01uF
Ld
33pF
L2
C2
Q1
Vg Vd
1.45"
0.63"
C1
33pF 33pF
20 Ohm
15pF
15pF
0.01uF
0.01uF 1.0 uF
Vd-VgFPD750SOT343 EVAL Board
Schematic
18nH 18nH
L1 C2
L2
2.6GHz
RF IN RF OUT
C1
8 of 11 DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
NOT FOR NEW DESIGNS
FPD750SOT343E
Reference Design (3.5GHz)
Note: OIP3 measured at POUT of 9dBm per tone.
Evaluation Board Layout
Component Values
Evaluation board material: 31mil thick Rogers 4003
with 1/2oz. Cu on both sides.
DC blocking capacitors are ATC series 600S. A tantalum
1.0µF is used at the drain terminal. All other capacitors
are 0603 and 0805 standard chip capacitors. A 0603
size 20 chip resistor from Vishay is used on the gate
DC bias line for stability.
Parameter 3.5 Unit
Gain 11 dB
P1dB 20.5 dBm
OIP332 dBm
NF 0.75 dB
S11 -11 dB
S22 -11 dB
VD3.3 V
VG-0.4 to -0.6 V
ID40 mA
Component Value Description
Lg 18nH LL 1608 Toko chip inductor
Ld 18 nH LL 1608 Toko chip inductor
L1 1.0nH 0402CS Coil Cr. inductor
L2 2.7nH 0402CS Coil Cr. inductor
C1 0.3pF ATC 600S chip inductor
C2 0.8pF ATC 600S chip inductor
C2
C1
L1
L2
0 . 01 uF 20 O
Lg
+1.0uF
+
0.01uF
15pF
Q1
Vg Vd
15pF
Ld
10pF
10pF
1.45"
0.63"
10pF 10pF
20 Ohm
15pF
15pF
0.01uF
0.01uF 1. 0uF
Vd
-Vg
FPD750SOT343 EVAL Board
Schematic
18 nH 18 nH
L1 C2
L2
@ 3. 5GHz
RF IN RF OUT
C1
9 of 11
NOT FOR NEW DESIGNS
DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT343E
S-Parameters
(Biased at 3V, 40mA)
S-Parameters
(Biased at 3V, 80mA)
Freq
(GHz)Mag.Ang.Mag.Ang.Mag.Ang.Mag.Ang.
0.60 0.875 -51.0 12.561 139.4 0.034 67.2 0.294 -40.8
0.90 0.788 -72.8 11.024 123.3 0.046 59.0 0.248 -59.5
1.20 0.707 -92.2 9.608 110.0 0.057 53.0 0.216 -76.2
1.50 0.641 -109.4 8.377 98.5 0.065 48.1 0.186 -91.7
1.80 0.590 -124 .7 7.354 88.5 0.07 2 44.2 0.1 62 -106.8
2.10 0.557 -138 .4 6.547 79.6 0.07 9 40.6 0.1 50 -121.3
2.40 0.532 -151 .0 5.881 71.5 0.08 6 37.5 0.1 38 -133.8
2.70 0.515 -162 .2 5.341 64.0 0.09 2 34.3 0.1 32 -145.4
3.00 0.501 -172 .8 4.886 56.9 0.09 9 31.2 0.1 26 -155.7
3.30 0.491 178.2 4.519 50.2 0.105 28.2 0.119 -164.8
3.60 0.484 169.6 4.202 43.6 0.112 24.9 0.116 -175.0
3.90 0.484 161.3 3.950 37.2 0.118 21.5 0.110 176.0
4.20 0.483 153.4 3.728 30.7 0.125 17.9 0.107 165.7
4.50 0.489 145.3 3.525 24.1 0.131 14.0 0.110 153.9
4.80 0.494 136.9 3.340 17.5 0.137 9.8 0.115 142.7
5.10 0.503 128.7 3.173 11.1 0.143 5.6 0.125 129.9
5.40 0.515 120.5 3.020 4.5 0.148 1.2 0.141 119.8
5.70 0.528 112.3 2.874 -2.2 0.153 -3.4 0.161 110.4
6.00 0.545 104.4 2.725 -8.8 0.156 -8.0 0.185 101.6
S11 S21 S12 S22
Freq
(GHz)Mag.Ang.Mag.Ang.Mag.Ang.Mag.Ang.
0.60 0.852 -53.8 14.400 137.0 0.029 69.0 0.256 -38.6
0.90 0.755 -76.0 12.398 120.7 0.039 62.1 0.210 -55.1
1.20 0.671 -95.6 10.653 107.5 0.048 57.1 0.180 -69.8
1.50 0.605 -112.6 9.200 96.4 0.056 53.2 0.151 -82.8
1.80 0.556 -127.8 8.027 86.7 0.063 49.8 0.128 -96.3
2.10 0.525 -141.4 7.11 5 78.1 0.071 46.5 0.115 -109.7
2.40 0.502 -153.7 6.37 2 70.3 0.078 43.5 0.104 -121.0
2.70 0.487 -164.7 5.77 3 63.0 0.085 40.5 0.097 -132.3
3.00 0.475 -175.1 5.27 2 56.2 0.091 37.3 0.090 -141.3
3.30 0.465 176.1 4.868 49.6 0.098 34.3 0.083 -149.7
3.60 0.459 167.8 4.522 43.2 0.105 30.9 0.079 -159.5
3.90 0.458 159.6 4.246 37.0 0.112 27.5 0.073 -167.0
4.20 0.459 152.1 4.006 30.6 0.119 23.9 0.068 -177.9
4.50 0.464 144.2 3.787 24.2 0.126 19.9 0.069 169.0
4.80 0.469 136.1 3.588 17.8 0.132 15.7 0.071 154.1
5.10 0.479 128.2 3.408 11.5 0.138 11.5 0.079 137.9
5.40 0.492 120.1 3.246 5.1 0.144 7.0 0.094 125.7
5.70 0.506 112.2 3.094 -1.5 0.149 2.3 0.113 114.4
6.00 0.524 104.4 2.937 -8.0 0.153 -2.3 0.138 105.2
S11 S21 S12 S22
10 of 11 DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
NOT FOR NEW DESIGNS
FPD750SOT343E
Branding Diagram
Package Outline
Dimensions in Millimeters
Tape Dimensions and Part Orientation
Tape and reel for this material are in accordance with EIA-481-1 except where exceptions are identified.
PCB Footprint
SOURCE
D
RAIN
SO UR C E
GATE
Units in inches
11 of 11
NOT FOR NEW DESIGNS
DS100526
7628 Thorndike Road, Greensboro, NC 27409-9421 · For sales or technical
support, contact RFMD at (+1) 336-678-5570 or sales-support@rfmd.com.
FPD750SOT343E
Preferred Assembly Instructions
This package is compatible with both lead free and leaded solder reflow processes as defined within IPC/JEDEC J-STD-020C.
The maximum package temperature should not exceed 260°C.
Handling Precautions
To avoid damage to the devices, care should be exercised during handling. Proper Electro-
static Discharge (ESD) precautions should be observed at all stages of storage, handling,
assembly, and testing. storage, handling, assembly, and testing.
ESD Rating
These devices should be treated as Class 0 (0V to 250V) using the human body model as defined in JEDEC Standard No. 22-
A114. Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263.
MSL Rating
The device has an MSL rating of Level 1. To determine this rating, preconditioning was performed to the device per the Pb-free
solder profile defined within IPC/JEDEC J-STD-020C, moisture/reflow sensitivity classification for non-hermetic solid state sur-
face mount devices.
Application Notes and Design Data
Application Notes and design data including S-parameters, noise parameters, and device model are available on request and
from www.rfmd.com.
Reliability
An MTTF of 4.2 million hours at a channel temperature of 150°C is achieved for the process used to manufacture this device.
Disclaimers
This product is not designed for use in any space-based or life-sustaining/supporting equipment.
Ordering Information
Note: To order RoHS-compliant packaged pHEMT with enhanced passivation parts, replace the E suffix with CE.
Description Ordering Code
Lead-Free Packaged pHEMT FPD750SOT343E
RoHS-Compliant Packaged pHEMT with enhanced passivation
(recommended for new designs) EB750SOT343CE
2.0GHz Evaluation Board EB750SOT343CE-BC
Quantity Ordering Code
Reel of 1000 FPD750SOT343E
Reel of 100 FPD750SOT343ESR
Bag of 25 FPD750SOT343ESQ
Bag of 5 FPD750SOT343ESB
