CS45-16IO1R - Zilog - Datasheet.Live

CS45-16io1R

Single Thyristor

Thyristor

2 1

3

Part number

CS45-16io1R

Backside: isolated

TAV

T

VV1.37

RRM

45

1600

=

V= V

I= A

Features / Ad vantages: Applications: Package:

● Thyristor for line frequency

● Planar passivated chip

● Long-term stability

● Line rectifying 50/60 Hz

● Softstart AC motor control

● DC Motor control

● Power converter

● AC power control

● Lighting and temperature control

ISOPLUS247

● Industry standard outline

● RoHS compliant

● Epoxy meets UL 94V-0

● Soldering pins for PCB mounting

● Backside: DCB ceramic

● Reduced weight

● Advanced power cycling

● Isolation Voltage: V~

3600

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1R

V = V

A²s

kA²s

Symbol Definition

Ratings

typ. max.

I

V

IA

V

T

1.36

R0.8 K/W

min.

45

VV

50T = 25°C

VJ

T = °C

VJ

mA3V = V

T = 25°C

VJ

I = A

T

V

T = °C

C

80

P

tot

150 WT = 25°C

C

45

1600

forward voltage drop

total power dissipation

Conditions Unit

1.73

T = 25°C

VJ

125

V

T0

V0.88T = °C

VJ

150

r

T

11 mΩ

V1.37T = °C

VJ

I = A

T

V

45

1.85

I = A90

threshold voltage

slope resistance for power loss calculation only

µA

125

VV1600T = 25°C

VJ

IA71

P

GM

Wt = 30 µs 10

max. gate power dissipation

P

T = °C

C

150

Wt = 5

P

GAV

W0.5

average gate power dissipation

C

J

22

j

unction capacitance V = V400 T = 25°Cf = 1 MHz

RVJ

pF

I

TSM

t = 10 ms; (50 Hz), sine T = 45°C

VJ

max. forward surge current

T = °C

VJ

150

I²t T = 45°C

value for fusing

T = °C150

V = 0 V

R

V = 0 V

R

V = 0 V

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

t = 10 ms; (50 Hz), sine

t = 8,3 ms; (60 Hz), sine

VJ

R

VJ

R

thJC

thermal resistance junction to case

T = °C

VJ

150

520

560

970

940

A

440

475

1.35

1.31

1600

300 µs

RMS forward current

T(RMS)

TAV

180° sine

average forward current

(di/dt)

cr

A/µs

150repetitive, I =T

VJ

= 125°C; f = 50 Hz

critical rate of rise of current

V

GT

gate trigger voltage V= 6 V T = °C25

(dv/dt) T=125°C

critical rate of rise of voltage

A/µs500

V/µs

t = µs;

IA;V = ⅔ V

R = ∞; method 1 (linear voltage rise)

VJ

DVJ

135 A

T

P

G

=0.3

di /dt A/µs;

G

=0.3

DDRM

cr

V = ⅔ V

D DRM

GK

1000

1.5 V

T= °C-40

VJ

I

GT

gate trigger current V= 6 V T = °C25

DVJ

80 mA

T= °C-40

VJ

1.6 V

200 mA

V

GD

gate non-trigger voltage T= °C

VJ

0.2 V

I

GD

gate non-trigger current 10 mA

V = ⅔ V

D DRM

125

latching current T= °C

VJ

150 mAI

L

25tµs

p

=10

IA;

G

= 0.3 di /dt A/µs

G

=0.3

holding current T= °C

VJ

100 mAI

H

25V= 6 V

D

R = ∞

GK

gate controlled delay tim e T= °C

VJ

2µst

gd

25

IA;

G

= 0.3 di /dt A/µs

G

=0.3

V = ½ V

D DRM

turn-off time T= °C

VJ

150 µst

q

di/dt = A/µs;15 dv/dt = V/µs;20

V =

R

100 V; I A;

T

=45 V = ⅔ V

D DRM

tµs

p

= 200

non-repet., I = 45 A

T

150

R

thCH

thermal resistance case to heatsink K/W

Thyristor

1700

RRM/DRM

RSM/DSM

max. non-repetitive reverse/forward blocking voltage

max. re pe titive reverse/forward bl ocking volt a ge

R/D

reverse current, drain current

T

R/D

200

0.25

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1R

Ratings

Product Mar

k

in

g

Date Code

Part No.

Logo

UL listed

IXYS

NNNNNN

Assembly Code

Ayyww

Assembly Line

ISOPLUS®

ABCXXXXXX

®

CS45-12io1 TO-247AD (3) 1200

Package

T

VJ

°C

T

stg

°C150

storage temperature -55

Weight g6

Symbol Definition typ. max.min.Conditions

virt ua l j un ctio n temp eratu re

Unit

F

C

N120

mount ing for ce w i th cli p 20

VV

t = 1 second

V

t = 1 minute

isolation voltage

mm

2.7

4.1

d

Spp/App

creepage distance on surface | striking distance through air

d

Spb/Apb

terminal to backside

I

RMS

RMS current 70 A

per terminal

150-40

terminal to terminal

CS45-16io1 TO-247AD (3) 1600

ISOPLUS247

Similar Part Package Voltage class

CS45-08io1 TO-247AD (3) 800

Delivery Mode Quantity Code No.Part Number Marking on ProductOrdering

50/60 Hz, RMS; I ≤ 1 mA

ISOL

CS45-16io1R 480312Tube 30CS45-16io1RStandard

3000

3600

ISOL

threshold voltage V0.88

mΩ

V

0 max

R

0 max

slope resistance * 8.5

Equivalent Circuits for Simulation

T =

VJ

IV

0

R

0

Thyristor

150°C

* on die level

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1R

Die konvexe Form des Substrates ist typ. < 0.04 mm über der

Kunststoffoberfläche der Bauteilunterseite

The convex bow of substrate is typ. < 0. 04 mm over plas ti c

surface level of device bottom si de

Die Gehäuseabmessungen entsprechen dem Typ TO-247 AD

gemäß JEDEC außer Schraubloch und Lmax.

This drawing will meet all dimensions requiarement of JEDEC

outline TO-247 AD except screw hole and except Lmax.

min max min max

A 4.83 5.21 0.190 0.205

A1 2.29 2.54 0.090 0.100

A2 1.91 2.16 0.075 0.085

b 1.14 1.40 0.045 0.055

b2 1.91 2.20 0.075 0.087

b4 2.92 3.24 0.115 0.128

c 0.61 0.83 0.024 0.033

D 20.80 21.34 0.819 0.840

D1 15.75 16.26 0.620 0.640

D2 1.65 2.15 0.065 0.085

D3 20.30 20.70 0.799 0.815

E 15.75 16.13 0.620 0.635

E1 13.21 13.72 0.520 0.540

e 5.45 BSC 0.215 BSC

L 19.81 20.60 0.780 0.811

L1 3.81 4.38 0.150 0.172

Q 5.59 6.20 0.220 0.244

R 4.25 5.50 0.167 0.217

W - 0.10 - 0.004

Dim. Millimeter Inches

E

123

R

DL

L1

Q

3x b

2x b2

b4

W

A

A2

c

A1

2x e

E1

D1

D2

D3

2 1

3

Outlines ISOPLUS247

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified

CS45-16io1R

0.01 0.1 1

200

250

300

350

400

450

0.5 1.0 1.5 2.0

0

20

40

60

80

100

10

0

10

1

10

2

10

3

10

4

0.0

0.1

0.2

0.3

0.4

ITSM

[A]

IT

[A]

VT [V]

t[ms]

ZthJC

[K/W]

23456789011

100

1000

10000

I2t

[A2s]

t[ms]

IT(AV)M

[A]

TC[°C]

0 255075100125150

0

20

40

60

80

Fig. 1 Forward characteristics Fig. 3 I2t versus time (1-10 ms)

t[s]

Fig. 6 Max. forward current

at case temperature

Fig. 2 Surge overload current

Fig. 8 Transient thermal impedance

T

VJ

= 25°C

T

VJ

= 125°C

T

VJ

=45°C

50 Hz, 80% V

RRM

T

VJ

=125°C

T

VJ

= 45°C

V

R

=0 V

125°C

150°C

02040

0

20

40

60

80

IF(AV) [A]

P(AV)

[W]

Fig. 7a Power dissipation versus direct output current

Fi

g

. 7b and ambient tem

p

erature

0 50 100 150

Tamb [°C]

dc =

1

0.5

0.4

0.33

0.17

0.08

10 100 1000

1

10

100

1000

1 10 100 1000 10000

0.1

1

10

IG[mA]

VG

[V]

4: P

GAV

=0.5W

5: P

GM

=1W

6: P

GM

=10W

tgd

[μs]

IG[mA]

typ. Limit

T

VJ

=125°C

Fig. 4 Gate trigger characteristics Fig. 5 Gate controlled delay time

6

4

5

2

1

3

1: I

GD

,T

VJ

=150°C

2: I

GT

,T

VJ

=25°C

3: I

GT

,T

VJ

=-40°C

R

thHA

0.6

0.8

1.0

2.0

4.0

8.0

dc =

1

0.5

0.4

0.33

0.17

0.08

R

thi

[K/W] t

i

[s]

0.044 0.011

0.039 0.0001

0.047 0.02

0.09 0.4

0.18 0.12

Thyristor

IXYS reserves the right to change limits, conditions and dimensions. 20130306cData according to IEC 60747and per semiconductor unless otherwise specified