ICL8013 Data Sheet April 1999 File Number 2863.4 1MHz, Four Quadrant Analog Multiplier Features The ICL8013 is a four quadrant analog multiplier whose output is proportional to the algebraic product of two input signals. Feedback around an internal op amp provides level shifting and can be used to generate division and square root functions. A simple arrangement of potentiometers may be used to trim gain accuracy, offset voltage and feedthrough performance. The high accuracy, wide bandwidth, and increased versatility of the ICL8013 make it ideal for all multiplier applications in control and instrumentation systems. Applications include RMS measuring equipment, frequency doublers, balanced modulators and demodulators, function generators, and voltage controlled amplifiers. * Accuracy. . . . . . . . . . . . . . . . . . . . . . . . 1% ("B" Version) * Input Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . 10V * Bandwidth. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1MHz * Uses Standard 15V Supplies * Built-In Op Amp Provides Level Shifting, Division and Square Root Functions Pinout ICL8013 (METAL CAN) TOP VIEW YOS Ordering Information PART NUMBER ICL8013BCTX ICL8013CCTX 10 YIN MULTIPLICATION ERROR (MAX) TEMP. RANGE (oC) 1% 0 to 70 2% 0 to 70 PKG PKG. NO. 10 Pin T10.B Metal Can 1 9 ZOS V+ 2 8 GND ZIN 3 7 XOS OUTPUT 10 Pin T10.B Metal Can 4 6 5 XIN V- Functional Diagram ZIN XIN VOLTAGE TO CURRENT CONVERTER AND SIGNAL COMPRESSION XOS BALANCED VARIABLE GAIN AMPLIFIER OP AMP OUT ZOS YIN YOS VOLTAGE TO CURRENT CONVERTER ZIN 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999 ICL8013 Absolute Maximum Ratings Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Input Voltages (XIN, YIN, ZIN, XOS, YOS, ZOS) . . . . . . . . . VSUPPLY Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) Metal Can Package . . . . . . . . . . . . . . . 160 75 Maximum Junction Temperature (Metal Can Package) . . . . . . .175oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC Operating Conditions Temperature Range ICL8013XC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air. TA = 25oC, VSUPPLY = 15V, Gain and Offset Potentiometers Externally Trimmed, Unless Otherwise Specified Electrical Specifications TEST CONDITIONS PARAMETER ICL8013B ICL8013C MIN TYP MAX MIN TYP MAX - XY 10 - - XY 10 - - - 1.0 - - 2.0 - 10Z X - - 10Z X - X = -10 - 0.3 - - 0.3 - % Full Scale X = -1 - 1.5 - - 1.5 - % Full Scale X = 0, Y = 10V - - 100 - - 200 mV Y = 0, X = 10V - - 100 - - 150 mV X Input X = 20VP-P Y= 10VDC - 0.5 - - 0.8 - % Y Input Y = 20VP-P X = 10VDC - 0.2 - - 0.3 - % Frequency Response Small Signal Bandwidth (-3dB) - 1.0 - - 1.0 - MHz Full Power Bandwidth - 750 - - 750 - kHz Slew Rate - 45 - - 45 - V/s 1% Amplitude Error - 75 - - 75 - kHz 1% Vector Error (0.5o Phase Shift) - 5 - - 5 - kHz - 1 - - 1 - s Multiplier Function Multiplication Error -10 < X < 10 -10 < Y < 10 Divider Function Division Error Feedthrough UNITS % Full Scale Non-Linearity Settling Time (to 2% of Final Value) VlN = 10V Overload Recovery (to 2% of Final Value) VlN = 10V - 1 - - 1 - s Output Noise 5Hz to 10kHz - 0.6 - - 0.6 - mVRMS 5Hz to 5MHz - 3 - - 3 - mVRMS X lnput - 10 - - 10 - M Y lnput - 6 - - 6 - M Z lnput - 36 - - 36 - k X or Y Input - - 7.5 - - 10 A Z Input - 25 - - 25 - A Input Resistance VlN = 0V Input Bias Current VlN = 0V 2 ICL8013 TA = 25oC, VSUPPLY = 15V, Gain and Offset Potentiometers Externally Trimmed, Unless Otherwise Specified (Continued) Electrical Specifications ICL8013B TEST CONDITIONS PARAMETER MIN TYP Multiplication Error - Output Offset - Scale Factor Quiescent Current ICL8013C MAX MIN TYP MAX UNITS 0.2 - - 0.2 - %/% - 75 - - 100 mV/V - 0.1 - - 0.1 - %/% - 3.5 6.0 - 3.5 6.0 mA Power Supply Variation THE FOLLOWING SPECIFICATIONS APPLY OVER THE OPERATING TEMPERATURE RANGES Multiplication Error -10V < XIN < 10V, -10V < YIN < 10V - 2 - - 3 - % Full Scale Accuracy - 0.06 - - 0.06 - %/oC Output Offset - 0.2 - - 0.2 - mV/oC Scale Factor - 0.04 - - 0.04 - %/oC X or Y Input - - 5 - - 10 A Z Input - - 25 - - 35 A - - 10 - - 10 V - 10 - - 10 - V Average Temp. Coefficients Input Bias Current VIN = 0V Input Voltage (X, Y, or Z) RL 2k CL < 1000pF Output Voltage Swing Schematic Diagram V+ R2 R8 R16 R23 R27 ZIN Q1 R9 YIN R1 XIN Q14 Q15 Q7 Q8 Q2 Q9 R13 Q21 Q16Q17 R20 Q10 R3 R6 R18 R7 Q22 R21 Q24 Q12 Q11 Q19 R31 R30 R28 Q23 Q18 R10 Q6 R33 ZOS Q26 COMMON Q5 Q25 R22 R17 Q4 Q3 C1 Q20 OUTPUT R29 Q27 YOS XOS R32 Q28 R4 R5 V- 3 Q13 R12 R11 R15 R19 R24 R25 R26 ICL8013 Application Information There are several difficulties with this simple modulator: Detailed Circuit Description The fundamental element of the ICL8013 multiplier is the bipolar differential amplifier of Figure 1. 1. VY must be positive and greater than VD. 2. Some portion of the signal at VX will appear at the output unless IE = 0. 3. VX must be a small signal for the differential pair to be linear. V+ RL 4. The output voltage is not centered around ground. RL The first problem relates to the method of converting the VY voltage to a current to vary the gain of the VX differential pair. A better method, Figure 3, uses another differential pair but with considerable emitter degeneration. In this circuit the differential input voltage appears across the common emitter resistor, producing a current which adds or subtracts from the quiescent current in either collector. This type of voltage to current converter handles signals from 0V to 10V with excellent linearity. VOUT VIN 2IE V- FIGURE 1. DIFFERENTIAL AMPLIFIER The small signal differential voltage gain of this circuit is given by: V+ IE + I VIN 1 kT Substituting r E = ------- = --------gM qI E VY I D -------- = 2I E and RY qR L V OUT = --------------- ( V X x V Y ) kTR Y V+ RL VOUT VOUT = K (VX x VY) = qRL kTRY (VX x VY) VIN 2IE RY ID + VD - VY D1 V- FIGURE 2. TRANSCONDUCTANCE MULTIPLIER 4 VIN RE IE V- The output voltage is thus proportional to the product of the input voltage VlN and the emitter current IE. In the simple transconductance multiplier of Figure 2, a current source comprising Q3, D1, and RY is used. If VY is large compared with the drop across D1, then RL I = IE qI E R L R L V OUT = V IN ------- = V IN x ------------------kT rE Q3 IE - I VOUT RL V OUT A V = ---------------- = ------V IN rE FIGURE 3. VOLTAGE TO CURRENT CONVERTER The second problem is called feedthrough; i.e., the product of zero and some finite Input signal does not produce zero output voltage. The circuit whose operation is illustrated by Figures 4A, 4B, and 4C overcomes this problem and forms the heart of many multiplier circuits in use today. This circuit is basically two matched differential pairs with cross coupled collectors. Consider the case shown in Figure 4A of exactly equal current sources basing the two pairs. With a small positive signal at VlN, the collector current of Q1 and Q4 will increase but the collector currents of Q2 and Q3 will decrease by the same amount. Since the collectors are cross coupled the current through the load resistors remains unchanged and independent of the VlN input voltage. In Figure 4B, notice that with VIN = 0 any variation in the ratio of biasing current sources will produce a common mode voltage across the load resistors. The differential output voltage will remain zero. In Figure 4C we apply a differential input voltage with unbalanced current sources. If IE1 is twice IE2 the gain of differential pair Q1 and Q2 is twice the gain of pair Q3 and Q4. Therefore, the change in cross coupled collector currents will be unequal and a differential output voltage will result. By replacing the separate biasing current sources with the voltage to current converter of Figure 3 we have a balanced multiplier circuit capable of four quadrant operation (Figure 5). ICL8013 V+ V+ RL IE VOUT = 0 1/ I + 2 E 1/ I - 2 E RL RL IE R V = K * (VX * VY) 1/ I + 2 E 1/ I - 2 E + + Q1 Q2 Q3 Q1 Q4 Q2 Q3 Q4 VIN VIN - - IE IE RE VIN V- IE IE FIGURE 4A. INPUT SIGNAL WITH BALANCED CURRENT SOURCES VOUT = 0V V+ RL RL VOUT = 0 IE 1/ I 2 E 1/ I 2 E IE + Q1 Q2 Q3 Q4 VIN = 0 2IE IE V- FIGURE 4B. NO INPUT SIGNAL WITH UNBALANCED CURRENT SOURCES VOUT = 0V V+ RL 3/ I + 2 RL 3/ I - 2 VOUT = 0 IE + 2 1/ I - 2 E 1/ I - 2 2 E 1/ I + 2 E + Q1 Q2 Q3 Q4 VIN - 2IE IE V- FIGURE 4C. INPUT SIGNAL WITH UNBALANCED CURRENT SOURCES, DIFFERENTIAL OUTPUT VOLTAGE This circuit of Figure 5 still has the problem that the input voltage VIN must be small to keep the differential amplifier in the linear region. To be able to handle large signals, we need an amplitude compression circuit. V- FIGURE 5. TYPICAL FOUR QUADRANT MULTIPLIERMODULATOR Figure 2 showed a current source formed by relying on the matching characteristics of a diode and the emitter base junction of a transistor. Extension of this idea to a differential circuit is shown in Figure 6A. In a differential pair, the input voltage splits the biasing current in a logarithmic ratio. (The usual assumption of linearity is useful only for small signals.) Since the input to the differential pair in Figure 6A is the difference in voltage across the two diodes, which in turn is proportional to the log of the ratio of drive currents, it follows that the ratio of diode currents and the ratio of collector currents are linearly related and independent of amplitude. If we combine this circuit with the voltage to current converter of Figure 3, we have Figure 6B. The output of the differential amplifier is now proportional to the input voltage over a large dynamic range, thereby improving linearity while minimizing drift and noise factors. The complete schematic is shown after the Electrical Specifications Table. The differential pair Q3 and Q4 form a voltage to current converter whose output is compressed in collector diodes Q1 and Q2. These diodes drive the balanced cross-coupled differential amplifier Q7/Q8 Q14/Q15. The gain of these amplifiers is modulated by the voltage to current converter Q9 and Q10. Transistors Q5, Q6, Q11, and Q12 are constant current sources which bias the voltage to current converter. The output amplifier comprises transistors Q16 through Q27. X x ID X x IE (I - X) IE (I - X) ID 2 IE FIGURE 6A. CURRENT GAIN CELL 5 ICL8013 ZIN V+ R= IO = XIN * YIN VOUT XIN YIN MODULATOR 1 10 VOUT = XIN YIN 10 OP AMP FIGURE 7A. MULTIPLIER BLOCK DIAGRAM VVIN ZIN V- FIGURE 6B. VOLTAGE GAIN WITH SIGNAL COMPRESSION XIN OUTPUT = 3 6 ICL8013 XIN YIN 4 10 1 YIN 5K 7 10 9 Definition of Terms Multiplication/Division Error: This is the basic accuracy specification. It includes terms due to linearity, gain, and offset errors, and is expressed as a percentage of the full scale output. Feedthrough: With either input at zero, the output of an ideal multiplier should be zero regardless of the signal applied to the other input. The output seen in a non-ideal multiplier is known as the feedthrough. Nonlinearity: The maximum deviation from the best straight line constructed through the output data, expressed as a percentage of full scale. One input is held constant and the other swept through it nominal range. The nonlinearity is the component of the total multiplication/division error which cannot be trimmed out. 7.5K XOS YOS ZOS FIGURE 7B. MULTIPLIER CIRCUIT CONNECTION Division If the Z terminal is used as an input, and the output of the op amp connected to the Y input, the device functions as a divider. Since the input to the op amp is at virtual ground, and requires negligible bias current, the overall feedback forces the modulator output current to equal the current produced by Z. Z IN Therefore I O = X IN * Y IN = ---------- = 10Z IN R 10Z IN Since Y IN = V OUT, V OUT = ----------------X IN Typical Applications Multiplication In the standard multiplier connection, the Z terminal is connected to the op amp output. All of the modulator output current thus flows through the feedback resistor R27 and produces a proportional output voltage. MULTIPLIER TRIMMING PROCEDURE 1. Set XIN = YIN = 0V and adjust ZOS for zero Output. 2. Apply a 10V low frequency (100Hz) sweep (sine or triangle) to YIN with XIN = 0V, and adjust XOS for minimum output. 3. Apply the sweep signal of Step 2 to XIN with YIN = 0V and adjust YOS for minimum Output. 4. Readjust ZOS as in Step 1, if necessary. 5. With XIN = 10.0VDC and the sweep signal of Step 2 applied to YIN, adjust the Gain potentiometer for Output = YIN. This is easily accomplished with a differential scope plugin (A+B) by inverting one signal and adjusting Gain control for (Output - YIN) = Zero. 6 Note that when connected as a divider, the X input must be a negative voltage to maintain overall negative feedback. DIVIDER TRIMMING PROCEDURE 1. Set trimming potentiometers at mid-scale by adjusting voltage on pins 7, 9 and 10 (XOS, YOS, ZOS) for 0V. 2. With ZIN = 0V, trim ZOS to hold the Output constant, as XIN is varied from -10V through -1V. 3. With ZIN = 0V and XIN = -10.0V adjust YOS for zero Output voltage. 4. With ZIN = XIN (and/or ZIN = -XIN) adjust XOS for minimum worst case variation of Output, as XIN is varied from -10V to -1V. 5. Repeat Steps 2 and 3 if Step 4 required a large initial adjustment. 6. With ZIN = XIN (and/or ZIN = -XIN) adjust the gain control until the output is the closest average around +10.0V (-10V for ZIN = -XIN) as XIN is varied from -10V to -3V. ICL8013 ZIN R= IZ output of the modulator is again forced to equal the current produced by the Z input. 1 10 VOUT = XIN MODULATOR YIN 10ZIN I O = X IN x Y IN = ( - V OUT ) 2 = 10Z IN XIN OP AMP IO V OUT = - 10Z IN The output is a negative voltage which maintains overall negative feedback. A diode in series with the op amp output prevents the latchup that would otherwise occur for negative input voltages. FIGURE 8A. DIVISION BLOCK DIAGRAM SQUARE ROOT TRIMMING PROCEDURE XOS YOS ZOS 7 XIN (0 TO -10V) 6 ZIN 3 10 1. Connect the ICL8013 in the Divider configuration. 9 OUTPUT = 2. Adjust ZOS, YOS, XOS, and Gain using Steps 1 through 6 of Divider Trimming Procedure. 10ZIN XIN ICL8013 3. Convert to the Square Root configuration by connecting XIN to the output and inserting a diode between Pin 4 and the output node. 4 1 YIN 5K GAIN 4. With ZIN = 0V adjust ZOS for zero output voltage. 7.5K Z R= FIGURE 8B. DIVISION CIRCUIT CONNECTION IZ 1 10 XIN Squaring VOUT = -10ZIN MODULATOR The squaring function is achieved by simply multiplying with the two inputs tied together. The squaring circuit may also be used as the basis for a frequency doubler since cos2t = 1/2 (cos 2t + 1). ZIN R= IO = XIN * YIN FIGURE 10A. SQUARE ROOT BLOCK DIAGRAM 1 10 XOS YOS ZOS XIN VOUT = X OP AMP IO = VO2 YIN OP AMP XIN2 7 10 10 9 XIN YIN (0V TO + 10V) 6 ZIN 3 YIN 1 FIGURE 9A. SQUARER BLOCK DIAGRAM 1N4148 OUTPUT = -10Z IN ICL8013 4 GAIN XIN 5k SCALE FACTOR ADJUST 5K 7.5K 3 OUTPUT = 6 ICL8013 1 XIN2 10 7.5k 7 10 9 XOS YOS ZOS FIGURE 9B. SQUARER CIRCUIT CONNECTION Square Root Tying the X and Y inputs together and using overall feedback from the op amp results in the square root function. The 7 FIGURE 10B. ACTUAL CIRCUIT CONNECTION 4 Variable Gain Amplifier Most applications for the ICL8013 are straight forward variations of the simple arithmetic functions described above. Although the circuit description frequently disguises the fact, it has already been shown that the frequency doubIer is nothing more than a squaring circuit. Similarly the variable gain amplifier is nothing more than a multiplier, with the input signal applied at the X input and the control voltage applied at the Y input. ICL8013 Z 3 6 INPUT XY 4 OUTPUT = 10 ICL8013 V+ 1 GAIN CONTROL VOLTAGE 5K 7.5K 7 10 9 XOS 20K YOS 20K 20K ZOS XOS YOS ZOS V- FIGURE 12. POTENTIOMETERS FOR TRIMMING OFFSET AND FEEDTHROUGH FIGURE 11. VARIABLE GAIN AMPLIFIER Typical Performance Curves NONLINEARITY (% OF FULL SCALE) 100 0 0 AMPLITUDE AMPLITUDE (dB) PHASE 10 -20 15 -30 -40 20 25 1K PHASE (DEGREES) -10 5 10K 100K FREQUENCY (Hz) -50 10M 1M 10 1 X-INPUT Y-INPUT 0.1 0.01 100 FIGURE 13. FREQUENCY RESPONSE 1K 10K FREQUENCY (Hz) 100K FIGURE 14. NONLINEARITY vs FREQUENCY -10 FEEDTHROUGH (dB) -20 X = 0, Y = 20VP-P -30 -40 -50 -60 Y = 0, X = 20VP-P -70 1K 10K 100K 1M 10M FREQUENCY (Hz) FIGURE 15. FEEDTHROUGH vs FREQUENCY All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. 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