LMC6572,LMC6574 LMC6572/LMC6574 Dual and Quad Low Voltage (2.7V and 3V) Operational Amplifier Literature Number: SNOS707C LMC6572/LMC6574 Dual and Quad Low Voltage (2.7V and 3V) Operational Amplifier General Description Features Low voltage operation and low power dissipation make the LMC6574/2 ideal for battery-powered systems. (Typical unless otherwise noted) n Guaranteed 2.7V and 3V Performance n Rail-to-Rail Output Swing (within 5 mV of supply rail, 100 k load) n Ultra-Low Supply Current: 40 A/Amplifier n Low Cost n Ultra-Low Input Current: 20 fA n High Voltage Gain @ VS=2.7V, RL=100 k: 120 dB n Specified for 100 k and 5 k loads n Available in MSOP Package 3V amplifier performance is backed by 2.7V guarantees to ensure operation throughout battery lifetime. These guarantees also enable analog circuits to operate from the same 3.3V supply used for digital logic. Battery life is maximized because each amplifier dissipates only micro-watts of power. The LMC6574/2 does not sacrifice functionality for low voltage operation. The LMC6574/2 generates 120 dB of openloop gain just like a conventional amplifier, but the LMC6574/2 can do this from a 2.7V supply. These amplifiers are designed with features that optimize low voltage operation. The output voltage swings rail-to-rail to maximize signal-to-noise ratio and dynamic signal range. The common-mode input voltage range extends from 800 mV below the positive supply to 100 mV below ground. This device is built with National's advanced Double-Poly Silicon-Gate CMOS process. LMC6572 is also available in MSOP package which is almost half the size of a SO-8 device. Applications n n n n n n Transducer Amplifier Portable or Remote Equipment Battery-Operated Instruments Data Acquisition Systems Medical Instrumentation Improved Replacement for TLV2322 and TLV2324 Connection Diagrams 8-Pin DIP/SO/MSOP 14-Pin DIP/SO 01193401 Order Number LMC6572AIN, LMC6572BIN, LMC6572AIM, LMC6572AIMX, LMC6572BIM, LMC6572BIMX, LMC6572BIMM or LMC6572BIMMX See NS Package Number N08E, M08A or MUA08A (c) 2004 National Semiconductor Corporation DS011934 01193402 Order Number LMC6574AIN, LMC6574BIN, LMC6574AIM, LMC6574AIMX, LMC6574BIM or LMC6574BIMX See NS Package Number N14A or M14A www.national.com LMC6572/LMC6574 Dual and Quad Low Voltage (2.7V and 3V) Operational Amplifier August 2000 LMC6572/LMC6574 Absolute Maximum Ratings (Note 1) Operating Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) 2000V Differential Input Voltage Supply Voltage Junction Temperature Range (V+) +0.3V, Voltage at Input/Output Pin (V-) -0.3V + - Supply Voltage (V - V ) 5 mA 10 mA Current at Output Pin (Note 3) Current at Power Supply Pin LMC6572AI, LMC6572BI -40C TJ +85C LMC6574AI, LMC6574BI -40C TJ +85C Thermal Resistance (JA) 12V Current at Input Pin 2.7V V+ 11V Supply Voltage 35 mA N Package, 8-Pin Molded DIP 115C/W M Package, 8-Pin Surface Mount 193C/W MSOP Package, 8-Pin Mini SO 217C/W N Package, 14-Pin Molded DIP Lead Temperature 81C/W M Package, 14-Pin Surface Mount (Soldering, 10 Seconds) 126C/W 260C Storage Temperature Range -65C to +150C Junction Temperature (Note 4) 150C 2.7V DC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1M. Boldface limits apply at the temperature extremes. Symbol VOS TCVOS Parameter Input Offset Voltage Conditions Typ (Note 5) V+ = 2.7V and 3V LMC6574AI LMC6574BI LMC6572AI LMC6572BI Limit Limit (Note 6) (Note 6) 0.5 Input Offset Voltage Units 3 7 mV 3.5 7.5 Max 1.5 V/C pA Average Drift IB Input Current 0.02 IOS Input Offset Current 0.01 RIN Input Resistance CIN Common-Mode 10 10 Max 6 6 Max pA >1 Tera 3 pF Input Capacitance CMRR +PSRR -PSRR VCM Common Mode 0V VCM 3.5V 75 63 60 dB 75 60 57 Min 67 60 dB 65 58 Min 75 67 dB 73 65 Min -0.05 -0.05 V 0 0 Max V+ - 1.0 V+ - 1.0 V V+ - 1.3 Min + Rejection Ratio V = 5V Positive Power Supply 2.7V V+ 5V, Rejection Ratio V- = 0V Negative Power Supply -2.7V V- -5V, Rejection Ratio V+ = 0V Input Common-Mode V+ = 2.7V and 3V Voltage Range for CMRR 50 dB 83 -0.1 V+ - 0.8 + V - 1.3 AV Large Signal RL = 100 k Voltage Gain (Note 7) www.national.com Sourcing 1000 V/mV Sinking 500 V/mV 2 (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25C. V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1M. Boldface limits apply at the temperature extremes. Symbol VO Parameter Output Swing Conditions Typ (Note 5) V+ = 2.7V Limit 2.68 2.65 V 2.66 2.62 Min 0.03 0.06 V 0.05 0.09 Max 2.55 2.45 V 2.45 2.35 Min 0.15 0.25 V 0.25 0.35 Max 2.98 2.95 V 2.96 2.93 Min 0.005 0.03 0.06 V 0.05 0.09 Max 2.96 2.85 2.75 V 2.75 2.65 Min 0.15 0.25 V 0.25 0.35 Max 4.0 3.0 mA 3.0 2.0 Min 0.005 2.66 + RL = 5 k to V /2 0.04 2.995 RL = 100 k to V+/2 RL = 5 k to V+/2 0.04 ISC Output Short Sourcing, VO = 0V 6.0 Circuit Current Sinking, VO = 2.7V IS Supply Current 4.0 Quad Package 3.0 2.5 mA 2.0 1.5 Min 240 240 A 280 280 Max 240 240 A 280 280 Max 80 120 120 A 140 140 Max 80 120 120 A 140 140 Max 160 V+ = +2.7V, VO = V+/2 Quad Package 160 V+ = +3V, VO = V+/2 Dual Package + + V = +2.7V, VO = V /2 Dual Package Units (Note 6) RL = 100 k to V /2 V+ = 3V LMC6572BI Limit 2.695 V+ = 3V LMC6574BI LMC6572AI (Note 6) + V+ = 2.7V LMC6574AI V+ = +3V, VO = V+/2 2.7V AC Electrical Characteristics Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol SR Parameter Slew Rate Conditions V+ = 2.7V and 3V Typ (Note 5) 90 (Note 8) + LMC6574BI LMC6572AI LMC6572BI Limit Limit (Note 6) (Note 6) Units 30 30 V/ms 10 10 Min GBW Gain-Bandwidth Product 0.22 MHz m Phase Margin 60 Deg Gm Gain Margin 12 dB (Note 9) 120 dB Input-Referred F = 1 kHz 45 nV/Hz Voltage Noise VCM = 1V Input-Referred F = 1 kHz 0.002 pA/Hz Amp-to-Amp Isolation en in V = 3V LMC6574AI 3 www.national.com LMC6572/LMC6574 2.7V DC Electrical Characteristics LMC6572/LMC6574 2.7V AC Electrical Characteristics (Continued) Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = VO = V+/2 and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Typ (Note 5) LMC6574AI LMC6574BI LMC6572AI LMC6572BI Limit Limit (Note 6) (Note 6) Units Current Noise T.H.D. Total Harmonic Distortion F = 10 kHz, AV = -2 0.05 % RL = 10 k, VO = 1.0 VPP Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 k in series with 100 pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Note 4: The maximum power dissipation is a function of TJ(Max), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(Max) - TA)/JA. All numbers apply for packages soldered directly into a PC board. Note 5: Typical values represent the most likely parametric norm. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V+ = 3V, VCM = 1.5V and RL connected to 1.5V. For Sourcing tests, 1.5V VO 2.5V. For Sinking tests, 0.5V VO 1.5V. Note 8: Connected as Voltage Follower with 1.0V step input. Number specified is the slower of the positive and negative slew rates. Note 9: Input referred, V+ = 3V and RL = 100 k connected to 1.5V. Each amp excited in turn with 1 KHz to produce VO = 2 VPP. Typical Performance Characteristics VS = +3V, TA = 25C, Unless otherwise specified Supply Current vs Supply Voltage (Dual Package) Input Current vs Temperature 01193419 01193418 Sourcing Current vs Output Voltage Sinking Current vs Output Voltage 01193421 01193420 www.national.com 4 Output Voltage Swing vs Supply Voltage (Continued) Input Voltage Noise vs Frequency 01193423 01193422 Crosstalk Rejection vs Frequency Positive PSRR vs Frequency 01193424 01193425 Negative PSRR vs Frequency CMRR vs Frequency 01193426 01193427 5 www.national.com LMC6572/LMC6574 Typical Performance Characteristics VS = +3V, TA = 25C, Unless otherwise specified LMC6572/LMC6574 Typical Performance Characteristics VS = +3V, TA = 25C, Unless otherwise specified Input Voltage vs Output Voltage (VS = 1.5) Open Loop Frequency Response 01193428 01193429 Open Loop Frequency Response vs Temperature Maximum Output Swing vs Frequency 01193430 01193431 Slew Rate vs Supply Voltage ZOUT vs Frequency 01193433 01193432 www.national.com (Continued) 6 Non-Inverting Large Signal Pulse Response (Continued) Non-Inverting Small Signal Pulse Response 01193434 01193435 Inverting Large Signal Pulse Response Inverting Small Signal Pulse Response 01193436 01193437 Stability vs Capacitive Load Stability vs Capacitive Load 01193438 01193439 7 www.national.com LMC6572/LMC6574 Typical Performance Characteristics VS = +3V, TA = 25C, Unless otherwise specified LMC6572/LMC6574 Typical Performance Characteristics VS = +3V, TA = 25C, Unless otherwise specified Stability vs Capacitive Load (Continued) Stability vs Capacitive Load 01193440 01193441 Bandwidth vs Capacitive Load Capacitive Load vs Phase Margin 01193445 01193444 Capacitive Load vs Gain Margin 01193446 output impedance and large gain. Special feed-forward compensation design techniques are incorporated to maintain stability over a wider range of operating conditions than traditional micropower op-amps. These features make the LMC6574/2 both easier to design with, and provide higher speed than products typically found in this ultra-low power class. Applications Hints 1.0 LOW VOLTAGE AMPLIFIER TOPOLOGY The LMC6574/2 incorporates a novel op-amp design topology that enables it to maintain rail-to-rail output swing even when driving a large load. Instead of relying on a push-pull unity gain output buffer stage, the output stage is taken directly from the internal integrator, which provides both low www.national.com 8 LMC6572/LMC6574 Applications Hints (Continued) 2.0 COMPENSATING FOR INPUT CAPACITANCE It is quite common to use large values of feedback resistance for amplifiers with ultra-low input current, like the LMC6574/2. Although the LMC6574/2 is highly stable over a wide range of operating conditions, a large feedback resistor will react even with small values of capacitance at the input of the op-amp to reduce phase margin. The capacitance at the input of the op-amp comes from transducers, photodiodes and circuit board parasitics. The effect of input capacitance can be compensated for by adding a capacitor, Cf, around the feedback resistors (as in Figure 1) such that: 01193407 FIGURE 2. LMC6574/2 Noninverting Gain of 10 Amplifier, Compensated to Handle Capacitive Loads or R1 CIN R2 Cf Since it is often difficult to know the exact value of CIN, Cf can be experimentally adjusted so that the desired pulse response is achieved. Refer to the LMC660 and LMC662 for a more detailed discussion on compensating for input capacitance. When high input impedances are demanded, guarding of the LMC6574/2 is suggested. Guarding input lines will not only reduce leakage, but lowers stray input capacitance as well. (See Printed-Circuit-Board Layout for High Impedance Work). In the circuit of Figure 2, R1 and C1 serve to counteract the loss of phase margin by feeding the high frequency component of the output signal back to the amplifier's inverting input, thereby preserving phase margin in the overall feedback loop. 4.0 PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with less than 1000 pA of leakage current requires special layout of the PC board. When one wishes to take advantage of the ultra-low bias current of the LMC6574/2, typically less than 20 fA, it is essential to have an excellent layout. Fortunately, the techniques of obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board, even though it may sometimes appear acceptably low, because under conditions of high humidity or dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6574/2's inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp's inputs, as in Figure 3. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of the input. This would cause a 250 times degradation from the LMC6574/2's actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011 would cause only 0.05 pA of leakage current. See Figure 4 for typical connections of guard rings for standard op-amp configurations. 01193406 FIGURE 1. Cancelling the Effect of Input Capacitance 3.0 CAPACITIVE LOAD TOLERANCE Direct capacitive loading will reduce the phase margin of many op-amps. A pole in the feedback loop is created by the combination of the op-amp's output impedance and the capacitive load. This pole induces phase lag at the unity-gain crossover frequency of the amplifier resulting in either an oscillatory or underdamped pulse response. With a few external components, op amps can easily indirectly drive capacitive loads, as shown in Figure 2. 9 www.national.com LMC6572/LMC6574 Applications Hints struction, but the advantages are sometimes well worth the effort of using point-to-point up-in-the-air wiring. See Figure 5. (Continued) 01193412 01193408 (Input pins are lifted out of PC board and soldered directly to components. All other pins connected to PC board). FIGURE 3. Example of Guard Ring in P.C. Board Layout FIGURE 5. Air Wiring 5.0 SPICE MACROMODEL A spice macromodel is available for the LMC6574/2. This model includes accurate simulation of: * input common-mode voltage range * frequency and transient response * GBW dependence on loading conditions * quiescent and dynamic supply current * output swing dependence on loading conditions and many more characteristics as listed on the macromodel disk. Contact your local National Semiconductor sales office to obtain an operational amplifier spice model library disk. 01193409 Inverting Amplifier Typical Single-Supply Applications 01193410 Non-Inverting Amplifier 01193413 FIGURE 6. Low-Power Two-Op-Amp Instrumentation Amplifier 01193411 Follower FIGURE 4. Typical Connections of Guard Rings The designer should be aware that when it is inappropriate to lay out a PC board for the sake of just a few circuits, there is another technique which is even better than a guard ring on a PC board: Don't insert the amplifier's input pin into the board at all, but bend it up in the air and use only air as an insulator. Air is an excellent insulator. In this case you may have to forego some of the advantages of PC board conwww.national.com 01193414 FIGURE 7. Sample and Hold 10 LMC6572/LMC6574 Typical Single-Supply Applications (Continued) 01193416 FIGURE 9. Adder/Subtractor Circuit 01193415 FIGURE 8. 1 Hz Square Wave Oscillator 01193417 FIGURE 10. Low Pass Filter Ordering Information Package Temperature Range NSC Drawing Industrial, -40C to +85C Transport Media 8-Pin Molded DIP LMC6572AIN, LMC6572BIN N08E 8-Pin Small Outline LMC6572AIM, LMC6572BIM M08A LMC6572AIMX, LMC6572BIMX Rail Rail Tape and Reel 8-Pin Mini SO LMC6572BIMM MUA08A 14-Pin Molded DIP LMC6574AIN, LMC6574BIN N14A Rail 14-Pin Small Outline LMC6574AIM, LMC6574BIM M14A Rail LMC6572BIMMX Rail Tape and Reel LMC6574AIMX, LMC6574BIMX 11 Tape and Reel www.national.com LMC6572/LMC6574 Physical Dimensions inches (millimeters) unless otherwise noted 8-Pin Small Outline Package Order Package Number LMC6572AIM, LMC6572AIMX, LMC6572BIM or LMC6572BIMX NS Package Number M08A 14-Pin Small Outline Package Order Package Number LMC6574AIM, LMC6574AIMX, LMC6574BIM or LMC6574BIMX NS Package Number M14A www.national.com 12 LMC6572/LMC6574 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 8-Lead Mini-Small Outline Molded Package, JEDEC Order Number LMC6572BIMM or LMC6572BIMMX NS Package Number MUA08A 8-Pin Molded Dual-In-Line Package Order Number LMC6572AIN or LMC6572BIN NS Package Number N08E 13 www.national.com LMC6572/LMC6574 Dual and Quad Low Voltage (2.7V and 3V) Operational Amplifier Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 14-Pin Molded Dual-In-Line Package Order Number LMC6574AIN or LMC6574BIN NS Package Number N14A National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. 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