LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
0
®
REVISION HISTORY
Revision Description Issue Date
Rev. 1.0 Initial Issue Dec.1.2006
Rev. 1.1 Revised VIH to TTL compatible Jan.9.2008
Rev. 1.2 Revised VIH to 0.7*Vcc Ma
y
.6.2008
Rev. 1.3 Revised VDR Mar.3.2009
Rev. 1.4 Revised VTERM to VT1 and VT2
Revised Test Condition of ISB1/IDR
Revised FEATURES & ORDERING INFORMATION
Lead free and green package available to Green package available
Added packing type in ORDERING INFORMATION
Deleted TSOLDER in ABSOLUTE MAXIMUN RATINGS
Adding PKG type : 32 TSOP-II
A
ug.5.2009
Rev. 1.5 Revised PACKAGE OUTLINE DIMENSION in page 9/10/11 Ma
y
.7.2010
Rev. 1.6 Revised typo in PIN CONFIGURATION Jul.21.2010
Rev. 1.7 Revised ORDERING INFORMATION in page 12
Revised PACKAGE OUTLINE DIMENSION in page 8/12
A
ug.25.2010
Rev. 1.8 Revised typo in REVISION HISTORY
ORDERING INFORMATION in page 12 to 13
Oct.29.2010
Rev. 1.9 Added SL Grade
Deleted E Grade
Revised ISB1/IDR
A
ug.9.2011
Rev. 1.10 Added PKG type : 32 P-DIP No
v
.24.2011
Rev. 1.11 Revised “Standby Power Supply Current” in page 4
Revised “Data Retention Current” in page 8
A
pr.30.2012
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
1
®
FEATURES
Fast access time : 55/70ns
Low power consumption:
Operating current : 30/20mA (TYP.)
Standby current : 4μA (TYP.) LL-version
3μA (TYP.) SL-version
Single 2.7V ~ 5.5V power supply
All outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 1.5V (MIN.)
Green package av ailable
Package : 32-pin 450 mil SOP
32-pin 8mm x 20mm TSOP-I
32-pin 8mm x 13.4mm STSOP
36-ball 6mm x 8mm TFBGA
GENERAL DESCRIPTION
The LY62W5128 is a 4,194,304-bit low power
CMOS static random access memory organized as
524,288 words by 8 bits. It is fabricated using very
high performance, high reliability CMOS technology.
Its standby current is stable within the range of
operating temperature.
The LY62W5128 is well designed for very low power
system applications, and particularly well suited for
battery back-up nonvolatile memory application.
The LY62W5128 operates from a single power
supply of 2.7V ~ 5.5V and all inputs and outputs are
fully TTL compatible
32-pin 400 mil TSOP-II
32-pin 600 mil P-DIP
PRODUCT FAMILY
Product
Family
Operating
Temperature Vcc Range Speed Power Dissipation
Standby(ISB1TYP.) Operating(Icc,TYP.)
LY62W5128 0 ~ 70℃ 2.7 ~ 5.5V 55/70ns 4µA(LL)/3µA(SL) 30/20mA
LY62W5128(I) -40 ~ 85℃ 2.7 ~ 5.5V 55/70ns 4µA(LL)/3µA(SL) 30/20mA
FUNCTIONAL BLOCK DIAGRAM
DECODER
I/O DATA
CIRCUIT
CONTROL
CIRCUIT
512Kx8
MEMORY ARRAY
COLUMN I/O
A0-A18
Vcc
Vss
DQ0-DQ7
CE#
WE#
OE#
PIN DESCRIPTION
SYMBOL DESCRIPTION
A0 - A18 Address Inputs
DQ0 – DQ7 Data Inputs/Outputs
CE# Chip Enable Inputs
WE# Write Enable Input
OE# Output Enable Input
VCC Power Supply
VSS Ground
NC No Connection
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
2
®
PIN CONFIGURATION
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
3
®
TFBGA(Top View)
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
4
®
ABSOLUTE MAXIMUN RATINGS*
PARAMETER SYMBOL RATING UNIT
Voltage on VCC relative to VSS VT1 -0.5 to 6.5 V
Voltage on any other pin relative to VSS VT2 -0.5 to VCC+0.5 V
Operating Temperature TA 0 to 70(C grade) ℃
-40 to 85(I grade)
Storage Temperature TSTG -65 to 150 ℃
Power Dissipation PD 1 W
DC Output Current IOUT 50 mA
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this
specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.
TRUTH TABLE
MODE CE# OE# WE#
I/O OPERATION SUPPLY CURRENT
Standby H X X High-Z ISB1
Output Disable L H H High-Z ICC,ICC1
Read L L H DOUT I
CC,ICC1
Write L X L DIN I
CC,ICC1
Note: H = VIH, L = VIL, X = Don't care.
DC ELECTRICAL CHARACTERISTICS
PARAMETER SYMBOL TEST CONDITION MIN. TYP.
*
4
MAX. UNIT
Supply Voltage VCC 2.7 3.0 5.5 V
Input High Voltage VIH
*1
0.7*VCC - VCC+0.3 V
Input Low Voltage VIL
*2
- 0.2 - 0.6 V
Input Leakage Current ILI V
CC ≧ VIN ≧ VSS - 1 - 1
µA
Output Leakage
Current ILO VCC ≧ VOUT ≧VSS,
Output Disabled - 1 - 1 µA
Output High Voltage VOH I
OH = -1m
A
2.4 2.7 - V
Output Low Voltage VOL I
OL = 2m
- - 0.4 V
Average Operating
Power supply Current
ICC
Cycle time = Min.
CE# = VIL and CE2 = VIH,
II/O = 0mA
Other pins at VIL or VIH
- 55 - 30 60
mA
- 70 - 20 50 mA
ICC1
Cycle time = 1µs
CE#≦0.2V and CE2≧VCC-0.2V,,
II/O = 0mA
Other pins at 0.2V or VCC-0.2V
- 4 10 mA
Standby Power
Supply Current ISB1
CE# V≧CC-0.2V
or CE2≦0.2V
Others at 0.2V or
VCC - 0.2V
LL/LLI - 4 50
µA
SL
*
5
SLI*5
25℃- 3 10
µA
40℃- 3 10
µA
SL/SLI - 3 25
µA
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
®
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical values are measured at VCC = VCC(TYP.) and TA = 25℃
5. This parameter is measured at VCC = 3.0V
CAPACITANCE (TA = 25 , f℃ = 1.0MHz)
PARAMETER SYMBOL MIN. MA
X
UNIT
Input Capacitance CIN -6 pF
Input/Output Capacitance CI/O -8 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels 0.2V to VCC -0.2V
Input Rise and Fall Times 3ns
Input and Output Timing Reference Levels 1.5V
Output Load CL= 30pF + 1TTL, IOH
/
IOL = -2mA/4m
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER SYM. LY62W5128-55 LY62W5128-70 UNIT
MIN. MAX. MIN. MAX.
Read Cycle Time tRC 55 - 70 - ns
A
ddress Access Time tAA - 55 - 70 ns
Chip Enable Access Time tACE - 55 - 70 ns
Output Enable Access Time tOE - 30 - 35 ns
Chip Enable to Output in Low-Z tCLZ* 10 - 10 - ns
Output Enable to Output in Low-Z tOLZ*5 - 5 - ns
Chip Disable to Output in High-Z tCHZ* - 20 - 25 ns
Output Disable to Output in High-Z tOHZ* - 20 - 25 ns
Output Hold from Address Change tOH 10 - 10 - ns
(2) WRITE CYCLE
PARAMETER SYM. LY62W5128-55 LY62W5128-70 UNIT
MIN. MAX. MIN. MAX.
Write Cycle Time
t
WC 55 - 70 - ns
A
ddress Valid to End of Write tAW 50 - 60 - ns
Chip Enable to End of Write tCW 50 - 60 - ns
A
ddress Set-up Time tAS 0-0- ns
Write Pulse Width
t
WP 45 - 55 - ns
Write Recovery Time
t
WR 0-0- ns
Data to Write Time Overlap tDW 25 - 30 - ns
Data Hold from End of Write Time tDH 0-0- ns
Output Active from End of Write tOW*5 - 5 - ns
Write to Output in High-Z
t
WHZ* - 20 - 25 ns
*These parameters are guaranteed by device characterization, but not production tested.
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
6
®
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Dout Data Valid
tOHtAA
Address
tRC
Previous Data Valid
READ CYCLE 2 (CE# and OE# Controlled) (1,3,4,5)
Dout Data Valid
tOH
OE#
tACE
CE#
tAA
Address
tRC
High-ZHigh-Z
tCLZ
tOLZ
tOE
tCHZ
tOHZ
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low.
3.Address must be valid prior to or coincident with CE# = low,; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
7
®
WRITE CYCLE 1 (WE# Controlled) (1,2,3,5,6)
Dout
Din Data Valid
tDW tDH
(4) High-Z
tWHZ
WE#
tWP
tCW
CE#
tWRtAS
tAW
Address
tWC
(4)
TOW
WRITE CYCLE 2 (CE# Controlled) (1,2,5,6)
Dout
Din Data Valid
tDW tDH
(4) High-Z
tWHZ
WE#
tWP
tCW
CE# tWRtAS
tAW
Address
tWC
Notes :
1.WE#, CE# must be high during all address transitions.
2.A write occurs during the overlap of a low CE#, low WE#.
3.During a WE# controlled write cycle with OE# low, tWP must be greater than tWHZ + tDW to allow the drivers to turn off and data to be
placed on the bus.
4.During this period, I/O pins are in the output state, and input signals must not be applied.
5.If the CE# low transition occurs simultaneously with or after WE# low transition, the outputs remain in a high impedance state.
6.tOW and tWHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
8
®
DATA RETENTION CHARACTERISTICS
PARAMETER SYMBO
L
TEST CONDITION MIN. TYP. MAX. UNIT
VCC for Data Retention VDR CE# V≧CC -0.2Vor CE2 ≦0.2V 1.5 - 5.5 V
Data Retention Current IDR
VCC = 1.5V
CE# V≧CC - 0.2V
or CE2 ≦ 0.2V
Other pins at 0.2V or VCC-0.2
V
LL/LLI - 2 30
µA
SL
SLI
25℃- 2 8
µA
40℃- 2 8
µA
SL/SLI - 2 23
µA
Chip Disable to Data
Retention Time tCDR See Data Retention
Waveforms (below) 0 - - ns
Recovery Time tR t
RC*- - ns
tRC* = Read Cycle Time
DATA RETENTION WAVEFORM
Vcc
CE#
VDR ≧1.5V
CE# V≧cc-0.2V
Vcc(min.)
VIH
tRtCDR
VIH
Vcc(min.)
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
9
®
PACKAGE OUTLINE DIMENSION
32 pin 450 mil SOP Package Outline Dimension
UNIT
SYM. INCH.(BASE) MM(REF)
A 0.120(MAX) 3.048(MAX)
A1 0.004(MIN) 0.102(MIN)
A2 0.116(MAX) 2.946(MAX)
b 0.016(TYP) 0.406(TYP)
c 0.008(TYP) 0.203(TYP)
D 0.817(MAX) 20.75(MAX)
E 0.445±0.006 11.303±0.152
E1 0.555±0.025 14.097±0.635
e 0.050(TYP) 1.270(TYP)
L 0.033±0.017 0.838±0.432
L1 0.055±0.008 1.397±0.203
S 0.026(MAX) 0.660(MAX)
y 0.004(MAX) 0.101(MAX)
Θ 0o -10o 0
o -10o
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
10
®
32 pin 8mm x 20mm TSOP-I Package Outline Dimension
UNIT
SYM. INCH(BASE) MM(REF)
A 0.047 (MAX) 1.20 (MAX)
A1 0.004 ±0.002 0.10
±0.05
A2 0.039 ±0.002 1.00
±0.05
b 0.009 ±0.002 0.22
±0.05
c 0.006 ±0.002 0.155
±0.055
D 0.724 ±0.008 18.40
±0.20
E 0.315 ±0.008 8.00
±0.20
e 0.020 (TYP) 0.50 (TYP)
HD 0.787 ±0.008 20.00
±0.20
L 0.024 ±0.004 0.60
±0.10
L1 0.0315 ±0.004 0.08 ±0.10
y 0.003 (MAX) 0.08 (MAX)
Θ 0o～5o 0
o～5o
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
11
®
32 pin 8mm x 13.4mm STSOP Packag e Outline Dimension
UNIT
SYM. INCH(BASE) MM(REF)
A 0.049 (MAX) 1.25 (MAX)
A1 0.004 ±0.002 0.10
±0.05
A2 0.039 ±0.002 1.00
±0.05
b 0.009 ±0.002 0.22
±0.05
c 0.006 ±0.002 0.155
±0.055
D 0.465 ±0.008 11.80
±0.20
E 0.315 ±0.008 8.00
±0.20
e 0.020 (TYP) 0.50 (TYP)
HD 0.528±0.008 13.40
±0.20.
L 0.02 ±0.008 0.50
±0.20
L1 0.031 ±0.005 0.8
±0.125
y 0.003 (MAX) 0.076 (MAX)
Θ 0o～5o 0
o～5o
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
12
®
36 ball 6mm × 8mm TFBGA Package Outline Dimension
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
13
®
32-pin 400mil TSOP-Ⅱ Package Outline Dimension
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
14
®
32 pin 600 mil P-DIP Package Outline Dimension
Note : D/E1/S dimension do not include mold flash.
UNIT
SYM. INCH(BASE) MM(REF)
A1 0.015(MIN) 0.381(MIN)
A2 0.155±0.005 3.937±0.127
B 0.018±0.005 0.457±0.127
D 1.650±0.01 41.910±0.254
E 0.600±0.010 15.240±0.254
E1 0.545±0.005 13.843±0.127
e 0.100(TYP) 2.540(TYP)
eB 0.650±0.020 16.510±0.508.
L 0.158±0.043 4.013±1.092
S 0.075±0.010 1.905±0.254
Q1 0.070±0.005 1.778±0.127
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
15
®
ORDERING INFORMATION
LY62W5128
Rev. 1.11 512K X 8 BIT LOW POWER CMOS SRAM
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
16
®
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