1. General description
The 74LV00 is a low-voltage Si-g ate CMOS device that is pin and function comp atible with
74HC00 and 74HCT00.
The 74LV00 provides a quad 2-input NAND function.
2. Features and benefits
Wide operating voltage: 1.0 V to 5.5 V
Optimized for low voltage applications: 1.0 V to 3.6 V
Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 C
Typical HIGH-level output vo ltage (VOH) undershoot: > 2 V at VCC = 3.3 V and
Tamb = 25 C
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specifie d from 40 Cto+85C and fr om 40 Cto+125C
3. Ordering information
74LV00
Quad 2-input NAND gate
Rev. 4 — 9 December 2015 Product data sheet
Tabl e 1. Ordering information
Type number Package
Tempe rature range Name Description Version
74LV00D 40 Cto+125C SO14 plastic small outline package; 14 leads;
body width 3.9 mm SOT108-1
74LV00DB 40 Cto+125C SSOP14 plastic shrink small outline package; 14 leads;
body width 5.3 mm SOT337-1
74LV00PW 40 Cto+125C TSSOP14 plastic thin shrink small outline package; 14 leads;
body width 4.4 mm SOT402-1
74LV00BQ 40 Cto+125C DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 30.85 mm
SOT762-1
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 2 of 14
Nexperia 74LV00
Quad 2-input NAND gate
4. Functional diagram
5. Pinning information
5.1 Pinning
Fig 1. Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram (one gate)
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(1) This is not a supply pin. The substrate is attached to this
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electrical or mechanical requirement to solder this pad.
However, if it is soldered, the solder land should remain
floating or be connected to VCC.
Fig 4. Pin configuration SO14 and (T)SSOP14 Fig 5. Pin configuration DHVQFN14
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© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 3 of 14
Nexperia 74LV00
Quad 2-input NAND gate
5.2 Pin description
6. Functional description
[1] H = HIGH voltage level; L = LOW voltage level; X = don’t care
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] Ptot derates linearly with 8 mW/K above 70 C.
[3] Ptot derates linearly with 5.5 mW/K above 60 C.
[4] Ptot derates linearly with 4.5 mW/K above 60 C.
Table 2. Pin description
Symbol Pin Description
1A to 4A 1, 4, 9, 12 data input
1B to 4B 2, 5, 10, 13 data input
1Y to 4Y 3, 6, 8, 11 data output
GND 7 ground (0 V)
VCC 14 supply voltage
Table 3. Function table[1]
Input Output
nA nB nY
LXH
XLH
HHL
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage 0.5 +7.0 V
IIK input clamping current VI < 0.5 V or VI>V
CC +0.5V [1] -20 mA
IOK output clamping current VO<0.5 V or VO>V
CC +0.5V [1] -50 mA
IOoutput curren t VO = 0.5 V to (VCC +0.5V) - 25 mA
ICC supply current - 50 mA
IGND ground current 50 - mA
Tstg storage temperature 65 +150 C
Ptot total power dissipation Tamb = 40 C to +125 C
SO14 package [2] -500mW
(T)SSOP14 package [3] -500mW
DHVQFN14 package [4] -500mW
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 4 of 14
Nexperia 74LV00
Quad 2-input NAND gate
8. Recommended operating conditions
[1] The static characteristics are guaranteed from VCC = 1.2 V to VCC = 5.5 V, but LV devices are guaranteed to function down to
VCC = 1.0 V (with input levels GND or VCC).
9. Static characteristics
Table 5. Recommended operating conditions
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Typ Max Unit
VCC supply voltage [1] 1.0 3.3 5.5 V
VIinput voltage 0 - VCC V
VOoutput voltage 0 - VCC V
Tamb ambient temperature 40 +25 +125 C
t/V input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V
VCC = 2.0 V to 2.7 V - - 200 ns/V
VCC = 2.7 V to 3.6 V - - 100 ns/V
VCC = 3.6 V to 5.5 V - - 50 ns/V
Table 6. Static characteristics
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
VIH HIGH-level input voltage VCC = 1.2 V 0.9 - - 0.9 - V
VCC = 2.0 V 1.4 - - 1.4 - V
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 4.5 V to 5.5 V 0.7VCC - - 0.7VCC -V
VIL LOW-level input voltage VCC = 1.2 V - - 0.3 - 0.3 V
VCC = 2.0 V - - 0.6 - 0.6 V
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VCC = 4.5 V to 5.5 V - - 0.3VCC -0.3V
CC V
VOH HIGH-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.2 V - 1.2 - - - V
IO = 100 A; VCC = 2.0 V 1.8 2.0 - 1.8 - V
IO = 100 A; VCC = 2.7 V 2.5 2.7 - 2.5 - V
IO = 100 A; VCC = 3.0 V 2.8 3.0 - 2.8 - V
IO = 100 A; VCC = 4.5 V 4.3 4.5 - 4.3 - V
IO = 6 mA; VCC = 3.0 V 2.4 2.82 - 2.2 - V
IO = 12 mA; VCC = 4.5 V 3.6 4.2 - 3.5 - V
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 5 of 14
Nexperia 74LV00
Quad 2-input NAND gate
[1] Typical values are measured at Tamb = 25 C.
10. Dynamic characteristics
[1] All typical values are measured at Tamb =25C.
[2] tpd is the same as tPLH and tPHL.
[3] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V).
[4] CPD is used to determine the dynamic power dissipation (PDin W).
PD=C
PD VCC2fiN+(CLVCC2fo) where:
fi= input frequency in MHz, fo= output frequency in MHz
CL= output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
(CLVCC2fo) = sum of the outputs.
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 A; VCC = 1.2 V - 0 - - - V
IO = 100 A; VCC = 2.0 V - 0 0.2 - 0.2 V
IO = 100 A; VCC = 2.7 V - 0 0.2 - 0.2 V
IO = 100 A; VCC = 3.0 V - 0 0.2 - 0.2 V
IO = 100 A; VCC = 4.5 V - 0 0.2 - 0.2 V
IO = 6 mA; VCC = 3.0 V - 0.25 0.40 - 0.50 V
IO = 12 mA; VCC = 4.5 V - 0.35 0.55 - 0.65 V
IIinput leakage current VI=V
CC or GND; VCC = 5.5 V - - 1.0 - 1.0 A
ICC supply current VI = VCC or GND; IO = 0 A;
VCC =5.5V - - 20.0 - 40 A
ICC additional supply current per input; VI = V CC 0.6 V;
VCC = 2.7 V to 3.6 V --500-850A
CIinput capacitance - 3.5 - - - pF
Table 6. Static characteristics …continued
Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
Table 7. Dynamic characteristics
GND = 0 V; For test circuit see Figure 7.
Symbol Parameter Conditions 40 C to +85 C40 C to +125 CUnit
Min Typ[1] Max Min Max
tpd propagation delay nA, nB to nY; see Figure 6 [2]
VCC = 1.2 V - 45 - - - ns
VCC = 2.0 V - 15 26 - 31 ns
VCC = 2.7 V - 11 18 - 23 ns
VCC = 3.0 V to 3.6 V; CL=15pF [3] -7- - -ns
VCC = 3.0 V to 3.6 V [3] -9.015 - 18ns
VCC = 4.5 V to 5.5 V [3] -6.511 - 14ns
CPD power dissipation
capacitance CL=50pF; f
i = 1 MHz;
VI=GNDtoV
CC
[4] -22- - -pF
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 6 of 14
Nexperia 74LV00
Quad 2-input NAND gate
11. Waveforms
Measurement points are given in Table 8.
VOL and VOH are typical voltage output levels that occur with the output load.
Fig 6. The input (nA, nB) to output (nY) propagation delays
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Table 8. Measurement points
Supply voltage Input Output
VCC VMVM
< 2.7 V 0.5VCC 0.5VCC
2.7 V to 3.6 V 1.5 V 1.5 V
4.5 V 0.5VCC 0.5VCC
Test data is given in Table 9.
Definitions test circuit:
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
Fig 7. Test circuit for measuring switching times
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Table 9. Test data
Supply voltage Input
VCC VItr, tf
< 2.7 V VCC 2.5 ns
2.7 V to 3.6 V 2.7 V 2.5 ns
4.5 V VCC 2.5 ns
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 7 of 14
Nexperia 74LV00
Quad 2-input NAND gate
12. Package outline
Fig 8. Package outline SOT108-1 (SO14)
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© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 8 of 14
Nexperia 74LV00
Quad 2-input NAND gate
Fig 9. Package outline SOT337-1 (SSOP14)
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© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 9 of 14
Nexperia 74LV00
Quad 2-input NAND gate
Fig 10. Package outline SOT402-1 (TSSOP14)
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© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 10 of 14
Nexperia 74LV00
Quad 2-input NAND gate
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© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 11 of 14
Nexperia 74LV00
Quad 2-input NAND gate
13. Abbreviations
14. Revision history
Table 10. Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
Table 11. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LV00 v.4 20151209 Product data sheet - 74LV00 v.3
Modifications: •Type number 74LV00N (SOT27-1) removed.
74LV00 v.3 20071220 Product data sheet - 74LV00 v.2
Modifications: •The format of this data sheet has been redesigned to comply with the new identity guidelines
of NXP Semiconductors.
•Legal texts have been adapted to the new company name where appropriate.
•Section 3: DHVQFN14 package added.
•Section 7: derating values added for DHVQFN14 package.
•Section 12: outline drawing added for DHVQFN14 package.
74LV00 v.2 19980420 Product specification - 74LV00 v.1
74LV00 v.1 19970203 Product specification - -
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 12 of 14
Nexperia 74LV00
Quad 2-input NAND gate
15. Legal information
15.1 Data sheet status
[1] Please consult the most recently issued document before initiating or completing a design.
[2] The term ‘short data sheet’ is explained in section “Definitions”.
[3] The product status of de vice(s) descr ibed in th is document m ay have cha nged since thi s document w as publish ed and may di ffe r in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nexperia.com.
15.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liab ility for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and tit le. A short data sh eet is intended
for quick reference only and shou ld not b e relied u pon to cont ain det ailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall pre va il.
Product specificatio n — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the Nexperia product is
deemed to off er functions and qualities beyond those described in the
Product data sheet.
15.3 Disclaimers
Limited warr a nty and liability — Information in this document is believed to
be accurate and reliable. However, Nexperia does not give any
representations or warrant ies, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no
responsibility for the content in this document if provided by an information
source outside of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental,
punitive, special or consequ ential damages (including - wit hout limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all informa tion supplied prior
to the publication hereof .
Suitability for use — Nexperia products are not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where f ailure or
malfunction of a Nexperia product can reasonably be expected
to result in perso nal injury, death or severe property or environmental
damage. Nexperia and its suppliers accept no liability for
inclusion and/or use of Nexperia products in such equipment or
applications and ther efore such inclu sion and/or use is at the cu stomer’s own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and ope ration of their applications
and products using Nexperia products, and Nexperia
accepts no liability for any assistance with applications or cust omer product
design. It is customer’s sole responsibility to determine whether the Nexperia
product is suitable and fit for the customer’s applications and
products planned, as well as fo r the planned application and use of
customer’s third party customer(s). Custo mers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
Nexperia does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party custo mer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using Nexperia
products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). Nexperia does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nexperia.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. Nexperia hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of Nexperia products by customer.
No offer to sell or license — Nothing i n this document may be interpreted or
construed as an of fer t o sell product s that is open for accept ance or the gr ant,
conveyance or implication of any license under any copyrights, patents or
other industrial or inte llectual property rights.
Document status[1][2] Product status[3] Definition
Objective [short] data sheet Development This document contain s data from the objective specification for product development.
Preliminary [short] dat a sheet Qualification This document contains data from the preliminary specification.
Product [short] data sheet Production This document cont ains the product specification.
© Nexperia B.V. 2017. All rights reserved
74LV00 All information provided in this document is subject to legal disclaimers.
Product data sheet Rev. 4 — 9 December 2015 13 of 14
Nexperia 74LV00
Quad 2-input NAND gate
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified,
the product is not suitable for automotive use. It i s neit her qua lif ied nor test ed
in accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of
non-automotive qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automot ive specifications and standards, custome r
(a) shall use the product without Nexperia’s warranty of the
product for such au tomotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies Nexperia for any
liability, damages or failed product claims resulting from custome r design and
use of the product for automotive applications beyond Nexperia’s
standard warranty and Nexperia’s product specifications.
Translations — A non-English (t ranslated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
15.4 Trademarks
Notice: All referenced b rands, produc t names, service names and trademarks
are the property of their respective ow ners.
16. Contact information
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Nexperia 74LV00
Quad 2-input NAND gate
17. Contents
1 General description. . . . . . . . . . . . . . . . . . . . . . 1
2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1
3 Ordering information. . . . . . . . . . . . . . . . . . . . . 1
4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2
5 Pinning information. . . . . . . . . . . . . . . . . . . . . . 2
5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3
6 Functional description . . . . . . . . . . . . . . . . . . . 3
7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3
8 Recommended operating conditions. . . . . . . . 4
9 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4
10 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5
11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 7
13 Abbreviations. . . . . . . . . . . . . . . . . . . . . . . . . . 11
14 Revision history. . . . . . . . . . . . . . . . . . . . . . . . 11
15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12
15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12
15.2 Definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
15.3 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
15.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13
16 Contact information. . . . . . . . . . . . . . . . . . . . . 13
17 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
© Nexperia B.V. 2017. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release:
09 December 2015
