AMERICAN MICROSYSTEMS, INC.
Februar y 2001
This document contains information on a product under development. American Microsystems, Inc. reserves the right to change or discontinue this product without notice. 2.2.01
FS6322-08
FS6322-08FS6322-08
FS6322-08
Three-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator ICThree-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator IC
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ISO9001
ISO9001ISO9001
ISO9001
1.0 Features
Three PLLs with deep reference, feedback, and post
dividers to provide precision clock frequencies
Multiple outputs provide several clocking options
Outputs may be tristated for board testing
S0, S1, and S2 inputs modify output frequencies for
design flexibility
3.3V operation
Custom frequency patterns, pinouts, and packages
are available. Contact your local AMI Sales Repre-
sentative for more information.
2.0 Description
The FS6322 is a ROM-based CMOS clock generator IC
designed to minimize cost and component count in a va-
riety of electronic systems.
Thr ee low-jitter phase-locked loops (PL Ls ) driv e u p to five
low-skew clock outputs to provide a high degree of flexi-
bility. The device is packaged in a 16-pin SOIC to mini-
mize board space.
High-resolution divider capability permits generation of
desired frequencies.
Figure 1: Pin Configuration
116
2
3
4
5
6
7
8
15
14
13
12
11
10
9
CLK_C
VDD
VSS
XIN
XOUT/REFIN
CLK_E
CLK_D
CLK_F CLK_B
CLK_A
VSS
S0
S1
VDD
S2
OE
FS6322
16-pin (0.150”) SOIC
Figure 2: Block Diagram
FS6322-08
Crystal
Oscillator
XOUT
XIN
PLL A
PLL B
PLL C
Clock
Logic
CLK_E
CLK_F
CLK_A
CLK_B
CLK_C
CLK_D
S2:S0
OE
Device
Control
Februar y 2001
22.2.01
FS6322-08
FS6322-08FS6322-08
FS6322-08
Three-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator ICThree-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator IC
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Table 1: Pin Descriptions
Key: AI = Analog Input; AO = Analog Output; DI = Digital Input; DIU = Input with Internal Pull-Up; DID = Input with Internal Pull-Down; DIO = Digital Input/Output; DI-3 = Three-Level Digital Input,
DO = Digital Output; P = Power/Ground; # = Active Low pin
PIN TYPE NAME DESCRIPTION
1 DO CLK_C C clock output
2 P VDD Power supply (3.3V nominal – see version specific information)
3 P VSS Ground
4 AI XOUT / REFIN Crystal oscillator drive / external reference input
5 AO XIN Crystal oscillator feedback
6 DO CLK_E E clock output
7 DO CLK_D D clock output
8 DO CLK_F F clock output
9 DO CLK_B A clock output
10 DO CLK_A B clock output
11 P VSS Ground
12 DIUS0 Frequency select control input
13 DIUS1 Frequency select control input
14 P V DD Power supply (5V to 3.3V)
15 DIUS2 Frequency select control input
16 DIUOE Output enable input: logic-high enables outputs; logic-low tristates outputs (high impedance)
Table 2: Frequency Table – FS6322-08 (3.3volt)
S2 S1 S0 FREF CLK_A
(pin 10) CLK_B
(pin 9) CLK_C
(pin 1) CLK_D
(pin 7) CLK_E
(pin 6) CLK_F
(pin 8)
000 23.3560 48.00956 0.00000 32.69840 0.00000 0.00000 0.00000
001 13.5000 27.00000 108.00000 33.33333 11.28960 0.00000 0.00000
010 12.5000 0.00000 125.00000 25.00000 0.00000 0.00000 0.00000
011 25.0000 0.00000 125.00000 25.00000 0.00000 0.00000 0.00000
100 24.54545 36.00000 0.00000 24.54545 0.00000 0.00000 0.00000
101 13.5000 27.00000 108.00000 33.33333 12.28800 0.00000 0.00000
110 14.31818 48.00802 0.00000 14.31818 66.66422 0.00000 33.33211
111 14.7456 48.00512 0.00000 14.74560 66.66894 0.00000 33.33447
AMERICAN MICROSYSTEMS, INC.
Februar y 2001
32.2.01
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FS6322-08
FS6322-08FS6322-08
FS6322-08
Three-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator ICThree-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator IC
3.0 Electrical Specifications
Table 3: Absolute Maximum Ratings
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These conditions represent a stress rating only, and functional operation of the device at
these or any other conditions above the operational limits noted in this specification is not implied. Exposure to maximum rating conditions for extended conditions may affect device performance,
functionality, and reliability.
PARAMETER SYMBOL MIN. MAX. UNITS
Supply Voltage, dc (VSS = ground) VDD VSS-0.5 7 V
Input Voltage, dc VIVSS-0.5 VDD+0.5 V
Output Voltage, dc VOVSS-0.5 VDD+0.5 V
Input Clamp Current, dc (V I < 0 or VI > VDD)I
IK -50 50 mA
Output Clamp Current, dc (VI < 0 or VI > VDD)I
OK -50 50 mA
Storage Temperature Range (non-condensing) TS-65 150 °C
Ambient Temperature Range, Under Bias TA-55 125 °C
Junction Temperature TJ150 °C
Lead Temperature (soldering, 10s) 260 °C
Input Static Disc harge Voltage Protection (MIL-STD 883E, Method 3015.7) 2 kV
CAUTION: ELECTROSTATIC SENSITIVE DEVICE
Permanent damage res ulting in a loss of functi onality or performance may occur if this devic e is subjected to a high-energy elec-
trostatic discharge.
Table 4: Operating Conditions
PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS
Supply Voltage VDD 3.3V ± 10% 3 3.3 3.6 V
Ambient Operating Temperature Range TA070°C
Crystal Resonator Frequency fXIN 530MHz
Output Load Capacit ance CL20 pF
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Table 5: DC Electrical Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical. Negative currents indicate current flows out of the device.
PARAMETER SYMBOL CONDITIONS/DESCRIPTION MIN. TYP. MAX. UNITS
Overall
Supply Current, Dynamic, with Loaded
Outputs IDD 20 mA
Digital Inputs (OE, S2, S0)
High-Level Input V olt age VIH 2.4 VDD+0.3 V
Low-Level Input V oltage VIL VSS-0.3 0.8 V
High-Level Input Current IIH VIN = VDD -1 1 µA
Low-Level Input Current (pul l -up) IIL VIN = 0V -8 µA
Digital Inputs (S1)
High-Level Input V olt age VIH 2.4 VDD+0.3 V
Low-Level Input V oltage VIL VSS-0.3 0.8 V
High-Level Input Current IIH VIN = VDD -1 1 µA
Low-Level Input Current (pul l -up) IIL VIN = 0V -16 µA
Crystal Oscillator
Crystal Loadi ng Capaci tance CL(xtal) As seen by a crystal connect ed to XIN and
XOUT 16 pF
Crystal Dri ve Level RXTAL=20200 uW
Clock Outputs (CLKA-CLKF)
Output Current High IOH VO = 2.4V mA
Output Current Low IOL VO = 0.4V mA
Short Circuit S ource Current * IOSH VO = 0V; shorted for 30s, max. mA
Short Circuit S i nk Current * IOSL VO = 3.3V; shorted for 30s, max. mA
zOH VO = 0.5VDD; output driving hi gh
Output Impedance * zOL VO = 0.5VDD; output driving low
AMERICAN MICROSYSTEMS, INC.
Februar y 2001
52.2.01
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FS6322-08
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Three-PLL C lock Ge nerator IC
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Three-PLL C lock Ge nerator IC
Table 6: AC Timing Specifications
Unless otherwise stated, VDD = 3.3V ± 10%, no load on any output, and ambient temperature range TA = 0°C to 70°C. Parameters denoted with an asterisk ( * ) represent nominal characterization
data and are not production tested to any specific limits. Where given, MIN and MAX characterization data are ± 3σ from typical.
PARAMETER SYMBOL CONDITIONS/DESCRIPTION CLOCK
(MHz) MIN. TYP. MAX. UNITS
Clock Output (CLK_X)
Duty Cycle * Crystal oscillator derived outputs
Measured @1.4V; CL = 20pF 43 51 57 %
Duty Cycle * PLL derived outputs
Measured @1.4V; CL = 20pF 45 51 55 %
Rise Time * trVO = 0.4V to 2.4V ; CL = 20pF ns
Fall Time * tfVO = 2.4 V to 0.4V; CL = 20pF ns
Jitter, Period (RMS) * tj(1σ)From rising edge to next risi ng edge at VDD/2, CL =
20pF ps
Jitter, Period (peak-peak) * tj(P) From rising edge to next rising edge at VDD/2, CL =
20pF ps
Jitter, Cumulative (RMS)* tj(LT)
PLL-derived outputs
From 0-500µs at VDD/2, CL = 20pF
compared to ideal clock source ps
Phase Noise * PLL derived outputs
@ 100KHz offset from fundamental dbC/Hz
Februar y 2001
62.2.01
FS6322-08
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FS6322-08
Three-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator ICThree-PLL C lock Ge nerator IC
Three-PLL C lock Ge nerator IC
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4.0 Package Information
Table 7: 16-pin SOIC (0.150") Package Dimensions
DIMENSIONS
INCHES MILLIMETERS
MIN. MAX. MIN. MAX.
A 0.061 0.068 1.55 1.73
A1 0.004 0.0098 0.102 0.249
A2 0.055 0.061 1.40 1.55
B 0.013 0.019 0.33 0.49
C 0.0075 0.0098 0.191 0.249
D 0.386 0.393 9.80 9.98
E 0.150 0.157 3.81 3.99
e 0.050 BSC 1.27 BSC
H 0.230 0.244 5.84 6.20
h 0.010 0.016 0.25 0.41
L 0.016 0.035 0.41 0.89
Θ0°8°0°8°
Be
DA
1
SEATING PLANE
HE
16
1ALL RADII:
0.005" TO 0.01"
BASE PLANE
A
2
C
L
θ
7° typ.h x 45°
A
AMERICAN MICROSYSTEMS, INC.
R
Table 8: 16-pin SOIC (0.150") Package Characteristics
PARAMETER SYMBOL CONDITIONS/DESCRIPTION TYP. UNITS
Thermal Impedance, Junction to Free-Air
16-pin 0.150” SOIC ΘJA Air flow = 0 m/s 95 °C/W
Corner lead 4.0
Lead Inductanc e, Self L11 Center lead 3.0 nH
Lead Inductanc e, Mutual L12 Any lead to any adjacent lead 0.4 nH
Lead Capacitance, Bulk C11 A ny l ead to VSS 0.5 pF
AMERICAN MICROSYSTEMS, INC.
Februar y 2001
72.2.01
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FS6322-08
FS6322-08FS6322-08
FS6322-08
Three-PLL C lock Ge nerator IC
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Three-PLL C lock Ge nerator IC
5.0 Ordering Information
ORDERING CODE DEVICE NUMBER PACKAGE TYPE OPERATING
TEMPERATURE RANGE SHIPPING
CONFIGURATION
11825-822 FS6322-08 16-pin (0.150”) S OIC
(Small Outline Package) 0°C to 70°C (Commercial) Tape and Reel
Copyright © 2001 American Microsystems, Inc.
Devices sold by AMI are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. AMI
makes no warranty, express, statutory implied or by description, regarding the information set forth herein or regarding the freedom
of the described devices from patent infringement. AMI makes no warranty of merchantability or fitness for any purposes. AMI re-
serves the right to discontinue production and change specifications and prices at any time and without notice. AMI’s products are
intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental require-
ments, or high reliability applications, such as military, medical life-support or life-sustaining equipment, are specifically not rec om-
mended without additional processing by AMI for such applications.
American Microsystems, Inc., 2300 Buckskin Rd., Pocatello, ID 83201, (208) 233-4690, FAX (208) 234-6796,
WWW Address: http://www.amis.com E-mail: tgp@amis.com