© Semiconductor Components Industries, LLC, 2010
November, 2010 Rev. 3
1Publication Order Number:
NCP2811/D
NCP2811
NOCAPt Advanced Stereo
Headphone Amplifier
NCP2811 is a dual audio power amplifier designed for portable
communication device applications such as mobile phones. This part
is capable of delivering 27 mW of continuous average power into a
16 Ω load from a 2.7 V power supply with a THD+N of 1%.
Based on the power supply delivered to the device, an internal
power management block generates a symmetrical positive and
negative voltage. Thus, the internal amplifiers provide outputs
referenced to Ground. In this True Ground configuration, the two
external heavy coupling capacitors can be removed. It offers
significant space and cost savings compared to a typical stereo
application.
NCP2811 is available with an external adjustable gain (version A),
or with an internal gain of 1.5 V/V (version B). It reaches a superior
100 dB PSRR and noise floor. Thus, it offers high fidelity audio
sound, as well as a direct connection to the battery. It contains circuitry
to prevent from “Pop & Click” noise that would otherwise occur
during turnon and turnoff transitions. The device is available in 12
bump CSP package (2 x 1.5 mm) which help to save space on the
board. It is also available in WQFN12 and TSSOP14 packages.
Features
True Ground Configuration Output Eliminates DCBlocking
Capacitors:
Save Board Area
Save Component Cost
No LowFrequency Response Attenuation
High PSRR (100 dB): Direct Connection to the Battery
“Pop and Click” Noise Protection Circuitry
Internal Gain (1.5 V/V) or External Adjustable Gain
Ultra Low Current Shutdown Mode
2.7 V – 5.0 V Operation
Thermal Overload Protection Circuitry
CSP 2 x 1.5 mm
WQFN12 3 x 3 mm
TSSOP14
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
Typical Applications
Headset Audio Amplifier for
Cellular Phones
MP3 Player
Personal Digital Assistant and Portable Media Player
Portable Devices
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See detailed ordering and shipping information on page 12 of
this data sheet.
ORDERING INFORMATION
WQFN12
MT SUFFIX
CASE 510AH
1
2811x
ALYWG
G
(Note: Microdot may be in either location)
2811xz
AYWW
G
x = A for NCP2811A
= B for NCP2811B
z = C for backside laminate
A = Assembly Location
Y = Year
WW = Work Week
G= PbFree Package
TSSOP14
DTB SUFFIX
CASE 948G
12 PIN CSP
FC SUFFIX
CASE 499AZ
MARKING
DIAGRAMS
1
14
2811
x
ALYWG
G
1
14
x = A for NCP2811A
= B for NCP2811B
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= PbFree Package
(Note: Microdot may be in either location)
x = A for NCP2811A
= B for NCP2811B
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= PbFree Package
NCP2811
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2
AGND
A1
A2
OUTR A3
OUTL A4
VP
B1
INR
B2
INL
B3 SPVM B4
CPP
C1
PGND C2
CPM
C3
PVM C4
CPP
CPM
VP
1 mF
OUTL
PVM
OUTR
Audio Left
Audio Right
AGND
A1
A2
OUTR A3
OUTL A4
VP
B1
INR
B2
INL
B3 SPVM B4
CPP
C1
PGND C2
CPM
C3
PVM C4
CPP
CPM
VP
OUTL
PVM
OUTR
Audio Left
Audio Right
B version
A version
Figure 1. Application Schematics
SD
1 mF
SD
1 mF
SD SD
1 mF
1 mF
1 mF
AGND
A1 A2 A3 A4
B1 B2 B3 B4
C1 C2 C3 C4
SD OUTR OUTL
VP INL SPVMINR
CPP CPM PVMPGND
(Top View) (Top View)
NC
INR
AGND
CPP
PGND
CPM
VP
OUTL
OUTR
PVM
SD
INL
(Top View)
Figure 2. Pin Configurations
OUTL
OUTR
NC
INR
AGND
INL
NC
NC
VP
CPP
PGND
CPM
PVM
SD
12 PIN CSP TSSOP14
WQFN12
10
10
10
10
NCP2811
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3
Figure 3. Typical Application Schematic version A
+
+
AGND
OUTL
OUTR
CLICK/POP
SUPPRESSION
BIASING
SD
PGND
PVM
CPP CPM
VRM
VRP
VP
Cs
VRP
VRP
VRM
VRM
Left
Audio
Right
Audio
SPVM
VP
INL
INR
POWER MANAGEMENT
1 mF
1 mF
1 mF
Use 10 ohm
resistor for
capacitive drive
capability
NCP2811
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4
Figure 4. Typical Application Schematic version B
+
+
AGND
OUTL
OUTR
CLICK/POP
SUPPRESSION
BIASING
SD
PGND
PVM
CPP CPM
VRM
VRP
VP
Cs
VRP
VRP
VRM
VRM
Left
Audio
Right
Audio
VP
INL
INR
POWER MANAGEMENT
1 mF
1 mF
1 mF
Use 10 ohm resistor
for capacitive
drive capability
Table 1. PIN FUNCTION DESCRIPTION
PIN
CSP
PIN
TQFN
PIN TS-
SOP
PIN
NAME TYPE DESCRIPTION
A1 7 10 AGND GROUND Analog ground. Connect to ground reference
A2 5 7 SD INPUT Enable activation
A3 10 13 OUTR OUTPUT Right audio channel output signal
A4 11 14 OUTL OUTPUT Left audio channel output signal
B1 12 2 VP POWER Positive supply voltage. It can be connected for example to a Lithium/Ion
battery
B2 8 11 INR INPUT Right input of the first audio source
B3 6 9 INL INPUT Left input of the first audio source
B4 SPVM POWER Amplifier negative power supply voltage. Connect to PVM
C1 1 3 CPP INPUT/
OUTPUT
Charge pump flying capacitor positive terminal. A 1 mF ceramic filtering
capacitor to CPM is needed
C2 2 4 PGND GROUND Power ground, connect to ground reference
C3 3 5 CPM INPUT Charge pump flying capacitor negative terminal. A 1 mF ceramic filtering
capacitor to CPP is needed
C4 4 6 PVM OUTPUT Charge pump output. A 1 mF ceramic filtering capacitor to ground is
needed
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Table 2. MAXIMUM RATINGS
Rating Symbol Value Unit
AVIN, PVIN Pins: Power Supply Voltage (Note 2) VP 0.3 to + 6.0 V
INL, INR Pins: Input (Note 2)
A version
B version
VIN
VP – 0.3 to VP + 0.3
2 to +2
V
SD Pin: Input (Note 2) VYY 0.3 to VP + 0.3 V
Human Body Model (HBM) ESD Rating are (Note 3) ESD HBM 2000 V
Machine Model (MM) ESD Rating are (Note 3) ESD MM 200 V
CSP 1.5 x 2.0 mm package (Notes 6 and 7)
Thermal Resistance Junction to Case
RqJC (Note 7) °C/W
Operating Ambient Temperature Range TA40 to + 85 °C
Operating Junction Temperature Range TJ40 to + 125 °C
Maximum Junction Temperature (Note 6) TJMAX + 150 °C
Storage Temperature Range TSTG 65 to + 150 °C
Moisture Sensitivity (Note 5) MSL Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Notes:
1. Maximum electrical ratings are defined as those values beyond which damage to the device may occur at TA = 25°C.
2. According to JEDEC standard JESD22A108B.
3. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±2.0 kV per JEDEC standard: JESD22A114 for all pins.
Machine Model (MM) ±200 V per JEDEC standard: JESD22A115 for all pins.
4. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78 class II.
5. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: JSTD020A.
6. The thermal shutdown set to 150°C (typical) avoids irreversible damage on the device due to power dissipation.
7. The RJA is highly dependent of the PCB Heatsink area. For example, RJA can equal 195°C/W with 50 mm2 total area and also 135°C/W with
50 mm2. The bumps have the same thermal resistance and all need to be connected to optimize the power dissipation.
RqCA +
125 *TA
PD
*RqJC
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Table 3. ELECTRICAL CHARACTERISTICS Min & Max Limits apply for TA between 40°C to +85°C and TJ up to + 125°C for VIN
between 2.7 V to 5.0 V (Unless otherwise noted). Typical values are referenced to TA = + 25°C and VIN = 3.6 V.
Symbol Parameter Conditions Min Typ Max Unit
VPOperational Power Supply 2.7 5.0 V
IDD Supply quiescent current Both channels enabled 6.0 mA
ISD Shutdown current VP = 2.7 V to 5.0 V 1mA
VOS Output offset voltage VP = 2.7 V to 5.0 V ±1 mV
VIH HighLevel input voltage SD pin 1.2 V
VIL LowLevel input voltage SD pin 0.4 V
RSD SD pin pulldown impedance 190 KW
TWU Turning on time 1 ms
TSD Thermal shutdown temperature 160 °C
VLP Max output swing (peak value) VP = 2.9 V to 5.0 V
Headset 16 W
THD+N = 1%
1 VRMS
POMax output power (output in phase) VP = 2.7V, THD+N = 1%
Headset = 16 W
VP = 2.7V, THD+N = 1%
Headset = 32 W
VP = 3.6V, THD+N = 1%
Headset = 16 W
VP = 3.6V, THD+N = 1%
Headset = 32 W
VP = 5.0V, THD+N = 1%
Headset = 16 W
VP = 5.0V, THD+N = 1%
Headset = 32 W
27
37
90
64
110
64
mW
Crosstalk (Note 8) Headset 16 W80 60 dB
PSRR Power supply rejection ratio (Note 8) VP = 2.7 V to 5.0 V
Input shorted to ground
F = 217 Hz
F = 1 kHz
106
95
dB
THD+N Total harmonic distortion + noise (Note 8) Headset = 16 W
POUT = 25 mW
0.01 %
VNOutput noise voltage (Note 8) AWeighting filter 7mVRMS
ZIN Input impedance B version only 20 KW
ZSD Output impedance in shutdown mode 10 KW
UVLO UVLO threshold Falling edge 2.3 V
UVLOHYST UVLO hysteresis 100 mV
Av Voltage Gain B version only 1.53 1.5 1.48 V/V
8. Guaranteed by design and characterized.
NCP2811
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7
TYPICAL OPERATING CHARACTERISTICS
Figure 5. THD+N vs. Pout @ Vp = 3.6 V Figure 6. THD+N vs. Pout @ Vp = 3.6 V
Pout (mW)
140120100806040200
0.001
0.01
0.1
1
100
Figure 7. THD+N vs. Pout LEFT Figure 8. THD+N vs. Pout RIGHT
Pout (mW)
140120100806040200
0.001
0.01
0.1
1
10
100
Figure 9. THD+N vs. Pout LEFT Figure 10. THD+N vs. Pout RIGHT
THD+N (%)THD (%)
160
16 W in Phase
THD+N_L (%)
THD+N_R (%)
Pout (mW)
140120100806040200
0.001
0.01
0.1
1
100
THD+N (%)
180
16 W out of Phase
THD+N_L (%)
THD+N_R (%)
Pout (mW)
140120100806040200
0.001
0.01
0.1
1
100
THD (%)
180
Pout (mW)
140120100806040200
0.001
0.01
0.1
1
100
THD (%)
180
180
16 W in Phase
Pout (mW)
140120100806040200
0.001
0.01
0.1
1
10
100
THD (%)
180
16 W out of Phase 16 W out of Phase
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
10 10
160
160 160
10
160
10
160
16 W out of Phase
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TYPICAL OPERATING CHARACTERISTICS
Figure 11. THD+N vs. Pout @ Vp = 3.6 V Figure 12. THD+N vs. Pout @ Vp = 3.6 V
Pout (mW)
706050403020100
0.001
0.01
0.1
1
100
Figure 13. THD+N vs. Pout LEFT Figure 14. THD+N vs. Pout RIGHT
Figure 15. THD+N vs. Pout LEFT Figure 16. THD+N vs. Pout RIGHT
THD+N (%)
80 100
Pout (mW)
706050403020100
0.001
0.01
0.1
1
100
THD+N (%)
80 100
Pout (mW)
706050403020100
0.001
0.01
0.1
1
100
THD (%)
80 100
Pout (mW)
706050403020100
0.001
0.01
0.1
1
100
THD (%)
80 100
32 W in Phase 32 W out of Phase
32 W in Phase 32 W in Phase
Pout (mW)
706050403020100
0.001
0.01
0.1
1
100
THD (%)
80 100
Pout (mW)
706050403020100
0.001
0.01
0.1
1
100
THD (%)
80 100
32 W out of Phase 32 W out of Phase
THD+N_L (%)
THD+N_R (%)
THD+N_L (%)
THD+N_R (%)
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
Vp = 5 V
4.2 V
3.6 V
3.0 V
2.7 V
10
90
10
90
10
90
10
90
10
90
10
90
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TYPICAL OPERATING CHARACTERISTICS
Figure 17. THD vs. Frequency LEFT
@ Pout = 32 mW
Figure 18. THD vs. Frequency RIGHT
@ Pout = 32 mW
FREQUENCY (Hz)
100,00010,0001,00010010
0.001
0.01
0.1
1
Figure 19. THD vs. Frequency LEFT
@ Pout = 32 mW
Figure 20. THD vs. Frequency RIGHT
@ Pout = 32 mW
Figure 21. Maximum Output Power LEFT vs.
VP (THD+N < 1%)
Figure 22. Maximum Output Power LEFT vs.
VP (THD+N < 0.1%)
VP (V) VP (V)
4.74.23.73.22.7
0
20
40
60
80
100
120
140
4.74.23.73.22.7
0
10
20
30
40
50
70
80
THD+N (%)(mW)
(mW)
16 W out of Phase
VP = 2.7 V
VP = 3.6 V
VP = 5.0 V
FREQUENCY (Hz)
100,00010,0001,00010010
0.001
0.01
0.1
1
THD+N (%)
16 W out of Phase
FREQUENCY (Hz)
100,00010,0001,00010010
0.001
0.01
0.1
1
THD+N (%)
32 W out of Phase
FREQUENCY (Hz)
10,0001,00010010
0.001
0.01
0.1
1
THD+N (%)
32 W out of Phase
100,000
40°C
25°C
85°C
40°C
25°C
85°C
60
VP = 2.7 V
VP = 3.6 V
VP = 5.0 V
VP = 2.7 V
VP = 3.6 V
VP = 5.0 V
VP = 2.7 V
VP = 3.6 V
VP = 5.0 V
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TYPICAL OPERATING CHARACTERISTICS
Figure 23. PSRR at Vp = 3.6 V Figure 24. Crosstalk vs. Frequency
@ Vp = 3.6 V
FREQUENCY (Hz)
10,000100010010
120
100
60
20
0
PSRR (dB)
100,000
40
80
FREQUENCY (Hz)
10,000100010010
110
100
95
80
65
60
(dB)
100,000
70
75
85
90
105
115
120
NCP2811B Left
Right to Left
Left to Right
NCP2811B Right
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DETAIL OPERATING DESCRIPTION
Detailed Descriptions
The NCP2811 is a stereo headphone amplifier with a true
ground architecture. This architecture eliminates the need to
use 2 external big capacitors required by conventional
headphone amplifier.
The structure of the NCP2811 is basically composed of 2
true ground amplifiers, an UVLO, a short circuit protection
and also a thermal shutdown. A special circuitry is
embedded to eliminate any pop and click noise that occurs
during turn on and turn off time. The A version has an
external gain selectable by two resistor, B version has a gain
of 1.5 V/V.
NOCAPt
NOCAPt is a patented architecture which requires only
2 small ceramic capacitors. It generates a symmetrical
positive and negative voltage and it allows the output of the
amplifiers to be biased around the ground.
Current Limit Protection Circuit
The NCP2811 embed a protection circuitry against short
to ground. When an output is shorted to GND and when a
signal appears at the input, the current is limited to 300 mA.
Thermal Overload Protection
Internal amplifiers are switched off when the temperature
exceed 160°C, and will be switch on again when the
temperature decrease below 140°C.
Under Voltage Lockout
When the battery voltage decreases below 2.3 V, the
amplifiers are turned off. The hysteresis to turn on it again
is 100 mV.
Pop and Click Suppression Circuitry
The NCP2811 includes a special circuitry to eliminate any
pop and click noise during turn on and turn off time. Basic
amplifier creates an offset during these transitions at the
output which give a parasitic noise called “pop and click
noise”. The NCP2811 eliminates this problem.
Gain Setting Resistor Selection (Rin & Rf, A version
only)
Rin and Rf set the closed loop gain of the amplifier. A low
gain configuration (close to 1) minimizes the THD + noise
values and maximizes the signal to noise ratio.
A closed loop gain in the range of 1 to 10 is recommended
to optimize overall system performance.
The formula to calculate the gain is:
Av +*
Rf
Rin
Input Capacitor Selection
The input coupling capacitor blocks the DC voltage at the
amplifier input terminal. This capacitor creates a highpass
filter with Rin (externally selectable for A version, 20 kW for
B version).
The size of the capacitor must be large enough to couple
in low frequencies without severe attenuation in the audio
bandwith (20 Hz – 20 kHz).
The cut off frequency for the input highpass filter is:
Fc+1
2pRinCin
A Fc < 20 Hz is recommended.
Charge Pump Capacitor Selection
Use ceramic capacitor with low ESR for better
performances. X5R / X7R capacitor is recommended.
The flying capacitor (C2) serves to transfer charge during
the generation of the negative voltage.
The CPVM capacitor (C3) must be equal at least to the
CFly capacitor to allow maximum transfer charge. The
CPVM value must not exceed 1 mF. Higher capacitor value
can damage the part.
Table 4 suggests typical value and manufacturer:
Table 4.
Value Reference Package Manufacturer
1 mFC1005X5R0J105K 0402 TDK
1 mFGRM155R60J105K19 0402 Murata
Lower value of capacitors can be used but the maximum
output power is reduced and the device may not operate to
specifications.
Power Supply Decoupling Capacitor (C1)
The NCP2811 is a True Ground amplifier which requires
the adequate decoupling capacitor to reduce noise and
THD+N. Use X5R / X7R ceramic capacitor and place it
closed to the CPVDD pin. A value of 1 mF is recommended.
Shutdown Function
The device enters in shutdown mode when shutdown signal
is low. During the shutdown mode, the DC quiescent current
of the circuit does not exceed 500 nA. In this configuration,
the output impedance is 10 kW on each output.
Output Resistor for Capacitive Drive Capability
Under normal operation, NCP2811 maximum direct
capacitive load is in the 80 pF range. If, for any reason, high
value capacitive loads should be connected to NCP2811
outputs, an additional 10 W resistor should be placed
between the NCP2811 output and the capacitive load to
ensure amplifier stability.
Layout Recommendation
Connect C1 as close as possible of the Vp pin.
Connect C2 and C3 as close as possible of the NCP2811.
Route audio signal and AGND far from Vp, CPP, CPM,
PVM and PGND to avoid any perturbation due to the
switching.
NCP2811
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12
Table 5. ORDERING INFORMATION
Device Package Shipping
NCP2811ADTBR2G TSSOP14
(PbFree)
2500/Tape & Reel
NCP2811BDTBR2G TSSOP14
(PbFree)
2500/Tape & Reel
NCP2811AFCT1G FlipChip 12
(PbFree)
3000/Tape & Reel
NCP2811BFCT1G FlipChip 12
(PbFree)
3000/Tape & Reel
NCP2811BFCCT1G FlipChip 12
(Backside Laminate Coating)
(PbFree)
3000/Tape & Reel
NCP2811AMTTXG WQFN12
(PbFre)
3000/Tape & Reel
NCP2811BMTTXG WQFN12
(PbFree)
3000/Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
PACKAGE DIMENSIONS
12 PIN FLIPCHIP, 2.0x1.5, 0.5P
CASE 499AZ01
ISSUE O
SEATING
PLANE
0.10 C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
2X
DIM
A
MIN MAX
0.54
MILLIMETERS
A1
A2
D2.00 BSC
b0.29 0.34
e0.50 BSC
0.60
AB
PIN A1
REFERENCE
A0.05 BC
0.03 C
0.05 C
12X b
1 234
C
B
A
0.10 C
A
A1
A2
C
0.21 0.27
E
D
e/2
e
0.10 C
2X
12X
NOTE 3
TOP VIEW
SIDE VIEW
BOTTOM VIEW
0.33 0.39
E1.50 BSC
e
SOLDERING FOOTPRINT*
A1
0.5
PACKAGE
12X 0.25
PITCH 0.5
PITCH
OUTLINE
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PACKAGE DIMENSIONS
WQFN12 3x3, 0.5P
CASE 510AH01
ISSUE O
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.30 MM FROM TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
ÇÇÇ
ÇÇÇ
ÇÇÇ
A
D
E
B
C0.10
PIN ONE
2X
REFERENCE
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
L
D2
E2
C
C0.10
C0.10
C0.10
A1 SEATING
PLANE
e
12X
NOTE 3
b
12X
0.10 C
0.05 C
ABB
DIM MIN MAX
MILLIMETERS
A0.65 0.85
A1 0.00 0.05
b0.20 0.30
D3.00 BSC
D2 1.30 1.50
E3.00 BSC
E2 1.30 1.50
e0.50 BSC
K0.20 −−−
L0.30 0.50
4
7
1
12
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
2X
0.50
PITCH
1.50 3.30
1
K
DIMENSIONS: MILLIMETERS
0.63
12X
NOTE 4
2X
0.30
12X
DETAIL A
A3 0.22 REF
13X
A3
A
DETAIL B
L1
DETAIL A
L
ALTERNATE
CONSTRUCTIONS
ÉÉ
ÉÉ
ÇÇ
A1
A3
L
ÇÇÇ
ÇÇÇ
ÉÉÉ
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS L1 0.00 0.15
OUTLINE
PACKAGE
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PACKAGE DIMENSIONS
TSSOP14
CASE 948G01
ISSUE B
DIM MIN MAX MIN MAX
INCHESMILLIMETERS
A4.90 5.10 0.193 0.200
B4.30 4.50 0.169 0.177
C−−− 1.20 −−− 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.50 0.60 0.020 0.024
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.08 (0.003) TOTAL
IN EXCESS OF THE K DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE W.
____
S
U0.15 (0.006) T
2X L/2
S
U
M
0.10 (0.004) V S
T
LU
SEATING
PLANE
0.10 (0.004)
T
ÇÇÇ
ÇÇÇ
ÇÇÇ
SECTION NN
DETAIL E
JJ1
K
K1
ÉÉÉ
ÉÉÉ
DETAIL E
F
M
W
0.25 (0.010)
8
14
7
1
PIN 1
IDENT.
H
G
A
D
C
B
S
U0.15 (0.006) T
V
14X REFK
N
N
7.06
14X
0.36 14X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
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