LM3435
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SNVS724C –JUNE 2011–REVISED MAY 2013
Compact Sequential Mode RGB LED Driver with I
2
C Control Interface
Check for Samples: LM3435
1FEATURES KEY SPECIFICATIONS
23• Sequential RGB Driving Mode • Support up to 2A LED current
• Low Component Count and Small Solution • Typical ±3% LED current accuracy
Size • Integrated N-Channel main and P-Channel
• Stable with Ceramic and Other Low ESR synchronous MOSFETs
capacitors, No Loop Compensation Required • 3 Integrated N-Channel current regulating pass
• Fast Transient Response switches
• Programmable Converter Switching Frequency • LED Currents programmable via I2C bus
up to 1 MHz independently
• MCU Interface Ready With I2C Bus • Input voltage range: 2.7 – 5.5 V
• Peak Current Limit Protection for the Switcher • Thermal shutdown
• LED Fault Detection and Reporting via I2C Bus • Thermally enhanced WQFN package
APPLICATIONS DESCRIPTION
The LM3435, a Synchronously Rectified non-isolated
• Li-ion Batteries/USB Powered RGB LED Driver Flyback Converter, features all required functions to
• Pico/Pocket RGB LED Projector implement a highly efficient and cost effective RGB
LED driver. Different from conventional Flyback
TYPICAL APPLICATION converter, LEDs connect across the VOUT pin and
the VIN pin through internal passing elements at
corresponding LED pins. Thus, voltage across LEDs
can be higher than, equal to or lower than the input
supply voltage.
Load current to LEDs is up to 2A with voltage across
LEDs ranging from 2.0V to 4.5V. Integrated N-
Channel main MOSFET, P-Channel synchronous
MOSFET and three N-Channel current regulating
pass switches allow low component count, thus
reducing complexity and minimize board size. The
LM3435 is designed to work exceptionally well with
ceramic output capacitors with low output ripple
voltage. Loop compensation is not required resulting
in a fast load transient response. Non-overlapping
RGB LEDs are driven sequentially through individual
control. Output voltage hence can be optimized for
different forward voltage of LEDs during the non-
overlapping period. I2C™ interface eases the
programming of the individual RGB LED current up to
1,024 levels per channel.
The LM3435 is available in the thermally enhanced
40-pin WQFN package.
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2I2C is a trademark of NXP.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2011–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
LM3435
SNVS724C –JUNE 2011–REVISED MAY 2013
www.ti.com
CONNECTION DIAGRAM
Figure 1. Top View
40-Pin WQFN
See RSB0040A Package
Pin Descriptions
Pin Name Type Description Application Information
1, 2, 38, PGND Ground Power Ground Ground for power devices, connect to GND.
39, 40
3 CG Output GREEN LED capacitor Connect a capacitor to Ground for GREEN LED. Minimum 1nF.
4 CB Output BLUE LED capacitor Connect a capacitor to Ground for BLUE LED. Minimum 1nF.
5 CR Output RED LED capacitor Connect a capacitor to Ground for RED LED. Minimum 1nF.
6 IREFG Output Current Reference for Connect a resistor to Ground for GREEN LED current reference
GREEN LED generation.
7 IREFB Output Current Reference for Connect a resistor to Ground for BLUE LED current reference generation.
BLUE LED
8 IREFR Output Current Reference for Connect a resistor to Ground for RED LED current reference generation.
RED LED
9 GND Ground Ground
10, 29 SGND Ground I2C Ground Ground for I2C control, connect to GND.
11 SVDD Power I2C VDD VDD for I2C control.
12 SDATA Input / DATA bus Data bus for I2C control.
Output
13 SCLK Input CLOCK bus Clock bus for I2C control.
14, 15, 16, VIN Power Input supply voltage Supply pin to the device. Nominal input range is 2.7V to 5.5V.
17, 37
18 GCTRL Input GREEN LED control On/Off control signal for GREEN LED. Internally pull-low.
19 BCTRL Input BLUE LED control On/Off control signal for BLUE LED. Internally pull-low.
20 RCTRL Input RED LED control On/Off control signal for RED LED. Internally pull-low.
21, 22 RLED Output RED LED cathode Connect RED LED cathode to this pin.
23, 24 BLED Output BLUE LED cathode Connect BLUE LED cathode to this pin.
25, 26 GLED Output GREEN LED cathode Connect GREED LED cathode to this pin.
27 FAULT Output Fault indicator Pull-up when LED open or short is being detected.
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Pin Descriptions (continued)
Pin Name Type Description Application Information
28 EN Input Enable pin Internally pull-up. Connect to a voltage lower than 0.2 x VIN to disable the
device.
30, 31, 32 VOUT Input / Output voltage Connect anodes of LEDs to this pin.
Output
33 RT Input ON-time control An external resistor connected from VOUT to this pin sets the main
MOSFET on-time, hence determine the switching frequency.
34, 35, 36 SW Output Switch node Internally connected to the drain of the main N-channel MOSFET and the
P-channel synchronous MOSFET. Connect to the output inductor.
EP EP Ground Exposed Pad Thermal connection pad, connect to the GND pin.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ABSOLUTE MAXIMUM RATINGS (1)
VALUE / INPUTS
VIN to GND –0.3V to 6.0V
VOUT, RT to VIN –0.3V to 5.5V
RLED, GLED, BLED to VIN –0.3V to 5.5V
SW to GND –0.3V to 11.5V
SW to GND (Transient) –2V to 13V (<100 ns)
All other inputs to GND –0.3V to 6.0V
ESD Rating Human Body Model (2) ±1.5 kV
Storage Temperature –65°C to +150°C
Junction Temperature (TJ) –40°C to +125°C
(1) Absolute Maximum Ratings are limits which damage to the device may occur. Operating ratings are conditions under which operation of
the device is intended to be functional. For specifications and test conditions, see the electrical characteristics.
(2) The human body model is a 100 pF capacitor discharged through a 1.5 kΩresistor into each pin.
RECOMMENDED OPERATING CONDITIONS (1)
VALUE / INPUTS
Supply Voltage Range (VIN) 2.7V to 5.5V
Junction Temp. Range (TJ) –40°C to +125°C
Thermal Resistance (θJB)(2) 28°C/W
(1) Absolute Maximum Ratings are limits which damage to the device may occur. Operating ratings are conditions under which operation of
the device is intended to be functional. For specifications and test conditions, see the electrical characteristics.
(2) θJB is junction-to-board thermal characteristic parameter. For packages with exposed pad, θJB is significantly dependent on PC boards.
So, only when the PC board under end-user environments is similar to the 2L JEDEC board, the corresponding θJB can be used to
predict the junction temperature. θJB value is obtained by NS Thermal Calculator©for reference only.
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SNVS724C –JUNE 2011–REVISED MAY 2013
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ELECTRICAL CHARACTERISTICS
Specification with standard type are for TA= TJ= +25°C only; limits in boldface type apply over the full Operating Junction
Temperature (TJ) range. Minimum and Maximum are specified through test, design or statistical correlation. Typical values
represent the most likely parametric norm at TJ= +25°C, and are provided for reference purposes only. Unless otherwise
stated the following conditions apply: VIN = 5V and VOUT – VIN = 3V.
Symbol Parameter Conditions Min Typ Max Units
Supply Characteristics
IIN IIN operating current No switching 5 10 mA
IIN-SD IIN Shutdown current VEN = 0V 8 30 µA
ISVDD SVDD standby supply current VSVDD = 5V, I2C Bus idle 1µA
VINUVLO VIN under-voltage lock-out VIN decreasing 2.5 V
VINUVLO_hys VIN under-voltage lock-out hysteresis VIN increasing 0.2 V
Enable Input
VEN EN Pin input threshold VEN rising 0.8 x VIN V
VEN falling 0.2 x VIN V
IEN Enable Pull-up Current VEN = 0V 5 µA
Logic Inputs (RCTRL, GCTRL and BCTRL)
VCTRL CTRL pins input threshold VCTRL rising 1.35 V
(VIN = 2.7V to 5.5V)
VCTRL falling 0.63
(VIN = 2.7V to 5.5V)
Switching Characteristics
RDS-M-ON Main MOSFET RDS(ON) VGS(MAIN) =VIN = 5.0V 0.04 0.1 Ω
ISW(sink) = 100mA
RDS-S-ON Syn. MOSFET RDS(ON) VGS(SYN) = VOUT - 5.0V 0.06 0.2 Ω
ISW(source) = 100mA
Current Limit
ICL Peak current limit through main MOSFET 6 8.5 A
threshold
ON/OFF Timer
tON ON timer pulse width RRT = 499 kΩ750 ns
tON-MIN ON timer minimum pulse width 80 ns
tOFF OFF timer minimum pulse width 155 ns
RGB Driver Characteristics (RLED, BLED and GLED)
RDS(RED) Red LED Switch RDS VOUT - VIN = 3.3V 0.1 0.2 Ω
ILED = 1.5A
I2C code = 3FFh
RDS(BLU) Blue LED Switch RDS VOUT - VIN = 3.3V 0.1 0.2 Ω
ILED = 1.5A
I2C code = 3FFh
RDS(GRN) Green LED Switch RDS VOUT - VIN = 3.3V 0.1 0.2 Ω
ILED = 1.5A
I2C code = 3FFh
ILEDMAX Max. LED current(1) VIN = 4.5V to 5.5V, 2 A
0°C ≤TA≤50°C
I1.5A,3FFh Current accuracy (3FFh) VIN = 2.7V to 5.5V 1.455 1.5 1.545 A
RIREF = 16.5 kΩ,1.425 1.575 A
VOUT – VIN = 2.4V (RLED),
I1.5A,1FFh Current (1FFh) 0.8 A
3.3V (GLED/BLED)
I1.5A,001h Current (001h) 1.2 mA
(1) Maximum LED current measured at VIN = 4.5V to 5.5V with heat sink on top of LM3435 with no air flow at 0°C ≤TA≤50°C. Operating
conditions differ from the above is not ensured.
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SNVS724C –JUNE 2011–REVISED MAY 2013
ELECTRICAL CHARACTERISTICS (continued)
Specification with standard type are for TA= TJ= +25°C only; limits in boldface type apply over the full Operating Junction
Temperature (TJ) range. Minimum and Maximum are specified through test, design or statistical correlation. Typical values
represent the most likely parametric norm at TJ= +25°C, and are provided for reference purposes only. Unless otherwise
stated the following conditions apply: VIN = 5V and VOUT – VIN = 3V.
Symbol Parameter Conditions Min Typ Max Units
FAULT Output Characteristics
VOH Output high voltage VIN = 2.7V to 5.5V, VIN – 0.1 V
IOH = -100µA
VIN = 2.7V to 5.5V, VIN – 0.5 V
IOH = -5mA
VOL Output low voltage VIN = 2.7V to 5.5V, 0.1 V
IOL = 100µA
VIN = 2.7V to 5.5V, 0.5 V
IOL = 5mA
Thermal Shutdown
TSD Thermal shutdown temperature TJ rising 163 °C
TSD-HYS Thermal shutdown temperature hysteresis TJ falling 20 °C
I2C Logic Interface Electrical Characteristics (1.7 V < SVDD < VIN )
Logic Inputs SCL, SDA
VIL Input Low Level 0.2 x V
SVDD
VIH Input High Level 0.8 x V
SVDD
ILLogic Input Current -1 1 µA
fSCL Clock Frequency 400 kHz
Logic Output SDA
VOL Output Low Level ISDA = 3mA 0.3 0.5 V
ILOutput Leakage Current VSDA = 2.8V 2 µA
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2 3 4 5 6
30
40
50
60
70
80
90
RDS-S-ON(m)
VIN(V)
125°C
25°C
-40°C
5 15 25 35 45 55
0.0
0.5
1.0
1.5
2.0
2.5
ILEDx(A)
RIREFx(k)
2 3 4 5 6
0
5
10
15
20
25
ISVDD(nA)
VSVDD(V)
125°C
25°C
-40°C
2 3 4 5 6
20
30
40
50
60
70
RDS-M-ON(m)
VIN(V)
125°C
25°C
-40°C
2 3 4 5 6
0
2
4
6
8
10
12
IIN-SD(A)
VIN(V)
-40°C
25°C
125°C
23456
3.0
3.5
4.0
4.5
5.0
5.5
6.0
IIN(mA)
VIN(V)
125°C
25°C
-40°C
LM3435
SNVS724C –JUNE 2011–REVISED MAY 2013
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TYPICAL PERFORMANCE CHARACTERISTICS
All curves taken at VIN = 5V with configuration in typical application for driving one red (OSRAM LRW5AP-KZMX), one green
(OSRAM LTW5AP-LZMY) and one blue (OSRAM LBW5AP-JYKX) LEDs with IOUT per channel = 1.5A under TA= 25°C,
unless otherwise specified.
IIN-SD vs VIN IIN (no switching) vs VIN
Figure 2. Figure 3.
ISVDD vs VIN RDS-M-ON vs VIN
Figure 4. Figure 5.
RDS-S-ON vs VIN RIREFx vs ILEDx
Figure 6. Figure 7.
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23456
1.46
1.48
1.50
1.52
1.54
ILED(BLU)(A)
VIN(V)
125°C
25°C
-40°C
2 3 4 5 6
40
60
80
100
120
140
160
RDS(BLU)(m)
VIN(V)
125°C
25°C
-40°C
23456
1.46
1.48
1.50
1.52
1.54
ILED(GRN)(A)
VIN(V)
125°C -40°C
25°C
2 3 4 5 6
40
60
80
100
120
140
160
RDS(GRN)(m)
VIN(V)
125°C
25°C
-40°C
23456
1.46
1.48
1.50
1.52
1.54
ILED(RED)(A)
VIN(V)
125°C
25°C
-40°C
2 3 4 5 6
40
60
80
100
120
140
160
RDS(RED)(m)
VIN(V)
125°C
25°C
-40°C
LM3435
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SNVS724C –JUNE 2011–REVISED MAY 2013
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
All curves taken at VIN = 5V with configuration in typical application for driving one red (OSRAM LRW5AP-KZMX), one green
(OSRAM LTW5AP-LZMY) and one blue (OSRAM LBW5AP-JYKX) LEDs with IOUT per channel = 1.5A under TA= 25°C,
unless otherwise specified.ILED(RED) vs VIN RDS(RED) vs VIN
Figure 8. Figure 9.
ILED(GRN) vs VIN RDS(GRN) vs VIN
Figure 10. Figure 11.
ILED(BLU) vs VIN RDS(BLU) vs VIN
Figure 12. Figure 13.
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2 3 4 5 6
50
60
70
80
90
100
BLUE EFFICIENCY, BLU(%)
VIN(V)
2 3 4 5 6
50
60
70
80
90
100
RED EFFICIENCY, RED(%)
VIN(V)
2 3 4 5 6
50
60
70
80
90
100
GREEN EFFICIENCY, GRN(%)
VIN(V)
LM3435
SNVS724C –JUNE 2011–REVISED MAY 2013
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TYPICAL PERFORMANCE CHARACTERISTICS (continued)
All curves taken at VIN = 5V with configuration in typical application for driving one red (OSRAM LRW5AP-KZMX), one green
(OSRAM LTW5AP-LZMY) and one blue (OSRAM LBW5AP-JYKX) LEDs with IOUT per channel = 1.5A under TA= 25°C,
unless otherwise specified.
RED Efficiency vs VIN @ TA= 25°C GREEN Efficiency vs VIN @ TA= 25°C
Figure 14. Figure 15.
BLUE Efficiency vs VIN @ TA= 25°C Power Up Transient
Figure 16. Figure 17. (10ms/DIV)
RGB Sequential Mode Operation Color Transition Delay
Figure 18. (1ms/DIV) Figure 19. (100µs/DIV)
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RGB Current Regulator
And Logic Control
Gm Sample
& Hold Comp
Gm
Gm
MUX
I2C Interface
Logic
10 bit10 bit10 bit
IGRN IBLU IRED
Bias and Vref
Gint
Bint
Rint
Flyback
Converter
Control Logic
Gint
Bint
Rint
L.S.
Driver
H.S.
Driver
ON-timer
OFF-timer
VOUT
RT
EN
PGND
IREFR
IREFB
IREFG
SCLK
SDATA
SVDD
FAULT
RCTRL
BCTRL
GCTRL
GLED BLED RLED VIN SW
GND
CR
CB
CG
SGND
SENG,B,R SENG
SENB
SENR
IREFG,B,R
IREFG
IREFB
IREFR
VREF
Comp
Comp
Ch. Select
VFB
Feedback
Sample
& Hold
Sample
& Hold
LM3435
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SNVS724C –JUNE 2011–REVISED MAY 2013
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM
OPERATION DESCRIPTION
INTRODUCTION
The LM3435 is a sequential LED driver for portable and pico projectors. The device is integrated with three high
current regulators, low side MOSFETs and a synchronous flyback DC-DC converter. Only single LED can be
enabled at any given time. The DC-DC converter quickly adjusts the output voltage to an optimal level based on
each LED’s forward voltage. This minimizes the power dissipation at the current regulators and maximizes the
system efficiency. The I2C compatible synchronous serial interface provides access to the programmable
functions and registers of the device. I2C protocol uses a two-wire interface for bi-directional communications
between the devices connected to the bus. The two interface lines are the Serial Data Line (SDA), and the Serial
Clock Line (SCL). These lines should be connected to a positive supply, via a pull-up resistor and remain HIGH
even when the bus is idle. Every device on the bus is assigned an unique address and acts as either a Master or
a Slave depending on whether it generates or receives the serial clock (SCL).
SYNCHRONOUS FLYBACK CONVERTER
The LM3435 integrates a synchronous flyback DC-DC converter to power the three-channel current regulator.
The LEDs are connected across VOUT of the flyback converter and VIN through an internal power MOSFET
connecting to corresponding LED channel. The maximum current to LED is 2A and the maximum voltage across
VOUT and VIN is limited at around 4.7V. The LM3435 integrates the main N-channel MOSFET, the synchronous
P-channel MOSFET of the flyback converter and three N-channel MOSFETs as internal passing elements
connecting to LED channels in order to minimize the solution components count and PCB space.
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The flyback converter of LM3435 employs a proprietary Projected On-Time (POT) control scheme to determine
the on-time of the main N-channel MOSFET with respect to the input and output voltages together with an
external switching frequency setting resistor connected to RT pin, RRT. POT control use information of the current
passing through RRT from VOUT, voltage information of VOUT and VIN to find an appropriate on-time for the
circuit operations. During the on-time period, the inductor connecting to the flyback converter is charged up and
the output capacitor is discharged to supply power to the LED. A cycle-by-cycle current limit of typical 6A is
imposed on the main N-channel MOSFET for protection. After the on-time period, the main N-channel MOSFET
is turned off and the synchronous P-channel MOSFET is turned on in order to discharge the inductor. The off
state will last until VOUT is dropped below a reference voltage. Such reference voltage is derived from the
required LED current to be regulated at a particular LED channel. The flyback converter under POT control can
maintain a fairly constant switching frequency that depends mainly on value of the resistor connected across
VOUT and RT pins, RRT. The relationship between the flyback converter switching frequency, FSW and RRT is
approximated by the following relationship:
RRT in Ωand FSW in kHz (1)
In addition, POT control requires no external compensation and achieves fast transient response of the output
voltage changes that perfectly matches the requirements of a sequential RGB LED driver. The POT flyback
converter only operates at Continuous Conduction Mode. Dead-time between main MOSFET and synchronous
MOSFET switching is adaptively controlled by a minimum non-overlap timer to prevent current shoot through.
Initial VOUT will be regulated at around 3.2V to 3.5V above VIN before any control signals being turned on.
Three small capacitors connected to CR, CG and CB pins are charged by an internal current source and act as
soft-start capacitors of the flyback converter during start-up. Once initial voltage of VOUT is settled, the
capacitors will be used as a memory element to store the VOUT information for each channel respectively. This
information will be used for VOUT regulation of respective LED channel during channel switching. In between the
channel switching, a small I2C programmable blank out time of 5 µs to 35 µs is inserted so that the LED current
is available after the correct VOUT for the color is stabilized. This control scheme ensures the minimal voltage
headroom for different color LED and hence best conversion efficiency can be achieved.
HIGH CURRENT REGULATORS
The LM3435 contains three internal current regulators powered by the output of the synchronous Flyback
Converter, VOUT. Three low side power MOSFETs are included. These current regulators control the current
supplied to the LED channels individually and maintain accurate current regulation by internal feedback and
control mechanism. The regulation is achieved by a Gm-C circuit comparing the sensing voltage of the internal
passing N-channel MOSFET and an internal LED current reference voltage generated from the external
reference current setting resistor, RIREFx connect to IREFG, IREFB or IREFR pin, of the corresponding LED
channel. The nominal maximum LED current is governed by the equation in below:
RIREFx in Ωand ILEDx in Ampere (2)
The LED current setting can be in the range of 0.5A up to 2A maximum. The nominal maximum of the device is
1.5A and for applications need higher than 1.5A LED current, VIN and thermal constrains must be complied. The
actual LED current can be adjusted on-the-fly by the internal ten bits register for individual channel. The content
of these registers are user programmable via I2C bus connection. The user can control the LED output current
on-the-fly during normal operation. The resolution is 1 out of 1024 part of the LED current setting. The user can
program the registers in the range of 1(001H) to 1023(3FFH) for each channel independently, provided the
converter is not entered the Discontinuous Conduction Mode. Whenever the converter operation entered the
Discontinuous Conduction Mode, the regulation will be deteriorated. A value of “0” may cause false fault
detection, so it must be avoided.
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BLUEGREEN
GCTRL
BCTRL
RCTRL
RED BLUE GREEN
IGLED
IBLED
IRLED
Green Transition Delay
Blue Transition Delay
Red Transition Delay
RCTRL
GCTRL
BCTRL
GREENRED BLUE
1/3 1/31/3
1/FPWM
GREENRED BLUE
1/3 1/31/3
1/FPWM
LM3435
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SNVS724C –JUNE 2011–REVISED MAY 2013
SEQUENTIAL MODE RGB TIMING
LM3435 is a sequential mode RGB driver dedicatedly designed for pico and portable projector applications. By
using this device, the system only require one power driver stage for three color LEDs. With LM3435, only single
LED can be enabled at any given time period and the DC-DC converter can quickly adjusts the output voltage to
an optimized level by controlling the current flowing into the respective LED channel. This approach minimizes
the power dissipation of the internal current regulator and effectively maximizes the system efficiency. Timing of
the RGB LEDs depends solely on the RCTRL, GCTRL and BCTRL inputs. The Timing Chart in below shows a
typical timing of two cycles of even RGB scan. In real applications, the RGB sequence is totally controlled by the
system or the video processor. It’s not mandatory to follow the simple RGB sequence, but for any change
instructed by the I2C control will only take place at the falling edge of the corresponding CTRL signal.
Figure 20. RGB Control Signals Timing Chart
PRIORITIES OF LED CONTROL SIGNALS
The LM3435 does not support color overlapping mode operation. At any instant, only one LED will be enabled
even overlapping control signals applied to the control inputs. The decision logics of the device determine which
LED channel should be enabled in case overlapping control signals are detected at the control inputs. The
GREEN channel has the higher priority over BLUE channel and the RED channel has the lowest priority.
However, if a low priority channel is already turned on before the high priority channel control signal comes in,
the low priority channel will continue to take the control until the control signal ceased. The timing diagram in
below illustrates some typical cases during operation.
Figure 21. Priorities of LED Control Signals
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LED OPEN FAULT REPORTING
The fly-back converter tries to keep VOUT to the forward voltage required by the LED with the desired LED
current output. However, if the LED channel is being opened no matter it is due to LED failure or no connection,
the fly-back converter will limit the VOUT voltage at around 4.7V above VIN. Once such voltage is achieved, an
open-fault-suspect signal will go high. If this open-fault-suspect signal is being detected at 3 consecutive falling
edges of the opened channel control signal, “Fault” pin will be latched high and the corresponding channel open
fault will be reported through I2C. The open fault report can be removed either by pulling EN pin low for less than
100ns (a true shutdown will be triggered if the negative pulse on EN is more than 100ns) or by writing a “0” to “bit
0” of the I2C register ”05h”. The “Fault” pin will be cleared and the I2C fault register will be reset. In order to
reinstate the fault reporting feature, the system need to write a “1” to “bit 0” of the I2C register “05h”.
LED SHORT FAULT REPORTING
If the VOUT is prohibited to regulate at a potential higher than 1.5V above VIN at a LED channel, such LED is
considered being shorted and a short-fault-suspect signal will go high. If this short-fault-suspect signal is being
detected at 3 consecutive falling edges of the shorted channel control signal, “Fault” pin will be latched high and
the corresponding channel short fault will be reported through I2C. The short fault report can be removed either
by pulling EN pin low for less than 100ns (a true shutdown will be triggered if the negative pulse on EN is more
than 100ns) or by writing a “0” to “bit 0” of the I2C register ”05h”. The “Fault” pin will be cleared and the I2C fault
register will be reset. In order to reinstate the fault reporting feature, the system need to write a “1” to “bit 0” of
the I2C register “05h”. Persistently short of LED can cause permanent damage to the device. Whenever the short
fault is detected, the system should turn off the faulty channel immediately by pulling the corresponding PWM
control pin to GND.
THERMAL SHUTDOWN
Internal thermal shutdown circuitry is included to protect the device in the event that the maximum junction
temperature is exceeded. The threshold for thermal shutdown in LM3435 is around 160°C and it will be resumed
to normal operation again once the temperature cools down to below around 140°C.
I2C Compatible Interface
INTERFACE BUS OVERVIEW
The I2C compatible synchronous serial interface provides access to the programmable functions and registers on
the device. This protocol uses a two-wire interface for bi-directional communications between the devices
connected to the bus. The two interface lines are the Serial Data Line (SDA), and the Serial Clock Line (SCL).
These lines should be connected to a positive supply, via a pull-up resistor and remain HIGH even when the bus
is idle. Every device on the bus is assigned a unique address and acts as either a Master or a Slave depending
on whether it generates or receives the serial clock (SCL).
DATA TRANSACTIONS
One data bit is transferred during each clock pulse. Data is sampled during the high state of the serial clock
(SCL). Consequently, throughout the clock’s high period, the data should remain stable. Any changes on the
SDA line during the high state of the SCL and in the middle of a transaction, aborts the current transaction. New
data should be sent during the low SCL state. This protocol permits a single data line to transfer both
command/control information and data using the synchronous serial clock.
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ADR6
Bit7 ADR5
bit6 ADR4
bit5 ADR3
bit4 ADR2
bit3 ADR1
bit2 ADR0
bit1 R/W
bit0
MSB LSB
I2C SLAVE address (chip address)
SDA
SCL SP
START condition STOP condition
SCL
SDA
data
change
allowed
data
valid
data
change
allowed
data
valid
data
change
allowed
LM3435
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SNVS724C –JUNE 2011–REVISED MAY 2013
I2C DATA VALIDITY
The data on SDA line must be stable during the HIGH period of the clock signal (SCL). In other words, state of
the data line can only be changed when CLK is LOW.
Figure 22. I2C Signals : Data Validity
I2C START and STOP CONDITIONS
START and STOP bits classify the beginning and the end of the I2C session. START condition is defined as SDA
signal transitioning from HIGH to LOW while SCL line is HIGH. STOP condition is defined as the SDA
transitioning from LOW to HIGH while SCL is HIGH. The I2C master always generates START and STOP bits.
The I2C bus is considered to be busy after START condition and free after STOP condition. During data
transmission, I2C master can generate repeated START conditions. First START and repeated START
conditions are equivalent, function-wise.
Figure 23. I2C Start and Stop Conditions
I2C ADDRESSES AND TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) being transferred first.
Each byte of data has to be followed by an acknowledge bit. The acknowledge bit related clock pulse is
generated by the master. The transmitter releases the SDA line (HIGH) during the acknowledge clock pulse. The
receiver must pull down the SDA line during the 9th clock pulse, signifying an acknowledgement. A receiver
which has been addressed must generate an acknowledge bit after each byte has been received. After the
START condition, the I2C master sends a chip address. This address is seven bits long followed by an eighth bit
which is a data direction bit (R/W). The LM3435 address is 50h or 51H which is determined by the R/W bit. I2C
address (7 bits) for LM3435 is 28H. For the eighth bit, a “0” indicates a WRITE and a “1” indicates a READ.
The second byte selects the register to which the data will be written. The third byte contains data to write to the
selected register.
Figure 24. I2C Chip Address
Register changes take an effect at the SCL rising edge during the last ACK from slave.
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SDA
SCL
1
82
3
76
5
8
10
4 9
1 7
start msb Chip Address lsb w ack msb Register Add lsb ack msb DATA lsb ack stop
ack from slave ack from slave ack from slave
SCL
SDA
start id = 28h w ack addr = 02h ack ackaddress 02h data stop
LM3435
SNVS724C –JUNE 2011–REVISED MAY 2013
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w = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by either master or slave)
rs = repeated start
id = 7-bit chip address, 50H (ADDR_SEL=0) or 51H (ADDR_SEL=1) for LM3435.
Figure 25. I2C Write Cycle
When a READ function is to be accomplished, a WRITE function must precede the READ function, as shown in
the Read Cycle waveform.
Figure 26. I2C Read Cycle
I2C TIMING PARAMETERS (VIN = 2.7V to 5.5V, SVDD = 1.7V to VIN)
Figure 27. I2C Timing Diagram
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Symbol Parameter Limit(1) Units
Min Max
1 Hold Time (repeated) START Condition 0.6 µs
2 Clock Low Time 1.3 µs
3 Clock High Time 600 ns
4 Setup Time for a Repeated START Condition 600 ns
5 Data Hold Time (Output direction) 300 ns
5 Data Hold Time (Input direction) 0 ns
6 Data Setup Time 100 ns
7 Rise Time of SDA and SCL 20+0.1Cb 300 ns
8 Fall Time of SDA and SCL 15+0.1Cb 300 ns
9 Set-up Time for STOP condition 600 ns
10 Bus Free Time between a STOP and a START Condition 1.3 µs
Cb Capacitive Load for Each Bus Line 10 200 pF
(1) Note: Data specified by design.
I2C REGISTER DETAILS
The I2C bus interacts with the LM3435 to realize the features of LED current program inter-color delay time
program and Fault reporting function. The operation of these functions requires the writing and reading of the
internal registers of the LM3435. In below is the master register map of the device.
Table 1. Master Register Map
ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
00h LEDLO 0 0 RLED[1:0] BLED[1:0] GLED[1:0] 0011 1111
01h GLEDH GLED[9:2] 1111 1111
02h BLEDH BLED[9:2] 1111 1111
03h RLEDH RLED[9:2] 1111 1111
05h FLT_RPT 0 0 0 0 0 0 0 FLT_RPT 0000 0001
06h DELAY RDLY[1:0] 1 BDLY[1:0] 1 GDLY[1:0] 1111 1111
07h FAULT GO GS 0 BO BS 0 RO RS 0000 0000
LED Current Register Definitions
The LED currents for each color can be accurately adjusted by 10 bits resolution (1024 steps) independently. By
writing control bytes into the LM3435 LED current Registers, the LED currents can be precisely set to any value
in the range of IMIN to IREF.
In below is the LED Current Low register bit definition:
ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
00h LEDLO 0 0 RLED[1:0] BLED[1:0] GLED[1:0] 0011 1111
Bits Description
7:6 Reserved. These bits always read zeros.
5:4 The least significant bits of the 10-bit RLED register. This register is for programming the level of current for the Red LED.
3:2 The least significant bits of the 10-bit BLED register. This register is for programming the level of current for the Blue LED.
1:0 The least significant bits of the 10-bit GLED register. This register is for programming the level of current for the Green LED.
In below is the LED Current High register bit definition:
ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
01h GLEDH GLED[9:2] 1111 1111
02h BLEDH BLED[9:2] 1111 1111
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ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
03h RLEDH RLED[9:2] 1111 1111
Bits Description
7:0 The most 8 significant bits of the 10-bit GLED, BLED and RLED registers respectively. These registers are for programming
the level of current of the Green LED, Blue LED and Red LED independently.
Fault Reporting Register Definition
The fault reporting feature of the LM3435 can be selected by the system designer according to their application
needs. To select or de-select this feature is realized by writing one bit into the FLT_RPT register.
ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
05h FLT_RPT 0 0 0 0 0 0 0 FLT_RPT 0000 0001
Bits Description
7:1 Reserved. These bits always read zeros.
0 This bit defines the mode of fault report feature. Writing a “ 1 “ into this bit enables the fault reporting feature, otherwise no
Fault signal output at Pin 27.
Color Transition Delay Register Definition
The transition of one color into next color is not executed immediately. Certain delay is inserted in between to
ensure the LED rail voltage stabilized before turning the next LED on. This delay is user programmable by writing
control bits into the DELAY register for each color individually. The power up default delay time is 35µs and this
delay can be programmed from 5 µs to 35 µs maximum in step of 10 µs.
ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
06h DELAY RDLY[1:0] 1 BDLY[1:0] 1 GDLY[1:0] 1111 1111
Bits Description
7:6 These two bits are for programming the Red transition delay.
5 Reserved. This bit always read “ 1“.
4:3 These two bits are for programming the Blue transition delay.
2 Reserved. This bit always read “ 1“.
1:0 These two bits are for programming the Green transition delay.
Fault Register Definition
The LM3435 features LED fault detection capability. Whenever a LED fault is detected (open or short), the
FAULT output (pin 27) will go high to indicate a LED fault is detected. The details of the fault can be investigated
by reading the FAULT register. The FAULT register is read only. The fault status can be cleared by clearing and
then re-enabling the FLT_RPT register or power up reset of the device.
ADDR REGISTER D7 D6 D5 D4 D3 D2 D1 D0 DEFAULT
07h FAULT GO GS 0 BO BS 0 RO RS 0000 0000
Bits Description
7 GO – Green Open. This read only register bit indicates the presence of an OPEN fault of the GREEN LED.
6 GS – Green Short. This read only register bit indicates the presence of an SHORT fault of the GREEN LED.
5 Reserved. This bit always read “ 0 “.
4 BO – Blue Open. This read only register bit indicates the presence of an OPEN fault of the BLUE LED.
3 BS – Blue Short. This read only register bit indicates the presence of an SHORT fault of the BLUE LED.
2 Reserved. This bit always read “ 0 “.
1 RO – Red Open. This read only register bit indicates the presence of an OPEN fault of the RED LED.
0 RS – Red Short. This read only register bit indicates the presence of an SHORT fault of the RED LED.
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