© 2000 Fairchild Semiconductor Corporation DS006373 www .fairchildsemi.com
August 1986
Revised March 2000
DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementa ry Outputs
DM74LS74A
Dual Positive-Edge-Triggered D Flip-Flops with
Preset, Clear and Complementary Outputs
General Descript ion
This device contains two independent positive-edge-trig-
gered D flip-flops with complementary outputs. The infor-
mation on the D input is accepted by the flip-flops on the
positive going edge of the clock pulse. The triggering
occurs at a voltage level and is not directly related to the
transition time of the risin g edge of the clock. The data on
the D input may be changed while the clock is LOW or
HIGH without affecting the outputs as long as the data
setup and hold ti mes are not violated . A low logic level on
the preset or clear inputs will set or reset the outputs
regardless of the logic levels of the other inputs.
Ordering Code:
Devices also available in Ta pe and R eel. Speci fy by appending the s uffix let t er “X” to the orderin g c ode.
Connection Diagram Function Table
H = HIGH Lo gic Level
X = Either LOW or HIGH Logic Level
L = LOW Logic L ev el
= Positi v e-going Transit ion
Q0 = The out put logic lev el of Q be fore the in dica ted input con ditio ns were
established.
Note 1: This configuration is nonstable; that is, it will not persist when either
the pre se t and/or clear inputs ret urn to their inactive (HIGH ) level.
Order Number Package Number Package Description
DM74LS74AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
DM74LS85ASJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
DM74LS74AN N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Inputs Outputs
PR CLR CLK D Q Q
LHXX H L
HLXX L H
L L X X H (Note 1) H (Note 1)
HHHH L
HHLL H
HHLX Q
0Q0
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DM74LS74A
Absolute Maximum Ratings(No te 2) Note 2: The “Absolute Maximum Ratings” are those values beyond which
the saf ety of the device cannot be guarante ed. The device s hould not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not gua rant eed at the absolute maximum ratin gs.
The “Re comme nded Operat ing Co ndition s” table will define the cond itions
for actu al device operation.
Recommended Operating Conditions
Note 3: CL = 15 pF, RL = 2 k, TA = 25°C, and V CC = 5V.
Note 4: CL = 50 pF, RL = 2 k, TA = 25°C, and V CC = 5V.
Note 5: The symbol () indicate s th e ris ing edge of the cloc k pulse is used for reference.
Note 6: TA = 25°C an d VCC = 5V.
Supply Voltage 7V
Input Voltag e 7V
Operating Free Air Temperature Range 0°C to +70°C
Storage Temperature Range 65°C to +150°C
Symbol Parameter Min Nom Max Units
VCC Supply Voltage 4.75 5 5.25 V
VIH HIGH Level Input Voltage 2 V
VIL LOW Level Input Voltage 0.8 V
IOH HIGH Level Output Current 0.4 mA
IOL LOW Level Output Current 8 mA
fCLK Clock Frequency (Note 3) 0 25 MHz
fCLK Clock Frequency (Note 4) 0 20 MHz
tWPulse Width Clock HIGH 18
(Note 3) Preset LOW 15 ns
Clear LOW 15
tWPulse Width Clock HIGH 25
(Note 4) Preset LOW 20 ns
Clear LOW 20
tSU Setup Time (Note 3)(Note 5) 20ns
tSU Setup Time (Note 4)(Note 5) 25ns
tHHold Time (Note 5)(Note 6) 0ns
TAFree Air Operating Temperature 0 70 °C
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DM74LS74A
Electri cal Characteristics
over recommended operating free air temperature range (unless otherwise noted)
Note 7: All typicals are at VCC = 5V, TA = 25°C.
Note 8: N ot more tha n one output should be shorted at a time, and the durat ion shou ld not ex ce ed one secon d. For dev ic es , with fe edback from the outputs,
where shortin g th e outp uts to ground may ca use the outputs to ch ange l o gic state an equi vale nt te st may be perfor med wh ere VO = 2.125V with th e minimum
and maxim um limit s reduced by one half fro m t heir stated v alues. This is v ery us eful when using automatic test equipm ent.
Note 9: With all outputs OPEN, ICC is measure d w it h C LOCK grounded af te r s et t ing the Q an d Q outputs HIGH in turn.
Switching Characteristics
at VCC = 5V and TA = 25°C
Symbol Parameter Conditions Min Typ Max Units
(Note 7)
VIInput Clamp Voltage VCC = Min, II = 18 mA 1.5 V
VOH HIGH Level VCC = Min, IOH = Max 2.7 3.4 V
Output Voltage VIL = Max, VIH = Min
VOL LOW Level VCC = Min, I OL = Max 0.35 0.5
Output Voltage VIL = Max, VIH = Min V
IOL = 4 mA, VCC = Min 0.25 0.4
IIInput Current @ Max VCC = Max Data 0.1
Input V oltag e VI = 7V Clock 0.1 mA
Preset 0.2
Clear 0.2
IIH HIGH Level VCC = Max Data 20
Input Current VI = 2.7V Clock 20 µA
Clear 40
Preset 40
IIL LOW Level VCC = Max Data 0.4
Input Current VI = 0.4V Clock 0.4 mA
Preset 0.8
Clear 0.8
IOS Short Circuit Output Current VCC = Max (Note 8) 20 100 mA
ICC Supply Current VCC = Max (Note 9) 4 8 mA
From (Input) RL = 2 k
Symbol Parameter To (Output) CL = 15 pF CL = 50 pF Units
Min Max Min Max
fMAX Maximum Clock Frequency 25 20 MHz
tPLH Propagation Delay Time Clock to Q or Q 25 35 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time Clock to Q or Q 30 35 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time Preset to Q 25 35 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time Preset to Q 30 35 ns
HIGH-to-LOW Level Output
tPLH Propagation Delay Time Clear to Q 25 35 ns
LOW-to-HIGH Level Output
tPHL Propagation Delay Time Clear to Q 30 35 ns
HIGH-to-LOW Level Output
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DM74LS74A
Physical Dimensions inches (millimeters) unless otherwise noted
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
Package Number M14A
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DM74LS74A
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M14D
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DM74LS74A Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N14A
Fairchild does no t assume any responsibility for use of any circuitry de scribed, no circuit patent licenses are imp lied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
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