January 1999 TOKO, Inc. Page 1
TK83854
GND
PKLMT
CAOUT
ISENSE
MULTOUT
IAC
VAOUT
VRMS
GTDRV
VCC
CT
SS
RSET
VSENSE
ENA
Vref
ENA
OSC
7-5 V
REF
IC POWER
15 V
RUN
R
R
SQ
A
B
C
RUN
1
VSENSE
IAC
VRMS
SS
ISENSE CTRSET GND
GTDRV
VCC
Vref
PKLMTCAOUT
MULTOUT
VAOUT
VCC
16/10 V
7.5 V
2.5/2.25 V
14 µA X2
IM = AB
C
FEATURES
■Control Boost PWM to 0.99 Power Factor
■Limit Line Current Distortion to < 5%
■Worldwide Operation without Switches
■Feed-Forward Line Regulation
■Low Noise Sensitivity
■Pin Compatible with UC2854, and UC3854
(Licensed Source)
FEATURES (CONT.)
■Low Start-Up Supply Current
■Fixed-Frequency PWM Drive
■Low-Offset Analog Multiplier/Divider
■1 Amp Totem-Pole Gate Driver
■Precision Voltage Reference
BLOCK DIAGRAM
TK83854
DESCRIPTION
The TK83854 family of integrated circuits provide active
power factor correction for power systems that otherwise
would draw non-sinusoidal current from sinusoidal power
lines. These parts implement all the control functions
necessary to build a power supply preregulator capable of
optimally using available power-line current while
minimizing line-current distortion. To do this, the TK83854
contains a voltage amplifier, a precision analog multiplier/
divider, a current amplifier, and a fixed-frequency PWM. In
addition, the TK83854 contains a power MOSFET gate
driver, 7.5 V reference, line anticipator, load-enable
comparator, low supply detector, and overcurrent
comparator.
The TK83854 family uses average current-mode control to
accomplish fixed-frequency current control with stability
and low distortion. Unlike peak current-mode control,
average current control accurately maintains sinusoidal
line current without slope compensation.
The TK83854's high reference voltage and high oscillator
amplitude minimize noise sensitivity while fast PWM
elements permit chopping frequencies above 200 kHz.
The TK83854 can be used in systems with line voltages
that vary from 75 to 275 V and with line frequencies across
the 50 Hz to 400 Hz range. To reduce the burden on the
ORDERING INFORMATION
TAPE/REEL CODE
TL: Tape Left
MG: Ma
g
azine
Tape/Reel Code
TK83854
Extended Temp. Range
Package Code
PACKAGE CODE
D: DIP-16
M: SOP-16
TEMP. RANGE
(OPTIONAL)
I: -40 TO +85 C
circuitry that supplies power to this device, the TK83854
family features low start-up supply current.
These devices are available in 16-pin plastic dual in-line
(DIP) and 16-pin surface mount (SOP) packages.
83854
83854
DIP-16
SOP-16
HIGH POWER FACTOR PREREGULATOR
Page 2 January 1999 TOKO, Inc.
TK83854
ABSOLUTE MAXIMUM RATINGS
TK83854 ELECTRICAL CHARACTERISTICS
Test conditions: VCC = 18 V, RSET = 15 k to GND, CT = 1.5 nF, PKLMT = 1 V, ENA = 7.5 V, VRMS = 1.5 V, IAC = 100 µA,
VISENSE = 0 V, VOUT(CA) = 3.5 V, VOUT(VA) = 5 V, VSENSE = 7.5 V, No load on SS, CAOUT, VAOUT, Vref, GTDRV, TA = Operating
Temperature Range, unless otherwise specified.
Supply Voltage ......................................................... 35 V
Power Dissipation TK83854D (Note 1) ..................... 1 W
Power Dissipation TK83854M (Note 2).............. 750 mW
GTDRV Current (Continuous) ................................. 0.5 A
GTDRV Current (50% Duty Cycle).......................... 1.5 A
Input Voltage (VSENSE, VRMS) .................................... 11 V
Input Voltage (ENA, ISENSE, MULTOUT) .................. 11 V
Input Voltage (PKLMT)............................................... 5 V
Input Voltage (IAC, RSET, PKLMT) ........................ 10 mA
Storage Temperature Range ................... -55 to +150 °C
Operating Temperature Range ......................0 to +70 °C
Extended Temperature Range................... -40 to +85 °C
Junction Temperature .......................................... 150 °C
Lead Soldering Temperature (10 s) ..................... 235 °C
Note 1: Power dissipation is 1 W when mounted as recommended. Derate at 8 mW/°C for operation above 25°C.
Note 2: Power dissipation is 750 mW when mounted as recommended. Derate at 3.3 mW/°C for operation above 25°C.
Gen. Note: All voltages with respect to GND (Pin 1).
Gen. Note: All currents are positive into the specified terminal.
LOBMYSRETEMARAPSNOITIDNOCTSETNIMPYTXAMSTINU
I
)FFO(CC
FFOtnerruCylppuSV0=ANE5.10.2Am
I
)NO(CC
NOtnerruCylppuS 0161Am
OLVU
)NO(
V
CC
dlohserhTno-nruT5.410.615.71V
OLVU
)FFO(
V
CC
dlohserhTffo-nruT90111V
V
ANE
gnisiR,dlohserhTelbanE04.255.207.2V
V
)TSYH(ANE
siseretsyHdlohserhTelbanE02.052.003.0V
I
ANE
tnerruCtupnIelbanEV0=ANE0.5-2.0-0.5Aµ
I
)SMR(V
V
SMR
tnerruCtupnIV
SMR
V5=0.1-10.0-0.1Aµ
REIFILPMAEGATLOV
V
)AV(SO
egatloVtesffOpmAegatloVAV
TUO
V0=8-8Vm
I
)AV(B
V
ESNES
tnerruCsaiB005-52-005An
A
)AV(LO
niaGpmAegatloV07001Bd
∆V
)AV(TUO
gniwStuptuOpmAegatloV 8.5ot5.0V
I
)AV(CS
tnerruCtiucriCtrohSpmAegatloVAV
TUO
V0=03-21-5-Am
I
SS
tnerruCSSV5.2=SS02-41-6-Aµ
REIFILPMATNERRUC
V
)AC(SO
egatloVtesffOpmAtnerruC4-4Vm
I
)AC(B
I
ESNES
tnerruCsaiB005-021-005An
A
)AC(LO
niaGpmAtnerruC08011Bd
∆V
)AC(TUO
gniwStuptuOpmAtnerruC 61ot5.0V
January 1999 TOKO, Inc. Page 3
TK83854
Note 3: Guaranteed by design; not 100% tested.
Gen Note: ENA input is internally clamped to approximately 14 V.
TK83854 ELECTRICAL CHARACTERISTICS (CONT.)
Test conditions: VCC = 18 V, RSET = 15 k to GND, CT = 1.5 nF, PKLMT = 1 V, ENA = 7.5 V, VRMS = 1.5 V, IAC = 100 µA,
VISENSE = 0 V, VOUT(CA) = 3.5 V, VOUT(VA) = 5 V, VSENSE = 7.5 V, No load on SS, CAOUT, VAOUT, Vref, GTDRV, TA = Operating
Temperature Range, unless otherwise specified.
LOBMYSRETEMARAPSNOITIDNOCTSETNIMPYTXAMSTINU
REIFILPMATNERRUC
I
)AC(CS
tnerruCtiucriCtrohSpmAtnerruCAC
TUO
V0=03-21-5-Am
V
)ESNESI(
I,egnaRtupnI
ESNES
TLUM,
TUO
ot3.0- 5.2 V
WBGtcudorPWB-niaGpmAtnerruCT
A
)3etoN(C°52=004008zHk
ECNEREFER
V
fer
egatloVecnerefeR I
fer
T,Am0=
A
C°52=4.75.76.7V
I
fer
.pmeTrevO,Am0=53.705.756.7V
∆V
)DAOL(fer
V
fer
noitalugeRdaoLI<Am01-
fer
Am0<51-551Vm
∆V
)ENIL(fer
V
fer
noitalugeReniLV<V51
CC
V53<01-201Vm
I
)CS(fer
V
fer
tnerruCtiucriCtrohSV
fer
V0=05-82-21-Am
TIMILKAEP
V
)LP(SO
egatloVtesffOTMLKP 01-01Vm
I
)LP(B
tnerruCtupnITMLKPV1.0-=TMLKP002-001-Aµ
t
)LP(D
yaleD.porPVRDTGotTMLKP Vm05morfgnillafTMLKP Vm05-ot 571sn
REVIRDETAG
V
)XAM(G
egatloVtuptuOVRDTGmumixaMV<V81
CC
daoLoN,V53<0.315.410.81V
V
HG
HGIHegatloVtuptuOVRDTGV,ecruoSAm002
CC
V51=0.218.21V
V
)FFO(LG
FFO,WOLegatloVtuptuOVRDTGV,kniSAm05
CC
V0=9.05.1V
V
LG
,WOLegatloVtuptuOVRDTG kniSAm0020.12.2V
kniSAm011.04.0V
I
)KP(G
tnerruCVRDTGkaePdaoLFn010.1A
t
)G(R
t/
)G(F
emiTllaF/esiRVRDTGdaoLFn153sn
D
XAM
elcyCytuDmumixaMVRDTGAC
TUO
V7=59%
Page 4 January 1999 TOKO, Inc.
TK83854
Note 4: Multiplier gain constant (K) is defined by IOM = [K x IIAC x (VOUT(VA) - 1)] / VRMS2.
TK83854 ELECTRICAL CHARACTERISTICS (CONT.)
Test conditions: VCC = 18 V, RSET = 15 k to GND, CT = 1.5 nF, PKLMT = 1 V, ENA = 7.5 V, VRMS = 1.5 V, IAC = 100 µA,
VISENSE = 0 V, VOUT(CA) = 3.5 V, VOUT(VA) = 5 V, VSENSE = 7.5 V, No load on SS, CAOUT, VAOUT, Vref, GTDRV, TA = Operating
Temperature Range, unless otherwise specified.
LOBMYSRETEMARAPSNOITIDNOCTSETNIMPYTXAMSTINU
REILPITLUM
I
)CAI(MO
tnerruCtuptuOreilpitluM
CAI(
)DETIMIL
R,Aµ001=CAI
TES
k01=022-002-081-Aµ
I
)CZ(MO
oreZtnerruCtuptuOreilpitluMR,Aµ0=CAI
TES
k51=0.2-2.0-0.2Aµ
I
)TES(MO
tnerruCtuptuOreilpitluM
R(
TES
)DETIMIL
R,Aµ054=CAI
TES
,k51=
V
SMR
V6=AV,V1= 082-552-022-Aµ
I
MO
tnerruCtuptuOreilpitluM
V,Aµ05=CAI
SMR
,V2=
V4=AV 05-24-33-Aµ
V,Aµ001=CAI
SMR
,V2=
V2=AV 83-72-21-Aµ
V,Aµ002=CAI
SMR
,V2=
V4=AV 561-051-501-Aµ
V,Aµ003=CAI
SMR
,V1=
V2=AV 052-522-051-Aµ
V,Aµ001=CAI
SMR
,V1=
V2=AV 59-08-06-Aµ
KtnerruCniaGreilpitluM)4etoN(0.1-V
ROTALLICSO
f
CSO
ycneuqerFrotallicsO R
TES
k51=645526zHk
R
TES
k2.8=68201811zHk
V
PR
C
T
edutilpmAkaeP-ot-kaePpmaR9.44.59.5V
V
VR
C
T
egatloVyellaVpmaR8.01.13.1V
January 1999 TOKO, Inc. Page 5
TK83854
10 k
10 k 100
10 k
10 k
10 k
10 nF
10 nF
0.1 nF
0.39 nF
1.0 nF
1.0 nF
0.01 nF
8.2 k
10 k
15 k
100
10 µF 0.1 µF
GND
PKLMT
CAOUT
ISENSE
MULT
IAC
VAOUT
V RMS
GTDRV
VCC
CT
SS
RSET
VSENSE
ENA
Vref
PKLMT
NC
CAOUT
IAC
MULTOUT
NC
VAOUT
VRMS
NC
ENA
NC
VCC
BAC
7.5 V
IM = (AB) / C
TYPICAL PERFORMANCE CHARACTERISTICS
TA = TJ = 25 °C
TEST CIRCUIT
MULTOUT (µA)
0
400
MULTIPLIER OUTPUT vs.
VOLTAGE ON MULTIPLIER
IAC (µA)
0 200 400 600 800
200
600 VAOUT = 5 V
V(rms) = 2 V
MULTOUT = 3 V
MULTOUT = 0 V
MULTOUT = 1 V
MULTOUT = 2 V
0.1 1 10 100 1000 10000
FREQUENCY (kHz)
AOL(CA) (dB)AND PHASE MARGIN ( )
120
100
80
60
20
40
PHASE MARGIN
OPEN LOOP GAIN
CURRENT AMPLIFIER GAIN AND
PHASE vs. FREQUENCY
0
-20
0.1 1 10 100 1000 10000
FREQUENCY (kHz)
AOL(VA) (dB)AND PHASE MARGIN ( )
120
100
80
60
20
40
PHASE MARGIN
OPEN LOOP GAIN
VOLTAGE AMPLIFIER GAIN AND
PHASE vs. FREQUENCY
0
-20 0 10 100
RSET (kΩ)
DUTY CYCLE (%)
100
95
90
80
85
GATE DRIVE MAXIMUM DUTY
CYCLE vs. RSET
75
70
FREQUENCY (kHz)
RSET (kΩ)
1 10 100
1000
100
1
100 pF
OSCILLATOR FREQUENCY VS.
RSET AND CT
10
200 pF
500 pF
10 nF 5 nF
1 nF
2 nF
3 nF
tR(G) / tF(G) (ns)
100
500
GATE DRIVE RISE AND FALL TIMES
vs. LOAD CAPACITANCE
CLOAD (µF)
0 .01 .02 .03 .04 .05
300
700
FALL TIME
RISE TIME
Page 6 January 1999 TOKO, Inc.
TK83854
MULT OUT (µA)
40
120
MULTIPLIER OUTPUT vs. MULTIPLIER
INPUT (MULTOUT = 0 V)
IAC (µA)
0 100 200 300 400 500
80
0
160 V(rms) = 4 V
VAOUT = 5 V
VAOUT = 3 V
VAOUT = 2 V
VAOUT = 1.25 V
VAOUT = 4 V
MULT OUT (µA)
20
100
MULTIPLIER OUTPUT vs. MULTIPLIER
INPUT (MULTOUT = 0 V)
IAC (µA)
0 100 200 300 400 500
60
140 V(rms) = 5 V
VAOUT = 5 V
VAOUT = 3 V
VAOUT = 1.25 V
MULT OUT (µA)
150
250
MULTIPLIER OUTPUT vs. MULTIPLIER
INPUT (MULTOUT = 0 V)
IAC (µA)
100
0 100 200 300 400 500
200
0
300
50
V(rms) = 3 V
VAOUT = 5 V
VAOUT = 3 V
VAOUT = 2 V
VAOUT = 1.25 V
TYPICAL PERFORMANCE CHARACTERISTICS (CONT.)
TA = TJ = 25 °C
January 1999 TOKO, Inc. Page 7
TK83854
PIN DESCRIPTION
GROUND PIN (GND)
All voltages are measured with respect to GND. VCC and
Vref should be bypassed directly to GND with a 0.1 µF or
larger ceramic capacitor. The timing capacitor discharge
current also returns to this pin, so the lead from the
oscillator timing capacitor to GND should also be as short
and as direct as possible.
PEAK LIMIT (PKLMT)
The threshold for PKLMT is GND. Connect this input to the
negative voltage on the current sense resistor as shown in
Figure 1. Use a resistor to Vref to offset the negative current
sense signal up to GND.
CURRENT AMPLIFIER OUTPUT (CAOUT)
This is the output of a wide-bandwidth op-amp that senses
line current and commands the Pulse Width Modulator
(PWM) to force the correct current. This output can swing
close to GND, allowing the PWM to force zero duty cycle
when necessary. The current amplifier will remain active
even if the IC is disabled.
CURRENT SENSE MINUS (ISENSE)
This is the inverting input to the current amplifier. This input
and the non-inverting input MULTOUT remain functional
down to and below GND. Care should be taken to avoid
taking these inputs below –0.5 V, because they are
protected with diodes to GND.
MULTIPLIER OUTPUT AND CURRENT SENSE PLUS
(MULTOUT)
The output of the analog multiplier and the non-inverting
input of the current amplifier are connected together at
MULTOUT. The cautions about taking ISENSE below –0.5 V
also apply to MULTOUT. As the multiplier output is a
current, this is a high impedance input similar to ISENSE, so
the current amplifier can be configured as a differential
amplifier to reject GND noise. Figure 1 shows an example
of using the current amplifier differentially.
INPUT AC CURRENT (IAC)
This input to the analog multiplier is a current. The multiplier
is tailored for very low distortion from this current input (IAC
to MULTOUT), so this is the only multiplier input that should
be used for sensing instantaneous line voltage. The nominal
voltage on IAC is 6 V, so in addition to a resistor from IAC
to rectified line, connect a resistor from IAC to Vref. If the
resistor to Vref is one-fourth of the value of the resistor to
the rectifier, then the 6 V offset will be cancelled, and the
line current will have minimal crossover distortion.
VOLTAGE AMPLIFIER OUTPUT (VAOUT)
This is the output of the op-amp that regulates output
voltage. Like the current amplifier, the voltage amplifier will
also stay active even if the IC is disabled with either ENA
or VCC. This means that large feedback capacitors across
the amplifier will stay charged through momentary disable
cycles. Voltage amplifier output levels below ~1 V will
inhibit multiplier output.
RMS LINE VOLTAGE (V(rms))
The output of a boost PWM is proportional to the input
voltage, so when the line voltage into a low-bandwidth
boost PWM voltage regulator changes, the output will
change immediately and slowly recover to the regulated
level. For these devices, the V(rms) input compensates for
line voltage changes if it is connected to a voltage
proportional to the RMS input line voltage. For best control,
the VRMS voltage should stay between 1.5 V and 3.5 V.
VOLTAGE REFERENCE OUTPUT (Vref)
Vref is the output of an accurate 7.5 V voltage reference.
This output is capable of delivering 10 mA to peripheral
circuitry and is internally short circuit current limited. Vref is
disabled and will remain at 0 V when VCC is low or when
ENA is low. Bypass Vref to GND with a 0.1 µF or larger
ceramic capacitor for best stability.
ENABLE (ENA)
ENA is a logic input that will enable the PWM output,
voltage reference, and oscillator. ENA also will release the
soft start clamp, allowing SS to rise. When unused, connect
ENA to a +5 V supply or pull ENA high with a 22 k resistor.
The ENA pin is not intended to be used as a high-speed
shutdown to the GTDRV output.
Page 8 January 1999 TOKO, Inc.
TK83854
VOLTAGE AMPLIFIER INVERTING OUTPUT (VSENSE)
This is normally connected to a feedback network and to
the boost converter output through a divider network.
OSCILLATOR CHARGING CURRENT AND MULTIPLIER
LIMIT SET (RSET)
A resistor from RSET to ground will program oscillator
charging current and maximum multiplier output. Multiplier
output current will not exceed 3.75 V divided by the resistor
from RSET to ground.
SOFT-START (SS)
SS will remain at GND as long as the IC is disabled or VCC
is too low. SS will pull up to over 8 V by an internal 14 µA
current source when both VCC becomes valid and the IC is
enabled. SS will act as the reference input to the voltage
amplifier if SS is below Vref. With a large capacitor from SS
to GND, the reference to the voltage regulating amplifier
will rise slowly, and increase the PWM duty cycle slowly.
In the event of a disable command or a supply dropout, SS
will quickly discharge to ground and disable the PWM.
OSCILLATOR TIMING CAPACITOR (CT )
A capacitor from CT to GND will set the PWM oscillator
frequency according to this relationship:
fOSC = 1.25 / (RSET x CT)
POSITIVE SUPPLY VOLTAGE (VCC)
Connect VCC to a stable source of at least 20 mA above 17
V for normal operation. Also bypass VCC directly to GND to
absorb supply current spikes required to charge external
MOSFET gate capacitances. To prevent inadequate
GTDRV signals, these devices will be inhibited unless VCC
exceeds the upper undervoltage lockout threshold and
remains above the lower threshold.
GATE DRIVER (GTDRV)
The output of the PWM is a totem pole MOSFET gate
driver on GTDRV. This output is internally clamped to
15 V so the IC can be operated with VCC as high as 35 V.
Use a series gate resistor of at least 5 ohms to prevent
PIN DESCRIPTION (CONT.)
interaction between the gate impedance and the GTDRV
output driver that might cause the GTDRV output to
overshoot excessively. Some overshoot of the GTDRV
output is always expected when driving a capacitive load.
January 1999 TOKO, Inc. Page 9
TK83854
APPLICATION INFORMATION
A 250 W PREREGULATOR
Figure 1 shows a typical application of the TK83854 as a
preregulator with high power factor and efficiency. The
assembly consists of two distinct parts, the control circuit
centering on the TK83854 and the power section.
The power section is a "boost" converter, with the inductor
operating in the continuous mode. In this mode, the duty
cycle is dependent on the ratio between input and output
voltages. Also, the input current has low switching frequency
ripple, which means that the line noise is low. Furthermore,
the output voltage must be higher than the peak value of
the highest expected AC line voltage, and all components
must be rated accordingly.
In the control section, the TK83854 provides PWM pulses
to the power MOSFET gate (GTDRV, Pin 16). The duty
cycle of this output is simultaneously controlled by four
separate inputs to the chip:
INPUT PIN # FUNCTION
VSENSE 11 Output DC Voltage
IAC 6 Line Voltage Waveform
ISENSE /MULTOUT 4/5 Line Current
VRMS 8 RMS Line Voltage
Additional controls of an auxiliary nature are provided.
They are intended to protect the switching power MOSFET
from certain transient conditions, as follows:
INPUT PIN # FUNCTION
ENA 10 Start-up Delay
SS 13 Soft Start
PKLMT 2 Maximum Current Limit
PROTECTION INPUTS
Enable (ENA)
The ENA input must reach 2.5 V before the Vref and
GTDRV outputs are enabled. This provides a means to
shut down the gate in case of trouble, or to add a time delay
at power up. A hysteresis gap of 200 mV is provided at this
terminal to prevent erratic operation. Undervoltage
protection is provided directly at Pin 15, where the on/off
thresholds are 16 V and 10 V, respectively.
Soft-Start (SS)
The voltage at Pin 13 (SS) can reduce the reference
voltage used by the error amplifier to regulate the output
DC voltage. With Pin 13 open, the reference voltage is
typically 7.5 V. An internal current source delivers
approximately 14 µA from Pin 13. Thus, a capacitor
connected between that pin and GND will charge linearly
from zero to 7.5 V in 0.54 x C seconds, with C expressed
in microfarads.
Peak Current Limit (PKLMT)
Use Pin 2 to establish the highest value of current to be
controlled by the power MOSFET. With the resistor divider
values shown in Figure 1, the 0.0 V threshold at Pin 2 is
reached when the voltage drop across the 0.25 Ω current
sense resistor is 7.5 V x 1.6 k / 10 k = 1.2 V, corresponding
to 4.8 A. A bypass capacitor from Pin 2 to ground is
recommended to filter out very high frequency noise.
CONTROL INPUTS
Output DC Voltage Sense (VSENSE)
The threshold voltage for the VSENSE input is 7.5 V and the
input bias current is typically -10 nA. The values shown in
Figure 1 are for an output voltage of 400 VDC. In this
circuit, the voltage amplifier operates with a constant low
frequency gain for minimum output excursions. The
0.047 µF feedback capacitor places a 15 Hz pole in the
voltage loop that prevents 120 Hz ripple from propagating
to the output current.
Line Waveform (IAC)
In order to force the line current waveshape to follow the
line voltage, a sample of the power line voltage waveform
is introduced at Pin 6. This signal is multiplied by the output
of the voltage amplifier in the internal multiplier to generate
a reference signal for the current control loop.
This input is not a voltage, but a current (hence IAC). It is
set up by the 220 k and 910 k resistive divider (see Figure
1). The voltage at pin 6 is internally held at 6 V, and the two
resistors are chosen so that the current flowing into pin 6
varies from zero (at each zero crossing) to about 400 µA
at the peak of the waveshape. The following formulas were
Page 10 January 1999 TOKO, Inc.
TK83854
used to calculate these resistors:
RIAC = VPK(MAX) / 400 E - 6
= (260 VAC x 2 ) / 400 µA
= 910 k
RREF = RIAC / 4 = 220 k
where VPK is the peak line voltage.
Line Current (ISENSE/MULTOUT )
The voltage drop across the 0.25 Ω current-sense resistor
is applied to Pins 4 and 5 as shown. The current-sense
amplifier also operates with high low-frequency gain, but
unlike the voltage amplifier, it is set up to give the current-
control loop a very wide bandwidth. This enables the line
current to follow the line voltage as closely as possible. In
the present example, this amplifier has a zero at about
500 Hz, and a gain of about 18 dB thereafter.
RMS Line Voltage (VRMS)
An important feature of the TK83854 preregulator is that it
can operate with a three-to-one range of input line voltages,
covering everything from low line in Japan (85 VAC) to
high line in Europe (255 VAC). This is done using line feed-
forward, which keeps the input power constant with varying
input voltage (assuming constant load power). To do this,
the multiplier divides the line current by the square of the
rms value of the line voltage. The voltage applied to Pin 8,
proportional to the average of the rectified line voltage (and
proportional to the RMS value), is squared in the TK83854,
and then used as a divisor by the multiplier block. The
multiplier output, at Pin 5, is a current that increases with
the current at Pin 6 and the voltage at Pin 7, and decreases
with the square of the voltage at pin 8.
PWM Frequency
The PWM oscillator frequency in Figure 1 is 100 kHz. This
value is determined by CT at Pin 14 and RSET at Pin 12.
RSET should be chosen first because it affects the maximum
value of IOM according to the equation:
IOM(MAX) = -3.75 V / RSET
This effectively sets a maximum PWM-controlled current.
APPLICATION INFORMATION (CONT.)
With RSET = 15 k:
IOM(MAX) = -3.75 V / 15 k = -250 µA
It is also important to note that the multiplier output current
will never exceed twice IAC.
With the 3.9 k resistor from MULTOUT to the 0.25 Ω current
sense resistor, the maximum current in the current sense
resistor will be:
IRCS(MAX) = (-IOM(MAX) x 3.9 k) / 0.25 Ω = -3.9 A
Having selected RSET, the current sense resistor, and the
resistor from MULTOUT to the current sense resistor,
calculate CT for the desired PWM oscillator frequency from
the equation:
CT = 1.25 / (f OSC x RSET)
January 1999 TOKO, Inc. Page 11
TK83854
APPLICATION INFORMATION (CONT.)
ENA
OSC
7-5 V
REF
IC POWER
15 V
RUN
R
R
SQ
A
B
C
RUN
1
VSENSE
IAC
VRMS
SS
ISENSE
CTRSET GND
GTDRV
VCC
Vref
PKLMT
MULTOUT
VAOUT
C10
0.01 µF
C9
220 µF
+
C16
1 µF
C7
0.47 µF
R10
20 K
C12
0.1 µF
R9
91 K
R25
910 K R8
910 K R12
27 K
R13
75 K
R20
3 K
R27
8.2 M
R21
24 K
R23
470 K R22
30 K
Q2
D3
1N4746A
D5
1N4148
Q3
ZVN4206A
C1
0.47 µF
BR
1KBU8J
+
-
~
~
TH1
KC015L
C5
0.47 µF
D9
1N5406
L1
1 mH
C14
0.1 µF
C17
0.1 µF
D12
MUR110
D13 1N4148
D11 MUR110
R7
240 K
C6 0.047 µF
R1
0.25 R3
3.9 K
D7
1N5817
R2
3.9 K R4
1.6 K C3 270 pF
C13
68 pF
D10 1N4737
C15 680 pF
D8 1N5817
R29 10 K
R6
24 K
C4 1 µF
R16
20
R18
10 K
R17
511 K
C2
330 µF
D2
MUR860
Q1
IRF840
D4
1N5821
+
C11
1000 pF R14
15 k
ILIMIT
X2
14 µA
7.5 V
2.5 V
16 V
VCC
R28
220 K
IM = AB
C
VOUT
385 VDC
TIP50GE
F1
6 A
FIGURE 1: 250 W PREREGULATOR
Page 12 January 1999 TOKO, Inc.
TK83854
2.3
0.4
10.3
1.27
0.1
Çl
0.12 e
2.8 max
7.5
10.3
0.7
0.76
1.7
1.27
9.53
Recommended Mount Pad
81
16 9
0.25
e
e1
0 ~ 10
Dimensions are shown in millimeters
Tolerance: x.x = ± 0.2 mm (unless otherwise specified)
+0.15
-0.05
0.3
+
+0.15
-0.05
0 ~ 0.3
Marking Information
Marking
TK83854 83854
SOP-16
PACKAGE OUTLINE
Printed in the USA© 1999 Toko, Inc.
All Rights Reserved
TOKO AMERICA REGIONAL OFFICES
Toko America, Inc. Headquarters
1250 Feehanville Drive, Mount Prospect, Illinois 60056
Tel: (847) 297-0070 Fax: (847) 699-7864
IC-167-TK83854
0798O0.0K
Visit our Internet site at http://www.tokoam.com
The information furnished by TOKO, Inc. is believed to be accurate and reliable. However, TOKO reserves the right to make changes or improvements in the design, specification or manufacture of its
products without further notice. TOKO does not assume any liability arising from the application or use of any product or circuit described herein, nor for any infringements of patents or other rights of
third parties which may result from the use of its products. No license is granted by implication or otherwise under any patent or patent rights of TOKO, Inc.
DIP-16
2.54 0.5
4.2
3.2
e
M0.25 1
e
19.05
0.5 min
7.62
0 ~15
3.3 6.35
1 8
9
16
Dimensions are shown in millimeters
Tolerance: x.x = ± 0.2 mm (unless otherwise specified)
0.3
+
0.3
+
0.25
+0.15
-0.05
Marking
Country of Origin
Lot Number
Western Regional Office
Toko America, Inc.
2480 North First Street , Suite 260
San Jose, CA 95131
Tel: (408) 432-8281
Fax: (408) 943-9790
Midwest Regional Office
Toko America, Inc.
1250 Feehanville Drive
Mount Prospect, IL 60056
Tel: (847) 297-0070
Fax: (847) 699-7864
Eastern Regional Office
Toko America, Inc.
107 Mill Plain Road
Danbury, CT 06811
Tel: (203) 748-6871
Fax: (203) 797-1223
Semiconductor Technical Support
Toko Design Center
4755 Forge Road
Colorado Springs, CO 80907
Tel: (719) 528-2200
Fax: (719) 528-2375
