Features
•Secondary side high speed SR controller
• DCM, CrCM and CCM flyback topologies
•200V proprietary IC technology
•Max 500KHz switching frequency
•Anti-bounce logic and UVLO protection
•7A peak turn off drive current
•Micropower start-up & ultra low quiescent current
•10.7/14.5V gate drive clamp
SmartRectifierTM CONTROL IC
IR1167ASPbF
IR1167BSPbF
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IR1167 Application Diagram
Description
IR1167S is a smart secondary side driver IC designed to drive N-Channel power MOSFETs
used as synchronous rectifiers in isolated Flyback converters.
The IC can control one or more paralleled N-MOSFETs to emulate the behavior of Schottky
diode rectifiers. The drain to source voltage is sensed differentially to determine the polarity
of the current and turn the power switch on and off in proximity of the zero current transi-
tion.
Ruggedness and noise immunity are accomplished using an advanced blanking scheme
and double-pulse suppression which allow reliable operation in continuous, discontinuous
and critical current mode operation and both fixed and variable frequency modes.
Package
8-Lead SOIC
•50ns turn-off propagation delay
•Vcc range from 11.3V to 20V
•Direct sensing of MOSFET drain voltage
•Minimal component count
•Simple design
•Lead-free
•Compatible with 1W Standby, Energy Star, CECP, etc.
RMOT
Cdc
Rg
VD 5
VS 6
MOT
3
OVT
2
EN
4
GND 7
VGATE 8
VCC
1
U1
IR1167S
Q1
XFM
Co
LOAD
Rdc
Vin
Rtn
Ci
Rs
Cs
Data Sheet PD60254F
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* Per EIA/JESD22-A114-B( discharging a 100pF capacitor through a 1.5kW series resistor).
Stress beyond those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these conditions are not implied. All
voltages are absolute voltages referenced to GND. Thermal resistance and power dissipation are measured
under board mounted and still air conditions.
Absolute Maximum Ratings
Parameters Symbol Min. Max. Units
Supply Voltage VCC -0.3 20 V
Enable Voltage VEN -0.3 20 V
Cont. Drain Sense Voltage VD-3 200 V
Pulse Drain Sense Voltage VD-5 200 V
Source Sense Voltage VS-3 20 V
Gate Voltage VGATE -0.3 20 V
Operating Junction Temperature TJ-40 150 °C
Storage Temperature TS-55 150 °C
Thermal Resistance RqJA 128 °C/W
Package Power Dissipation PD970 mW
ESD Protection VESD 2kV
Switching Frequency fsw 500 kHz
SOIC-8, TAMB=25°C
Human Body Model*
VCC=20V, Gate off
SOIC-8
Remarks
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IR1167AS/BS
Electrical Characteristics
The electrical characteristics involve the spread of values guaranteed within the specified supply voltage and
junction temperature range TJ from – 25° C to 125°C. Typical values represent the median values, which are
related to 25°C. If not otherwise stated, a supply voltage of VCC =15V is assumed for test condition.
Supply Section
Parameters Symbol Min. Typ. Max. Units
Supply Voltage Operating Range VCC 12 18 V
VCC Turn On Threshold VCC ON 9.8 10.5 11.3 V
V
CC
Turn Off Threshold
(Under Voltage Lock Out)
VCC Turn On/Off Hysteresis VCC HYST 1.4 1.55 1.7 V
8.5 10
50 65
10.3 12
66 80
Quiescent Current IQCC 1.8 2.2 mA
Start-up Current ICC START 100 200 µA
Sleep Current I
SLEEP
150 200 µA
Enable Voltage High VENHI 2.25 2.75 3.1 V
Enable Voltage Low VENLO 1.3 1.6 1.9 V
Enable Pull-up Resistance REN 1.5 MW
Comparator Section
Parameters Symbol Min. Typ. Max. Units
-7 -3.5 0
Turn-off Threshold VTH1 -15 -10.5 -7 mV
-23 -19 -15
Turn-on Threshold V
TH2
-150 -50 mV
Hysteresis VHYST 55 mV
Input Bias Current IIBIAS1 17.5 µA
Input Bias Current IIBIAS2 30 100 µA
Comparator Input Offset VOFFSET 2mV
Input CM Voltage Range VCM -0.15 2 V
One-Shot Section
Parameters Symbol Min. Typ. Max. Units
Blanking pulse duration tBLANK 10 15 20 µs
2.5 V
5.4 V
Hysteresis VHYST3 40 mV
Minimum On Time Section
Parameters Symbol Min. Typ. Max. Units
190 240 290 ns
2.4 3 3.6 µs
GBD
VD = -50mV
V
OVT floating, VS=0V
OVT = VCC, VS=0V
GBD
OVT = 0V, VS=0V
IR1167A
CLOAD=1nF, fsw = 400kHz
CLOAD=10nF, fSW = 400kHz
IR1167B
CLOAD=1nF, fsw = 400kHz
VCC UVLO
ICC
8.4 9.79
VCC=VCC ON - 0.1V
Remarks
Reset Threshold VTH3
Operating Current
VCC=20V - GBD
VCC=10V - GBD
VD = 200V
VEN=0V, VCC =15V
Remarks
GBD
CLOAD=10nF, fSW = 400kHz
mA
Minimum on time TONmin
Remarks
RMOT =75kW, VCC=12V
RMOT =5kW, VCC=12V
VCC=10V - GBD
Remarks
2.15 3.2
1.2 2.15
2
2.15 3.2
925
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STATE AND TRANSITIONS DIAGRAM
POWER ON
Gate Inactive
UVLO MODE
VCC < VCCon
Gate Inactive
ICC max = 200uA
NORMAL
Gate Active
VCC > VCCon
and
ENABLE HIGH
VCC < VCCuvlo
or
ENABLE LOW
** Guaranteed by Design
Minimum On Time Section
Parameters Symbol Min. Typ. Max. Units
190 240 290 ns
2.4 3 3.6 µs
Minimum on time TONmin
Remarks
RMOT =75kW, VCC=12V
RMOT =5kW, VCC=12V
Gate Driver Section
Parameters Symbol Min. Typ. Max. Units
Gate Low Voltage VGLO 0.3 0.5 V
Gate High Voltage VGTH 9.5 10.7 12.5 V
Gate High Voltage VGTH 12.5 14.5 16.5 V
Rise Time tr1 18 ns
t
r2
125 ns
Fall Time t
f1
10 ns
tf2 30 ns
Turn on Propagation Delay tDon 60 80 ns
Turn off Propagation Delay tDoff 40 65 ns
Pull up Resistance rup 4W
Pull down Resistance rdown 0.7 W
Output Peak Current (source) I
O source
2 A
Output Peak Current (sink) I
O sink
7 A
IR1167A - VCC=12V-18V (internally clamped)
Remarks
IGATE = 200mA
IGATE = -200mA
IR1167B - VCC=12V-18V (internally clamped)
CLOAD = 1nF, VCC=12V
CLOAD = 1nF, VCC=12V
CLOAD = 10nF, VCC=12V
CLOAD = 10nF, VCC=12V
CLOAD = 10nF - GBD
CLOAD = 10nF - GBD
VDS to VGATE -100mV overdrive
VDS to VGATE -100mV overdrive
IGATE = 1A - GBD
9
12
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IR1167AS/BS
Lead Assignments & Definitions
Block Diagram
Lead Assignment Pin# Symbol Description
1
2
3
4
5
6
7
8
VCC
OVT
MOT
EN
VD
VS
GND
GATE
Supply Voltage
Offset Voltage Trimming
Minimum On Time
Enable
FET Drain Sensing
FET Source Sensing
Ground
Gate Drive Output
VD
GND
VGATE
VS
VCC
MOT
EN
OVT
4
3
2
1
5
6
7
8
IR1167S
UVLO
&
REGULATOR
VD
VCC
VTH1
COM
ENA
VGATE
VS
VTH3
VTH1
VTH2 VTH3
Vgate
VDS
MOT
OVT Min OFF Time
RESET
Min ON Time
RESET
DRIVER
VCC
VCC
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GND: Ground
This is ground potential pin of the integrated control
circuit. The internal devices and gate driver are
referenced to this point.
MOT: Minimum On Time
The MOT programming pin controls the amount of
minimum on time. Once VTH2 is crossed for the first
time, the gate signal will become active and turn on
the power FET. Spurious ringings and oscillations can
trigger the input comparator off. The MOT blanks the
input comparator keeping the FET on for a minimum
time.
The MOT is programmed between 200ns and 3us
(typ.) by using a resistor referenced to GND.
OVT: Offset Voltage Trimming
The OVT pin will program the amount of input offset
voltage for the turn-off threshold VTH1.
The pin can be optionally tied to ground, to VCC or
left floating, to select 3 ranges of input offset trimming.
This programming feature allows for accomodating
different RDSon MOSFETs.
GATE: Gate Drive Output
This is the gate drive output of the IC. Drive voltage
is internally limited and provides 2A peak source and
7A peak sink capability. Although this pin can be
directly connected to the power MOSFET gate, the
use of minimal gate resistor is recommended,
expecially when putting multiple FETs in parallel.
Care must be taken in order to keep the gate loop as
short and as small as possible in order to achieve
optimal switching performance.
VS: Source Voltage Sense
VS is the differential sense pin for the power MOSFET
Source. This pin must not be connected directly to
the power ground pin (7) but must be used to create a
kelvin contact as close as possible to the power
MOSFET source pin.
VD: Drain Voltage Sense
VD is the voltage sense pin for the power MOSFET
Drain. This is a high voltage pin and particular care
must be taken in properly routing the connection to
the power MOSFET drain.
Additional filtering and or current limiting on this pin is
not recommended as it would limit switching perfor-
mance of the IC.
VCC: Power Supply
This is the supply voltage pin of the IC and it is
monitored by the under voltage lockout circuit. It is
possible to turn off the IC by pulling this pin below the
minimum turn off threshold voltage, without damage
to the IC.
To prevent noise problems, a bypass ceramic
capacitor connected to Vcc and GND should be
placed as close as possible to the IR1167S.
This pin is internally clamped.
EN: Enable
This pin is used to activate the IC “sleep” mode by
pulling the voltage level below 2.5V (typ). In sleep
mode the IC will consume a minimum amount of cur-
rent. However all switching functions will be disabled
and the gate will be inactive.
Detailed Pin Description
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IR1167AS/BS
GENERAL DESCRIPTION
The IR1167 Smart Rectifier IC can emulate the
operation of diode rectifier by properly driving a
Synchronous Rectifier (SR) MOSFET.
The direction of the rectified current is sensed by the
input comparator using the power MOSFET RDSon
as a shunt resistance and the GATE pin of the
MOSFET is driven accordingly.
Internal blanking logic is used to prevent spurious
transitions and guarantee operation in continuous
(CCM), discountinuous (DCM) and critical (CrCM)
conduction mode.
STATES OF OPERATION
UVLO/Sleep Mode
The IC remains in the UVLO condition until the voltage
on the VCC pin exceeds the VCC turn on threshold
voltage, VCC ON.
During the time the IC remains in the UVLO state, the
gate drive circuit is inactive and the IC draws a
quiescent current of I
CC START. The UVLO mode is
accessible from any other state of operation whenever
the IC supply voltage condition of VCC < V
CC UVLO
occurs.
The sleep mode is initiated by pulling the EN pin below
2.5V (typ). In this mode the IC is essentially shut down
and draws a very low quiescent supply current.
Normal Mode
The IC enters in normal operating mode once the
UVLO voltage has been exceeded. At this point the
gate driver is operating and the IC will draw a
maximum of I
CC from the supply voltage source.
The modes of operation for a Flyback circuit differ
mainly for the turn-off phase of the SR switch, while
the turn-on phase of the secondary switch (which
correspond to the turn off of the primary side switch)
is identical.
Turn-on phase
When the conduction phase of the SR FET is initiated,
current will start flowing through its body diode,
generating a negative VDS voltage across it. The body
diode has generally a much higher voltage drop than
the one caused by the MOSFET on resistance and
therefore will trigger the turn-on threshold VTH2.
At that point the IR1167 will drive the gate of MOSFET
on which will in turn cause the conduction voltage VDS
to drop down. This drop is usually accompained by
some amount of ringing, that can trigger the input
comparator to turn off; hence, a Minimum On Time
(MOT) blanking period is used that will maintain the
power MOSFET on for a minimum amount of time.
The programmed MOT will limit also the minimum duty
VGate
VTH1
VTH2 VTH3
VDS
Input comparator thresholds
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IPRIM
ISEC
VSEC
VPRIM
time
time
T1 T2 T3
cycle of the SR MOSFET and, as a consequence, the
max duty cycle of the primary side switch.
DCM/CrCM Turn-off phase
Once the SR MOSFET has been turned on, it will
remain on until the rectified current will decay to the
level where VDS will cross the turn-off threshold VTH1.
This will happen differently depending on the mode
of operation.
In DCM the current will cross the threshold with a
relatively low dI/dt. Once the threshold is crossed, the
current will start flowing again through the body diode,
causing the VDS voltage to jump negative. Depending
on the amount of residual current, V
DS may trigger
once again the turn on threshold: for this reason VTH2
IPRIM
ISEC
VSEC
VPRIM
time
time
T1 T2
Primary and secondary currents and
voltages for DCM mode
Primary and secondary currents and
voltages for CrCM mode
is blanked for a certain amount of time (TBLANK) after
VTH1 has been triggered.
The blanking time is internally set. As soon as V
DS
crosses the positive threshold VTH3 also the blanking
time is terminated and the IC is ready for next
conduction cycle.
CCM Turn-off phase
In CCM mode the turn off transition is much steeper
and dI/dt involved is much higher. The turn on phase
is identical to DCM or CrCM and therefore won’t be
repeated here.
During the SR FET conduction phase the current will
decay linearly, and so will VDS on the SR FET.
I PRIM
ISEC
VSEC
VPRIM
time
time
T1 T2
Primary and secondary currents and
voltages for CCM mode
Once the primary switch will start to turn back on, the
SR FET current will rapidly decrease crossing V
TH1
and turning the gate off.
The turn off speed is critical to avoid cross conduction
on the primary side and reduce switching losses.
also in this case a blanking period will be applied, but
given the very fast nature of this transition, it will be
reset as soon as VDS crosses VTH3.
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Fig 2. Under Voltage Lockout
vs. Temp.
Fig 1. Supply Current vs. Supply Voltage
Fig 3. VTH1 vs. Temp. Fig 4. VTH2 vs. Temp.
-50 0 50 100 150
Temperature ( °C )
8
9
10
11
VCC UVLO Threshold (V)
VCC ON
VCC UVLO
510 15 20
Supply Voltage (V)
0.01
0.1
1
10
ISupply (mA)
-50 0 50 100 150
Temperature ( °C )
-30
-25
-20
-15
-10
-5
0
VTH1 Threshold (mV)
OVT = GND
OVT = Floating
OVT = VCC
-50 0 50 100 150
Temperature ( °C )
-150
-100
-50
0
VTH2 Threshold (mV)
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IR1167AS/BS
Fig 6. VTH1 vs. Temp. and Common
Mode (OVT=GND)
Fig 5. Comparator Hysteresis vs.
Temp.
Fig 7. VTH2 vs. Temp. and Common
Mode (OVT=GND)
Fig 8. Comparator Hysteresis vs. Temp. and
Common Mode (OVT=GND)
-50 0 50 100 150
Temperature ( °C )
0
50
100
Comparator Hysteresis VHYST (mV)
-50 0 50 100 150
Temperature ( °C )
-9
-6
-3
0
VTH1 Threshold (mV)
VS = -150mV
VS= 0V
VS= +2V
-50 0 50 100 150
Temperature ( °C )
-150
-100
-50
VTH2 Threshold (mV)
VS = -150mV
VS= 0V
VS= +2V
-50 0 50 100 150
Temperature ( °C )
-150
-100
-50
Comparator Hysteresis (mV)
VS = -150mV
VS= 0V
VS= +2V
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Fig 11. Max. VCC Voltage vs. Synchronous Rectifier
Switching Freq, TJ=125 C, TIC = 85 C, external RG=1W,
1W HEXFET Gate Resistance included
Fig 9. MOT vs. Temp.
Fig 12. Max. VCC Voltage vs. Synchronous Rectifier
Switching Freq, TJ=125 C, TIC = 85 C, external RG=2W,
1W HEXFET Gate Resistance included
050 100 150 200
Drain Sense Voltage (V D) (V)
0
20
40
60
80
100
Input Bias Current (IBIAS2) (µA)
TJ= -25°C
TJ= 25°C
TJ= 125°C
Fig 10. Input Bias Current vs. VD.
50 100 150 200 250 300 350 400 450 500
Max. Synchronous HEXFET Switching Frequency (kHz)
11
12
13
14
15
16
17
18
19
20
Maximum Allowable VCC Voltage (V)
Csync = 2nF
Csync = 5nF
Csync = 8nF
Csync = 15nF
Csync = 20nF
50 100 150 200 250 300 350 400 450 500
Max. Synchronous HEXFET Switching Frequency (kHz)
11
12
13
14
15
16
17
18
19
20
Maximum Allowable VCC Voltage (V)
Csync = 2nF
Csync = 5nF
Csync = 8nF
Csync = 15nF
Csync = 20nF
-50 0 50 100 150
Temperature ( °C )
0
1
2
3
4
Minimum On Time (µs)
RMOT = 5k
RMOT= 75k
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IR1167AS/BS
Fig 13. Max. VCC Voltage vs. Synchronous Rectifier
Switching Freq, TJ=125 C, TIC = 85 C, external RG=4W,
1W HEXFET Gate Resistance included
Fig 14. Max VCC Voltage vs. Synchronous Rectifier
Switching Freq, TJ=125 C, TIC = 85 C, external RG=6W,
1W HEXFET Gate Resistance included
Figures 11-14 shows the maximum allowable VCC voltage vs. maximum switching frequency for
different loads which are calculated using the design methodology discussed in AN1087.
50 100 150 200 250 300 350 400 450 500
Max. Synchronous HEXFET Switching Frequency (kHz)
11
12
13
14
15
16
17
18
19
20
Maximum Allowable VCC Voltage (V)
Csync = 2nF
Csync = 5nF
Csync = 8nF
Csync = 15nF
Csync = 20nF
50 100 150 200 250 300 350 400 450 500
Maximum Synchronous HEXFET Switching Frequency (kHz)
11
12
13
14
15
16
17
18
19
20
Maximum Allowable VCC Voltage (V)
Csync = 2nF
Csync = 5nF
Csync = 8nF
Csync = 15nF
Csync = 20nF
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IR1167AS/BS
Case outline
01-6027
01-0021 11 (MS-012AA)
8-Lead SOIC
8 7
5
6 5
D B
E
A
e
6X
H
0.25 [.010] A
6
431 2
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
NOTES:
1. DIMENSIONING & TOLERANCING PER ASME Y14.5M-1994.
2. CONTROLLING DIMENSION: MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETERS [INCHES].
7
K x 45°
8X L 8X c
y
FOOTPRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050] 8X 1.78 [.070]
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
6 DIMENSION DOES NOT INCLUDE MOLD PROTRUSIONS.
MOLD PROTRUSIONS NOT TO EXCEED 0.25 [.010].
7 DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO
A SUBSTRATE.
MOLD PROTRUSIONS NOT TO EXCEED 0.15 [.006].
0.25 [.010] CAB
e1
A
A1
8X b
C
0.10 [.004]
e1
D
E
y
b
A
A1
H
K
L
.189
.1497
0°
.013
.050 BASIC
.0532
.0040
.2284
.0099
.016
.1968
.1574
8°
.020
.0688
.0098
.2440
.0196
.050
4.80
3.80
0.33
1.35
0.10
5.80
0.25
0.40
0°
1.27 BASIC
5.00
4.00
0.51
1.75
0.25
6.20
0.50
1.27
MIN MAX
MILLIMETERSINCHES
MIN MAX
DIM
8°
e
c.0075 .0098 0.19 0.25
.025 BASIC 0.635 BASIC
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
FEED DIRECTION
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Tape and Reel Information (SOIC 8-Lead only)
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Part Marking Information
Order Information
The SOIC-8 is MSL2 qualified
This product has been designed and qualified for the Industrial market.
Data and specifications subject to change without notice.
Qualification Standards can be found at www.irf.com
WORLD HEADQUARTERS: 233 Kansas Street, El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 1/2009
8-Lead SOIC IR1167ASPbF
8-Lead SOIC IR1167BSPbF
8-Lead SOIC Tape and Reel IR1167ASTRPbF
8-Lead SOIC Tape and Reel IR1167BSTRPbF
IR1167A
