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ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FNA23060 600 V Motion SPM(R) 2 Series Features General Description * UL Certified No. E209204 (UL1557) The FNA23060 is a Motion SPM(R) 2 module providing a fully-featured, high-performance inverter output stage for AC induction, BLDC, and PMSM motors. These modules integrate optimized gate drive of the built-in IGBTs to minimize EMI and losses, while also providing multiple on-module protection features: under-voltage lockouts, over-current shutdown, temperature sensing, and fault reporting. The built-in, high-speed HVIC requires only a single supply voltage and translates the incoming logiclevel gate inputs to high-voltage, high-current drive signals to properly drive the module's internal IGBTs. Separate negative IGBT terminals are available for each phase to support the widest variety of control algorithms. * 600 V - 30 A 3-Phase IGBT Inverter, Including Control ICs for Gate Drive and Protections * Low-Loss, Short-Circuit-Rated IGBTs * Very Low Thermal Resistance Using Al2O3 DBC Substrate * Built-In Bootstrap Diodes and Dedicated Vs Pins Simplify PCB Layout * Separate Open-Emitter Pins from Low-Side IGBTs for Three-Phase Current Sensing * Single-Grounded Power Supply Supported * Built-In NTC Thermistor for Temperature Monitoring and Management * Adjustable Over-Current Protection via Integrated Sense-IGBTs * Isolation Rating of 2500 Vrms / 1 min. Applications * Motion Control - Industrial Motor (AC 200 V Class) Related Resources * AN-9121 - Users Guide for 600V SPM(R) 2 Series * AN-9076 - Mounting Guide for New SPM(R) 2 Package * AN-9079 - Thermal Performance of Motion SPM(R) 2 Series by Mounting Torque Figure 1. 3D Package Drawing (Click to Activate 3D Content) Package Marking and Ordering Information Device Device Marking Package Packing Type Quantity FNA23060 FNA23060 SPMCA-A34 Rail 6 (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 1 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series August 2015 FNA23060 600 V Motion SPM(R) 2 Series Intergrated Power Functions * 600 V - 30 A IGBT inverter for three-phase DC / AC power conversion (refer to Figure 3) Intergrated Drive, Protection, and System Control Functions * For inverter high-side IGBTs: gate-drive circuit, high-voltage isolated high-speed level-shifting control circuit, Under-Voltage Lock-Out Protection (UVLO), Available bootstrap circuit example is given in Figures 5 and 15. * For inverter low-side IGBTs: gate-drive circuit, Short-Circuit Protection (SCP) control circuit, Under-Voltage Lock-Out Protection (UVLO) * Fault signaling: corresponding to UV (low-side supply) and SC faults * Input interface: active-HIGH interface, works with 3.3 / 5 V logic, Schmitt-trigger input Pin Configuration (34) VS(W) (33) VB(W) (32) VBD(W) (31) VCC(WH) (30) IN(WH) (1) P (29) VS(V) (28) VB(V) (2) W (27) VBD(V) (26) VCC(VH) (25) IN(VH) (24) VS(U) (23) VB(U) (3) V Case Temperature (TC) Detecting Point (22) VBD(U) (21) VCC(UH) (20) COM(H) (19) IN(UH) (4) U (18) RSC (5) N W (17) CSC (6) N V (16) CFOD (15) VFO (14) IN(WL) (13) IN(VL) (12) IN(UL) (11) COM(L) (10) VCC(L) (7) NU (8) R TH (9) VTH Figure 2. Top View (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 2 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Pin Descriptions Pin Number Pin Name Pin Description 1 P 2 W Output for W Phase 3 V Output for V Phase 4 U Output for U Phase 5 NW Negative DC-Link Input for W Phase 6 NV Negative DC-Link Input for V Phase 7 NU Negative DC-Link Input for U Phase 8 RTH Series Resistor for Thermistor (Temperature Detection) 9 VTH Thermistor Bias Voltage Positive DC-Link Input 10 VCC(L) Low-Side Bias Voltage for IC and IGBTs Driving 11 COM(L) Low-Side Common Supply Ground 12 IN(UL) Signal Input for Low-Side U Phase 13 IN(VL) Signal Input for Low-Side V Phase 14 IN(WL) Signal Input for Low-Side W Phase 15 VFO 16 CFOD Capacitor for Fault Output Duration Selection 17 CSC Capacitor (Low-Pass Filter) for Short-Circuit Current Detection Input 18 RSC Resistor for Short-Circuit Current Detection 19 IN(UH) Signal Input for High-Side U Phase 20 COM(H) High-Side Common Supply Ground 21 VCC(UH) High-Side Bias Voltage for U Phase IC 22 VBD(U) Anode of Bootstrap Diode for U Phase High-Side Bootstrap Circuit 23 VB(U) High-Side Bias Voltage for U Phase IGBT Driving Fault Output 24 VS(U) High-Side Bias Voltage Ground for U Phase IGBT Driving 25 IN(VH) Signal Input for High-Side V Phase 26 VCC(VH) 27 VBD(V) Anode of Bootstrap Diode for V Phase High-Side Bootstrap Circuit 28 VB(V) High-Side Bias Voltage for V Phase IGBT Driving 29 VS(V) High-Side Bias Voltage Ground for V Phase IGBT Driving 30 IN(WH) Signal Input for High-Side W Phase 31 VCC(WH) 32 VBD(W) Anode of Bootstrap Diode for W Phase High-Side Bootstrap Circuit 33 VB(W) High-Side Bias Voltage for W Phase IGBT Driving 34 VS(W) High-Side Bias Voltage Ground for W Phase IGBT Driving (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 High-Side Bias Voltage for V Phase IC High-Side Bias Voltage for W Phase IC 3 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Internal Equivalent Circuit and Input/Output Pins Figure 3. Internal Block Diagram Notes: 1. Inverter high-side is composed of three normal-IGBTs, freewheeling diodes, and one control IC for each IGBT. 2. Inverter low-side is composed of three sense-IGBTs, freewheeling diodes, and one control IC for each IGBT. It has gate drive and protection functions. 3. Inverter power side is composed of four inverter DC-link input terminals and three inverter output terminals. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 4 www.fairchildsemi.com unless otherwise specified.) Inverter Part Symbol VPN VPN(Surge) VCES Parameter Conditions Supply Voltage Applied between P - NU, NV, NW Supply Voltage (Surge) Applied between P - NU, NV, NW Rating Unit 450 V Collector - Emitter Voltage 500 V 600 V IC Each IGBT Collector Current TC = 25C, TJ 150C (Note 4) 30 A ICP Each IGBT Collector Current (Peak) TC = 25C, TJ 150C, Under 1 ms Pulse Width (Note 4) 60 A PC Collector Dissipation TC = 25C per One Chip (Note 4) 121 W TJ Operating Junction Temperature -40 ~ 150 C Rating Unit Control Part Symbol Parameter Conditions VCC Control Supply Voltage Applied between VCC(H), VCC(L) - COM 20 V VBS High-Side Control Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) 20 V VIN Input Signal Voltage Applied between IN(UH), IN(VH), IN(WH), IN(UL), IN(VL), IN(WL) - COM -0.3 ~ VCC+0.3 V VFO Fault Output Supply Voltage Applied between VFO - COM -0.3 ~ VCC+0.3 V IFO Fault Output Current Sink Current at VFO pin VSC Current Sensing Input Voltage Applied between CSC - COM 2 mA -0.3 ~ VCC+0.3 V Rating Unit 600 V Bootstrap Diode Part Symbol VRRM Parameter Conditions Maximum Repetitive Reverse Voltage IF Forward Current TC = 25C, TJ 150C (Note 4) 1.0 A IFP Forward Current (Peak) TC = 25C, TJ 150C, Under 1 ms Pulse Width (Note 4) 2.0 A TJ Operating Junction Temperature -40 ~ 150 C Conditions Rating Unit 400 V -40 ~ 125 C Total System Symbol Parameter VPN(PROT) Self-Protection Supply Voltage Limit (Short-Circuit Protection Capability) VCC = VBS = 13.5 ~ 16.5 V, TJ = 150C, VCES < 600 V, Non-Repetitive, < 2 s TC Module Case Operation Temperature See Figure 2 TSTG Storage Temperature VISO Isolation Voltage -40 ~ 125 C 2500 Vrms 60 Hz, Sinusoidal, AC 1 Minute, Connection Pins to Heat Sink Plate Thermal Resistance Symbol Rth(j-c)Q Rth(j-c)F Parameter Junction-to-Case Thermal Resistance (Note 5) Conditions Min. Typ. Max. Unit Inverter IGBT Part (per 1 / 6 Module) - - 1.03 C / W Inverter FWD Part (per 1 / 6 Module) - - 1.64 C / W Notes: 4. These values had been made an acquisition by the calculation considered to design factor. 5. For the measurement point of case temperature (TC), please refer to Figure 2. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 5 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Absolute Maximum Ratings (TJ = 25C, Inverter Part Symbol VCE(SAT) VF HS tON Parameter Conditions Min. Typ. Max. Unit Collector - Emitter Saturation VCC = VBS = 15 V Voltage VIN = 5 V IC = 30 A, TJ = 25C - 1.50 2.10 V FWDi Forward Voltage VIN = 0 V IF = 30 A, TJ = 25C - 1.80 2.40 V Switching Times VPN = 300 V, VCC = 15 V, IC = 30 A TJ = 25C VIN = 0 V 5 V, Inductive Load See Figure 5 (Note 6) 0.80 1.30 1.90 s - 0.35 0.75 s - 1.05 1.65 s - 0.15 0.55 s - 0.20 - s VPN = 300 V, VCC = 15 V, IC = 30 A TJ = 25C VIN = 0 V 5 V, Inductive Load See Figure 5 (Note 6) 0.60 1.10 1.70 s - 0.30 0.70 s - 1.15 1.75 s - 0.15 0.55 s - 0.20 - s - - 5 mA tC(ON) tOFF tC(OFF) trr LS tON tC(ON) tOFF tC(OFF) trr ICES Collector - Emitter Leakage VCE = VCES Current Note: 6. tON and tOFF include the propagation delay of the internal drive IC. tC(ON) and tC(OFF) are the switching times of IGBT under the given gate-driving condition internally. For the detailed information, please see Figure 4. 100% I C 100% I C t rr V CE IC IC V CE V IN V IN t ON t OFF t C(ON) t C(OFF) 10% I C V IN(ON) 90% I C V IN(OFF) 10% V CE 10% V CE 10% I C (b) turn-off (a) turn-on Figure 4. Switching Time Definition (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 6 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Electrical Characteristics (TJ = 25C, unless otherwise specified.) IC P CBS VB VC C LS Switching OUT COM VS IN HS Switching LS Switching 5V 0V VP N U,V,W V IN VCC 4.7 k 300V HS Switching OUT CSC V COM 15 V V Inductor IN VC C VFO CFOD NU,V,W V RSC 5V Figure 5. Example Circuit for Switching Test Figure 6. Switching Loss Characteristics (Typical) R-T Curve 600 550 R-T Curve in 50 ~ 125 20 500 16 Resistance[k] Resistance[k] 450 400 350 300 250 200 12 8 4 0 50 60 70 80 90 100 110 120 Temperature [ ] 150 100 50 0 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 120 Temperature TTH[ ] Figure 7. R-T Curve of Built-in Thermistor (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 7 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series One-Leg Diagram of SPM 2 RBS Symbol Parameter Conditions Min. Typ. Max. Unit VF Forward Voltage IF = 1.0 A, TJ = 25C - 2.2 - V trr Reverse-Recovery Time IF = 1.0 A, dIF / dt = 50 A / s, TJ = 25C - 80 - ns Min. Typ. Max. Unit Control Part Symbol Parameter Conditions VCC(UH,VH,WH) = 15 V, IN(UH,VH,WH) = 0 V VCC(UH) - COM(H), VCC(VH) - COM(H), VCC(WH) - COM(H) - - 0.15 mA IQCCL VCC(L) = 15 V, IN(UL,VL, WL) = 0 V VCC(L) - COM(L) - - 5.00 mA IPCCH VCC(UH,VH,WH) = 15 V, fPWM = 20 VCC(UH) - COM(H), kHz, Duty = 50%, Applied to one VCC(VH) - COM(H), PWM Signal Input for High-Side VCC(WH) - COM(H) - - 0.30 mA VCC(L) = 15V, fPWM = 20 kHz, Duty = VCC(L) - COM(L) 50%, Applied to one PWM Signal Input for Low-Side - - 9.00 mA IQCCH Quiescent VCC Supply Current IPCCL Operating VCC Supply Current IQBS Quiescent VBS Supply Current VBS = 15 V, IN(UH, VH, WH) = 0 V VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) - - 0.30 mA IPBS Operating VBS Supply Current VCC = VBS = 15 V, fPWM = 20 kHz, VB(U) - VS(U), Duty = 50%, Applied to one PWM VB(V) - VS(V), Signal Input for High-Side VB(W) - VS(W) - - 6.50 mA VFOH Fault Output Voltage VCC = 15 V, VSC = 0 V, VFO Circuit: 4.7 k to 5 V Pull-up 4.5 - - V VCC = 15 V, VSC = 1 V, VFO Circuit: 4.7 k to 5 V Pull-up - - 0.5 V - 19 - mA 0.43 0.50 0.57 V - 60 - A 10.3 - 12.8 V 10.8 - 13.3 V VFOL ISEN VSC(ref) ISC UVCCD Sensing Current Each Sense IGBT of VCC = 15 V, VIN = 5 V, RSC = 0 No IC = 30 A Connection of Shunt Resistor at NU,V,W Terminal Short Circuit Trip Level VCC = 15 V (Note 7) CSC - COM(L) Short Circuit Current RSC = 20 ( 1%) No Connection of Shunt Resistor at Level for Trip NU,V,W Terminal (Note 7) UVCCR Supply Circuit Under- Detection Level Voltage Protection Reset Level UVBSD Detection Level 9.5 - 12.0 V UVBSR Reset Level 10.0 - 12.5 V tFOD Fault-Out Pulse Width CFOD = Open (Note 8) CFOD = 2.2 nF VIN(ON) ON Threshold Voltage VIN(OFF) OFF Threshold Voltage RTH Resistance of Thermistor Applied between IN(UH, VH, WH) - COM(H), IN(UL, VL, COM(L) at TTH = 25C WL) See Figure 7 (Note 9) at TTH = 100C - 50 - - s 1.7 - - ms - - 2.6 V 0.8 - - V - 47 - k - 2.9 - k Notes: 7. Short-circuit current protection functions only at the low-sides because the sense current is divided from main current at low-side IGBTs. Inserting the shunt resistor for monitoring the phase current at NU, NV, NW terminal, the trip level of the short-circuit current is changed. 8. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : tFOD = 0.8 x 106 x CFOD [s]. 9. TTH is the temperature of thermistor itself. To know case temperature (TC), conduct experiments considering the application. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 8 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Bootstrap Diode Part Symbol Parameter Value Conditions Unit Min. Typ. Max. - 300 400 V VPN Supply Voltage Applied between P - NU, NV, NW VCC Control Supply Voltage Applied between VCC(UH, COM(L) - COM(H), VCC(L) - 14.5 15.0 16.5 V VBS High-Side Bias Voltage Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W) 13.5 15.0 18.5 V -1 - 1 V / s 1.5 - - s - 20 kHz 5 V - s VH, WH) dVCC / dt, Control Supply Variation dVBS / dt tdead Blanking Time for Preventing Arm - Short fPWM PWM Input Signal -40C TC 125C, -40C TJ 150C - VSEN Voltage for Current Sensing Applied between NU, NV, NW - COM(H, L) (Including Surge Voltage) -5 VCC = VBS = 15 V, IC 60 A, Wiring Inductance between NU, V, W and DC Link N < 10nH (Note 10) 2.0 PWIN(ON) Minimun Input Pulse Width PWIN(OFF) TJ For Each Input Signal Junction Temperature - 2.0 - - -40 - 150 C Note: 10. This product might not make right output response if input pulse width is less than the recommanded value. Figure 8. Allowable Maximum Output Current Note: 11. This allowable output current value is the reference data for the safe operation of this product. This may be different from the actual application and operating condition. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 9 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Recommended Operating Conditions Parameter Conditions Min. Typ. Max. Unit 0 - +200 m Device Flatness See Figure 9 Mounting Torque Mounting Screw: M4 Recommended 1.0 N * m 0.9 1.0 1.5 N*m See Figure 10 Recommended 10.1 kg * cm 9.1 10.1 15.1 kg * cm Terminal Pulling Strength Load 19.6 N 10 - - s Terminal Bending Strength Load 9.8 N, 90 degrees Bend 2 - - times - 50 - g Weight () () Figure 9. Flatness Measurement Position 2 Pre - Screwing : 1 2 Final Screwing : 2 1 1 Figure 10. Mounting Screws Torque Order Notes: 12. Do not over torque when mounting screws. Too much mounting torque may cause DBC cracks, as well as bolts and Al heat-sink destruction. 13. Avoid one-sided tightening stress. Figure 10 shows the recommended torque order for the mounting screws. Uneven mounting can cause the DBC substrate of package to be damaged. The pre-screwing torque is set to 20 ~ 30% of maximum torque rating. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 10 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series Mechanical Characteristics and Ratings FNA23060 600 V Motion SPM(R) 2 Series Time Charts of SPMs Protective Function Input Signal Protection Circuit State RESET SET RESET UVCCR a1 Control Supply Voltage a6 UVCCD a3 a2 a7 a4 Output Current a5 Fault Output Signal Figure 11. Under-Voltage Protection (Low-Side) a1 : Control supply voltage rises: after the voltage rises UVCCR, the circuits start to operate when the next input is applied. a2 : Normal operation: IGBT ON and carrying current. a3 : Under-voltage detection (UVCCD). a4 : IGBT OFF in spite of control input condition. a5 : Fault output operation starts with a fixed pulse width according to the condition of the external capacitor CFOD. a6 : Under-voltage reset (UVCCR). a7 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. Input Signal Protection Circuit State RESET SET RESET UVBSR Control Supply Voltage b5 b1 UVBSD b3 b6 b2 b4 Output Current High-level (no fault output) Fault Output Signal Figure 12. Under-Voltage Protection (High-Side) b1 : Control supply voltage rises: after the voltage reaches UVBSR, the circuits start to operate when the next input is applied. b2 : Normal operation: IGBT ON and carrying current. b3 : Under-voltage detection (UVBSD). b4 : IGBT OFF in spite of control input condition, but there is no fault output signal. b5 : Under-voltage reset (UVBSR). b6 : Normal operation: IGBT ON and carrying current by triggering next signal from LOW to HIGH. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 11 www.fairchildsemi.com c6 Protection Circuit state SET Internal IGBT Gate-Emitter Voltage FNA23060 600 V Motion SPM(R) 2 Series Lower Arms Control Input c7 RESET c4 c3 c2 Internal delay at protection circuit SC current trip level c8 c1 Output Current SC reference voltage Sensing Voltage of Sense Resistor RC filter circuit Fault Output Signal c5 time constant delay Figure 13. Short-Circuit Current Protection (Low-Side Operation only) (with the external sense resistance and RC filter connection) c1 : Normal operation: IGBT ON and carrying current. c2 : Short-circuit current detection (SC trigger). c3 : All low-side IGBTs gate are hard interrupted. c4 : All low-side IGBTs turn OFF. c5 : Fault output operation starts with a fixed pulse width according to the condition of the external capacitor CFOD. c6 : Input HIGH: IGBT ON state, but during the active period of fault output, the IGBT doesn't turn ON. c7 : Fault output operation finishes, but IGBT doesn't turn on until triggering the next signal from LOW to HIGH. c8 : Normal operation: IGBT ON and carrying current. Input/Output Interface Circuit +5V (MCU or control power) SPM 4.7 k IN(UH) , IN (VH) , IN(WH) IN (UL) , IN (VL) , IN(WL) MCU VFO COM Figure 14. Recommended MCU I/O Interface Circuit Note: 14. RC coupling at each input might change depending on the PWM control scheme used in the application and the wiring impedance of the application's printed circuit board. The input signal section of the Motion SPM 2 product integrates 5 k(typ.) pull-down resistor. Therefore, when using an external filtering resistor, please pay attention to the signal voltage drop at input terminal. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 12 www.fairchildsemi.com (30) IN(WH) (31) VCC(WH ) Gating WH C4 R2 (33) VB( W) VB R1 (25) IN(VH ) Gating VH (26) VC C (VH ) C4 R2 (27) V BD (V ) (28) VB(V ) C3 (19) IN(U H) (21) VCC(U H ) (20) COM(H ) (22) VBD(U ) Gating UH C4 R2 C1 C1 C1 (23) VB (U ) C3 OUT VS IN VC C COM HVIC W (2) OUT VS VB V (3) (29) VS(V) C4 R1 M C U HVIC (34) VS ( W) C4 C3 (32) V BD (W) IN VCC COM C7 IN VCC COM HVIC VDC OUT VB VS U (4) (24) VS( U) C4 M 5V line R3 R1 C5 Fault C1 Gating WL Gating VL (16) C FOD (15) V FO C1 R1 (14) IN(WL ) R1 (13) IN(VL) R1 (12) IN(U L) Gating UL 15V line (10) VC C (L) C1 C1 C1 C2 5V line C4 (11) COM(L ) OUT CFOD NW (5) VFO IN LVIC IN OUT IN NV (6) R4 E Shunt Resistor VC C COM Power GND Line OUT (9) VTH CSC (8) RTH Temp. Monitoring A R4 NU (7) Thermistor RSC (18) R7 (17) CSC R4 R5 Sense Resistor D C6 R6 B C W-Phase Current V-Phase Current U-Phase Current Control GND Line Figure 15. Typical Application Circuit Notes: 15. To avoid malfunction, the wiring of each input should be as short as possible (less than 2 - 3 cm). 16. VFO output is an open-drain type. This signal line should be pulled up to the positive side of the MCU or control power supply with a resistor that makes IFO up to 2 mA. Please refer to Figure 14. 17. Fault out pulse width can be adjust by capacitor C5 connected to the CFOD terminal. 18. Input signal is active-HIGH type. There is a 5 k resistor inside the IC to pull-down each input signal line to GND. RC coupling circuits should be adopted for the prevention of input signal oscillation. R1C1 time constant should be selected in the range 50 ~ 150 ns (recommended R1 = 100 , C1 = 1 nF). 19. Each wiring pattern inductance of point A should be minimized (recommend less than 10 nH). Use the shunt resistor R4 of surface mounted (SMD) type to reduce wiring inductance. To prevent malfunction, wiring of point E should be connected to the terminal of the shunt resistor R4 as close as possible. 20. To insert the shunt resistor to measure each phase current at NU, NV, NW terminal, it makes to change the trip level ISC about the short-ciruit current. 21. To prevent errors of the protection function, the wiring of points B, C, and D should be as short as possible. The wiring of B between CSC filter and RSC terminal should be divided at the point that is close to the terminal of sense resistor R5. 22. For stable protection function, use the sense resistor R5 with resistance variation within 1% and low inductance value. 23. In the short-circuit protection circuit, select the R6C6 time constant in the range 1.0 ~ 1.5 s. R6 should be selected with a minimum of 10 times larger resistance than sense resistor R5. Do enough evaluaiton on the real system because short-circuit protection time may vary wiring pattern layout and value of the R6C6 time constant. 24. Each capacitor should be mounted as close to the pins of the Motion SPM(R) 2 product as possible. 25. To prevent surge destruction, the wiring between the smoothing capacitor C7 and the P & GND pins should be as short as possible. The use of a high-frequency non-inductive capacitor of around 0.1 ~ 0.22 F between the P & GND pins is recommended. 26. Relays are used in most systems of electrical equipments in industrial application. In these cases, there should be sufficient distance between the MCU and the relays. 27. The Zener diode or transient voltage suppressor should be adapted for the protection of ICs from the surge destruction between each pair of control supply terminals (recommanded Zener diode is 22 V / 1 W, which has the lower Zener impedance characteristic than about 15 ). 28. C2 of around seven times larger than bootstrap capacitor C3 is recommended. 29. Please choose the electrolytic capacitor with good temperature characteristic in C3. Choose 0.1 ~ 0.2 F R-category ceramic capacitors with good temperature and frequency characteristics in C4. (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 13 www.fairchildsemi.com FNA23060 600 V Motion SPM(R) 2 Series P (1) R1 FNA23060 600 V Motion SPM(R) 2 Series Detailed Package Outline Drawings (FNA23060) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide therm and conditions, specifically the the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/MO/MOD34BA.pdf (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 14 www.fairchildsemi.com (c)2015 Fairchild Semiconductor Corporation FNA23060 Rev. 1.0 15 www.fairchildsemi.com ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor's product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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