: ky SGS-THOMSON MICROELECTRONICS UAA4002 CONTROL CIRCUIT FOR FAST SWITCHING TRANSISTORS s DIRECT DRIVE OF THE SWITCHING TRANS- ISTOR SELF REGULATED POSITIVE BASE CUR- RENT (7 A max) NEGATIVE BASE CURRENT ENSURING FAST TURN-OFF (3 A max) THE OUTPUT CURRENT CAN BE INCREA- SED BY MEANS OF ONE (or more) EXTERNAL TRANSISTOR(S) MINIMUM CONDUCTING TIME (or no conduc- tion) TO ALLOW THE DISCHARGE OF A RDC NETWORK PROTECTION AGAINST SATURATION FAI- LURE OF THE POWER TRANSISTOR DURING CONDUCTING PERIOD, WITH ADJUSTABLE DETECTION THRESHOLD INSTANTANEOUS-COLLECTOR CURRENT LIMITATION POSITIVE SUPPLY (Vcc) MONITORING NEGATIVE SUPPLY MONITORING WITH AD- JUSTABLE THRESHOLD Figure 1: Block Diagram ON-CHIP THERMAL PROTECTION PROGRAMMABLE MAXIMUM ON TIME TTL AND GMOS COMPATIBLE INPUT CAN BE DRIVEN WITH ALTERNATE PULSES ADJUSTABLE DELAY BETWEEN THE RISING EDGE OF THE INPUT SIGNAL AND THE BE- GINNING OF THE POSITIVE BASE DRIVE DIP-16/2 ORDER CODE : UAA4O02DP lag : Output sink current vi . Negative power supply (power stage) Isard : Inhibition input BE : Input selection E + Input FR : Nagative supply monitoring time resistor Fi > Minimum conducting time resistor Ch : Minimum conducting time capacitor les : Output source current We : Positive power supply (power stage} Vee : Positive supply voltage Vee : Veersay) Sensing le ' Collector current monitoring Input Fiso : Vogisat) threshold voltage monitoring | Fg : Delay time resistor Guo : Ground | October 1968 677040820 S9INOY193 13049 INSUAA4002 ABSOLUTE MAXIMUM RATINGS apo eel ry Sighs ay es gt ie oe ee ee Bee ire aL Shel aL Meee eee aa ar WE | Symbol Parameter Value / Unit Vec Supply Voltage . +15 V P Positive Supply Voltage (power stage) #15 V y- Nagativa Supply Voliage (power stage) - 10 V vt -v- | Voltage between Ping 15 and 2 - +18 V lea Pasitive Output Current 41.5 A lsz2 | Negative Output Currant - 3.5 A | le Current into Input le {internal protection diodas) 5 mA iP _ Minimum Value of Resistors R; and Ro 5 ked fe - Voltage between Input and V~ +18 V : T; | Junction Temperature Range ~ 40 to + 150 c | Tatg Siorage Temperature Range 40 to + 750 Cc | Note: 1, Pin2 (-) should not be left open. eo ra ad b +1 wh a t i J 1 a] 4 PIN CONNECTION (top view) | lao : Output sink currant Cc ve : Negative power supply (power stage) Ip2 C 1 16 (J Ip INH > Inmibition input - ! 5 : Input selection - Vv" Te2 tsv* E input Inn O 3 14 1] Voc A: : Negative supply monitoring time resistor SE: y Fr ; Minimum conducting time resistor O 4 13 1) Vce G | Minimum conducting time capacitor EQs 121 Ic lp : Output souroa currant _ yr : Positive power supply (power stage) R q 6 11 [J Rsp Veo ; Positive supply voltage xX C7 10 [] Rp Vee + Vogjeay Sensing lo > Collector current monitoring input Cc 08 9 [J GND Aso | Vogisay thrashold voltage monitoring } Ay : Delay time resistor Guo : Ground THERMAL DATA y ] : ' A | ao | Fing-ay | Maximum Junetion-ambient Thermal Resistance 80 he | 2/12 {ayy SGS-THOMSGN Sf iaemosiectsontes = Lo 4 Ed Ue GN BrPOSECCO SOINOLIITIO#IINIS 10:1 POO 198 Fle UAA4002 ELECTRICAL CHARACTERISTICS Tamp = + 25 C, Vog = + 10 V, Vo =5 V (unless otherwise specified) [ Symbol Parameter Min Typ. Max. Unit a Vos Supply Voltage 7 - 14 ve | - Positive Supply Voltage Monitoring Threshold - 7 - V pe Supply Current = 12 = mA | yr Positive Supply Voltaga (power stage) By = 14 V NO. . | Negative Supply Voltage (power stage) -1 i =9 V Vy Threshold of Input Ic 0.160 0.2 0.240 V I; Currant into Input Ic = 5 20 pA Ri Value of Resistor R; (R, between pin 7 and ground) 10 47 200 Ko Ro Value of Resistor Ap (Rp between pin 10 and around) | 20 - 200 Kaa lay Positive Qutput Current (Viig) Virey = + 2 V) 0.5 - ~ A lsiipeaky) | Positive Output Current (peak value) 1 ~ - | A lpe Negative Output Current (V1) Viz) = + 4 V) a = - | A Vsp Comparator Vee Threshold Voltage 1 _ 56 V - High Level an Input E (Vig) Vo < + 18 V) 2 - Vec V | ces Low Level on Input E (input SE not connected) 1 a - 0.8 V Low Level on Input E (|V"| > 2.5 V, input SE tied to ground) yo ~ -2 Vv Current into Input E (Vis) = 0 V) Input SE Left Opan - 10 50 pA, Input SE Grounded - a2 0.3 mA Law Level on Input Ine 0 = 0.8 V - High Level on Input Inn 2 - Voc V tantmin] Time Constant ten min (Ry between pin 7 and ground) 0.06 Re (Kf2) us ty Delay between Input Pulse and Rise of Outout Curent (Ap 0,05 Rp (km) [1s between din 10 and ground) = Propagation between Input Pulse and Rise of Output Current 0.3 Ls Vso | Desaturation Threshold (Rego between pin 11 and ground) re Asp V Ry RT V- min Detection Resistor Value (R7 between pin and Vv") a (1 + Aone ) | on is] lonimax) Time Constant ty, max (C, between pin 8 and ground) Ry, 5 = Thermal Shut Down 150 a APPLICATION INFORMATION The coexistence of a power circuit handling high vol- tages and currents, and aconiroi circuit carrying low amplitude signals, does not represent any special difficulty provided that a few simple rules are obser- ved, Positive and negative supply voltages of the integra- ted circuit must be carefully filtered by means of ca- pacitors located very close to the device. The device itself must by situated close to the po- wer transistor, using short connections. The contro! circuit ground (pin 9) and the power cir- cuit ground (emitter of the power transistor) must be linked by a single connection, as short as possible and of adequate cross-section. A ground plane on the printed circuit board may.be favourable in noisy environments. With regards to upper switches of a bridge configuration, the auxi- liary supplies of the Integrated circuit must have a low parasitic capacitor with respect to ihe grouna potential. In the same way, the isolated components yz SSS:THOMSON Ze ? 0c aN ME 9060800 SI INO 109 TIOIIWLS 21 p00? 13S beUAA4002 driving the UAA4002 (optocoupler or pulse transfor- mer) must have also a low parasitic capacitor in or- der to reduce dv/t phenomenons and to avoid risks. of reswitching or conduction cut-off, lf a free-wheel diode is connected In parallel with the power transistor (witch is generally the case in bridge systems), a diode (1N4148) must be connec- ted between pin 13 and ground (cathode on pin 13 and anode on ground) in order to limit the negative voltage applied to this pin during the conduction of the free-whee! diode. CIRCUIT DESCRIPTION (see block diagram figure 1) INPUT INTERFACE E AND SE INPUT It translates the input signal into the logic levels re- quired by the internal processor. It also includes a RS flip-flop for the pulse mode ope- ration. FAULT DETECTORS Power transistor collector current limiting (Ic in- put) The collector current of the power transistor is mea- sured by means of a shunt connected in the nega- tive return of the power supply. As a result the cur- rent rather than the emitter current, since the base Figure 2 : Lavel Mode SE = 1. current of the switching does not flow through the shunt. A voltage below - 0.2 V on input Ic causes compa- rator to change state. This information is transmit- ted to the logic unit, which blocks the output pulses from the circuit uniil the next positive transition of the input signal. If the voltage across the measuring shunt exceeds 0.2 V for the required limiting current value, a volt- age divider bridge may be used (see application note NAQ31A). if input Io not used, it must be connected directly to ground. Output Alternate pulse SE=0 = A il input E ll Lh mT \| HH i a i 1 i | Output at * These parasitic pulses are nol laken into account, Note : Pulse duration > 100ns. ae G7 SGS-THOMSON = 7 siatmersersomes 820 GOE HN 6PH0S2920 SOINOYLI3 T3ON9IWLS LO5ZL 7002 198 v2 i5 dal win aad UAA4002 Figure 3 : Switching Transistor Collector Current Measurement. _ Protection against desaturation of the power transistor, A comparator monitors continuously during the conduction that the collector voltage on the swit- ching transistor remains lower than the preset va- lue. The preset value Vrsp (see figure 4) is given by ; Rep Aso= 5Vx2 Rt Current | set by external resistor Ri is : 5 (V) |(mA} = Fi (k) Figure 4 : Vcsat Voltage Monitoring. Without resistor Resp, the threshold is set internally at+ 5.6 V, In case of overstep, the information is transmitted to the logic unit, which turns the outout off until the next positive edge of the input signal. To enable the switching transistor collector emitter voltage to fall when conduction begins, the protec- tion function against desaturation Is disabled during ton min (see application note NAO031A). This protection is disabled by connecting pin Aso di- rectly to V. (FOR THRESHOLD EXCEEDING 5.5 V SEE NAO31EA), Diode D must be a high-speed diode able to withstand the transistor collector-emittar volatae whan the transistor Is elie 5 > t p Ha aa i__f Vee Pee, Sat Si2 57 SessTHoMsoN ~ 9 SOE 'N 6yH0SC820 SOINOYLDITIONIINIS 20:2) 7002 138 90"UAA4002 SUPPLY DEFECT a Negative supply (R input, see figure 4). lt is possible to disable the output pulses if the ne- gative supply valtage V is insufficient to guarantee the switching of the power transistor (optional). (FOR USING WITHOUT NEGATIVE POWER SUP- PLY SEE NAQ31A) For this a resistor R is tied between pin 6 and the negative supply. A current 2 | flows into it, and the threshold of the detector is +5 V on pin 6, Thus giving the relationship : 5 + Vmin 5 Ri V min a EEK R- =__ (1 + \ R= Ri 2 5 This function can be disabled ty tying pin 6 to ground. a Positive supply (Voc input) An internal comparator ensures that there is no aut- put voltage if positive supply Vcc Is less than +7 V. This threshold is not adjustable, a Inhibition (INH input) The action of the inhibition input is shown in the cia- gram below. This input is CMOS and TTL compatible. If not used, it must bs connected directly to ground. a Thermal protection The UAA4002 is protected against excessive over- heating by a thermal cutout which automatically cuts off the output pulses ifihe chip temperature ex- ceeds + 150 C. The interruption is stored for acom- plete conduction period, but the output pulses reap- pear as soon as the chip temperature falls below the limiting temperature value. TIME GONSTANTS Minimum conducting time (Rt input) To enable the capacitor of the switching aid network associated with power transistor to discharge com- pletely, the logic processor ensures that the integra- ted circuit output pulse has a minimum duration ton min. To be effective, this must be at least four times the time constant of the RDC network. The value of ton min is programmed by a resistor R; Typically ton min (8) = 0.06 x Ay (k) The usable range of values for ton min is between 4 and 12s. Resistor Ri has 4 key role in the operation of the UAA4002 integrated circuit. ft sets the value of a bias current intemal to the circuit : 5 Ay (k) ten Min embodies a priority function : no other secu- rity function can stop the conduction during ton min. The ton min function cannot be disabled. n Maximum conducting time (Ri and Ct inputs) At the start of each conduction period the capacitor Cis loaded by a constant current 1/2, where | is the current through resistor Rr (1 = 5/R:). When the volt- age across C reaches + 5 V the conduction is stop- ped. The value of ton max is thus given by the equa- tion : ton Max (S) = 2 x Re (k) x Ce (NF) lf the ton max function is not to be used, it is only ne- cessary to replace capacitor C: with a short-circuit, a lime delay function Aconstanttime delay may be implemented between the rising edge of the control pulse and the begin- | (mA) = Figure 5, | input sa ee ee eee | | | | | inhibition tI Ey ~~ ~ | 4 |_| | \ i | i | ] t Output == 72 =, On OFF ON Gite kay SGS: THOMSON Tf iaenoruestseatce 892 rape , . Lo SOE YN 6pPNSE8C0 SOINOYLOSTIONSIWIS OGL F002 (138 Fe - part fabs , = a hey pce Leen te BA ra aT ee ee eT hr Ay Fic aE ITE Spa roe of nies ee og hasoat dete | ee a ee ee ee ee UAA4002 ning of the conduction pulse at the circuit outout = (1 to 20 ys by using resistor Ro, td (us) = 0.05 Rp (KQ). LOGIC PROCESSOR A logic unit processes the information coming from the fault detectors, and ensures that the output si- gnai fulfils two conditions : Figure 6. | | Output eet cee lj | | et | , Figure 7. a No double pulsing within a period : the occurence of a defect is memorized until the end of the pe- riod. w 70 allow the discharge of a snubber network, the minimum output pulse width is set at a given va- IU ton min, OUTPUT STAGE : V*, V-, le;, Igs, INPUTS a Introduction The highly sophisticated output stage of the UAA4002 offers high performance is terms of swit- ching transistor contral. lis principal features are as fallows : . the switching transistor is direct driven - the transistor remains in a quasi-saturated state, whence reduced storage time - control power is limited to the strict minimum - itis easy to use This stage is in fact in two parts, a positive criver stage which turns on the transistor and a negative driver siage which turns off the transistor. oS ea a a LOAD fFo High | woltage I mupypaly | kaya SGS-THOMSON 8d SOE UN My 4052801 SOINOULOTTIOVOIWLS: Ti2UAA4002 Power transistor conduction The maximum value of the positive base current Is determined by the limitation resistor Ai (ley 1A). A regulation loop is used to keep Tp in a quasi-satura- tian made : the more Tp becomes saturated, the more diode D willshuntanimportantpartofthedrive . current lp1, through diode Dy. Ra is a low value re- sistor (about 1 ) which helps to stabilize the regula- tion loop. Voltage Vce across transistor Qis : Vee (V) = Vee (V) + Ra () a1 (A) lf the required drive current is greater than 0.5 A, one external NPN transistor may be added. In this case : Vee (V) = 2 Vee (V) + Re ().1B (A) a Turn-off switching of power transistors The closing of contact Ka (figure 10) causes Darling- ton T2 to conduct. The negative supply voltage is applied to the base of transistor Tp and a high ne- gative base current Ine flows, permitting the rapid evacuation of charges stored in the base-emitter junction of transistor Tp. Figure 8. A low-value inductor L may be required between the base of transistor Tp and the Ise output of the UAA4002, so as to limit the gradient dipa/dt (see "The Power Transistor in its Environment" published by the Discrete Semiconductors Division of Thom- son-CSF). In many cases, this inductor is not requi- red. The Darlington T2 can carry a maximum current of 3A, The corresponding saturation voltage is typical- ly 3 V. Like the positive stage, this stage Is designed for easy augmentation of the available output cur- rent by the addition of one or more external transis- tors. Typical inductive load waveforms When conduction begins, the base current assumes a high value briefly and then reverts to zero. This base current spike permits rapid switching on of the power transistor. The base current value is then that required for quasi-saturation of the transistor, The base curreni curve is generally curved upwardy, due to the decreased gain of the power transistor with increased collector current. Figure 9, The external PNP transistor increases ihe megativa current available while decreasing the power dissipation in the UAA4002. BAe _ {yj SGS:THOMSON MIAO RLEST ROMS gg4 f bre dSced SIINGE LIF 130n0TWLS Coe) pode 19S beFigure 10, UAA4902 10 0,5 A Yoo . Power trannistor collector current Power trangister base current Vober * Vp Voltage on pin Veg of UAAdOR es ee es wid CONTROL OF MOS POWER TRANSISTORS Ideally, MOS power transistors should be voltage- controlled. In practice, in order to benefit from the high speed typical of this type of transistor it is ne- cessary to charge and discharge the spurious input capacitance at high speed, so that high currents flow, By virtue of the high current capability of its out- put stages, the UAA4002 is particularly suitable for controlling MOS power transistors. The output of the positive stage is connected direct- ly to the gate of the MOS transistor, to switch it into conduction very fast. The negative stage controls the turning off of the MOS transistor, by discharging the gate capacitance of the transistor. There Is no need for a high negative supply voltage, and the ar- OL d SOE UN rangement described in the previous section is the- refore used. in this circuit the UAA4002 is used in a completely conveniiona!l manner, in "level" control mode. The time constant ton min is set at 2.8 s, which is four times the time constant of the snubber network associated with the BUV37 transistor. Tha positive output stage of the UAA4002 is connected to the Vee rail through a 15 resistor. The maximum base current is approximately 0.45 A, The collector cur- rant is measured using a 0.10 shunt, and is limited to 10 A. The BUV37 Darlington for which the speci- fied value of Iceat [5 12 A, is thus operated with a considerable safety margin. (er SGS-THOMSON chs BPPNGCSCO SOINOHIOF1FOHDIWIS . 05Z) 7002 198 Fly5UAA4002 Figure 11. oOo Agure 11 100 Vv FOR MORE INFORMATION SEE NAGS1A TYPICAL APPLICATIONS Figure 12:8 A, 400 V switch. 10 VA 0,1 pF +) 100 uF wah 2a Lead = -_4 [a nF. 1008 1541 Wa Ww BA 159T 4 >+4 : * Noe 1 of |. GND Ap Ranle VoeVeoY a1 220 fh WY 23d UAA 4002 ew we C, Ry A E SE INH" Iyz i B * Ti HT 7 | oijue { ' 1 : Input o ay | TLS go | let Notes ; i. Switching ald netwark. 2, Paolypropylana capacitor, 3. With heatsink. Rar < 3.5 AW, O42 S6 RICKS SCTRERISE L| Ste HN BrrNGE820 SSINOELIFIFOIIWIS CO:Cl PO0C LaS Fe Ca ane ss ea eae aes ts phpenrosmay nage apart " wbiitla $3.9 eee sot se ae Cet a peas "a= ME pene Aen Le ae Sf enna te ah SAE nT RG lee SpE rae ae bes dhs sityUAA4002 Figure 13 : 150 W Forward Type Power Supply. | Bare) Aw TF fh GA mae | ay HS * imac g [= e [fu | 5 cet FP] 5 | Uas 4002 | d | ce | [ow J] | 4 | if te i | 0,1 uF mI j iii coe FT We Sieeaaraidien ath & Prumary weune os le Jman herank ee | Reoordary qround i i __ ae Performance Output voltage stability : For an input voltage varying from 190 to 245 V, the maximum relative variation in the output voltage is 0.7 % at nominal operating conditions. (Vout = 25 V, lour = 6 A). For a variation in the load from 0 to 100 % the relative variation in the output voltage is 1.3 %. For a variation in the load from 10 to 100 % (lout = 0.6 to 6 A), the relative variation in the output voltage is 0.4%, a Efficiency 80 % under nominal operating conditions. a Behaviour on overload : The power supply is fully protected against overloads and short-circuits, the output current being limited to 7 A. key SGS-THOMSON ol d GOS SN 6PROSEBCO SOINOHLOITIONOINIS L021 vade 14s VoyUAA4002 Figure 14 ; Capacitor Type Half Bridge Symmetrical Converter. ere ari hoe ee, Oy (+10 tF | ! ii uaa ap02-{ 7 * - (DRIVER 1) : Wa i I i | UAS 4002 * =n 1 | ames 1 T (-} + . o TLaS4 ae vate Se Deere! Fa aE Figure 15 : 200 A, 700 V Switch, f ee Y i #1 Tie f 3 4 kati Es aP ele cai ea | jae : Si me SGS-THOMSON MIEROTLLST Rees ESM 4170 Hg + peas ey Ja POM agit citar Fs eipe porta BPP0SZ8Z0 SOINOYL0313091NILS 60C! pO0L 138 9% age