FAN53526UC100X - FAIRCHILD SEMICONDUCTOR

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July 2017

FAN53526 • Rev. 3.1 www.onsemi.com

1

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

FAN53526

3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Features

 Fixed-Frequency Operation: 2.4 MHz

 Best-in-Class Load Transient

 Continuous Output Current Capability: 3.0 A

 2.5 V to 5.5 V Input Voltage Range

 Digitally Programmable Output Voltage:

- 0.600 V to 1.39375 V in 6.25 mV Steps

 Programmable Slew Rate for Voltage Transitions

 I2C-Compatible Interface Up to 3.4 Mbps

 PFM Mode for High Efficiency in Light-Load

 Quiescent Current in PFM Mode: 50 µA (Typical)

 Input Under-Voltage Lockout (UVLO)

 Thermal Shutdown and Overload Protection

 15-Bump Wafer-Level Chip Scale Package (WLCSP)

Applications

 Application, Graphic, and DSP Processors

- ARM™, Tegra™, OMAP™, NovaThor™,

ARMADA™, Krait™, etc.

 Hard Disk Drives, LPDDR3, LPDDR4

 Tablets, Netbooks, Ultra-Mobile PCs

 Smart Phones

 Gaming Devices

All trademarks are the property of their respective

owners.

Description

The FAN53526 is a step-down switching voltage regulator

that delivers a digitally programmable output from an input

voltage supply of 2.5 V to 5.5 V. The output voltage is

programmed through an I2C interface capable of operating

up to 3.4 MHz.

Using a proprietary architecture with synchronous

rectification, the FAN53526 is capable of delivering 3.0 A

continuous at over 80% efficiency, maintaining that efficiency

at load currents as low as 10 mA. The regulator operates at

a nominal fixed frequency of 2.4 MHz, which reduces the

value of the external components. Additional output

capacitance can be added to improve regulation during load

transients without affecting stability.

At moderate and light loads, Pulse Frequency Modulation

(PFM) is used to operate in Power-Save Mode with a typical

quiescent current of 50 µA at room temperature. Even with

such a low quiescent current, the part exhibits excellent

transient response during large load swings. At higher loads,

the system automatically switches to fixed-frequency control,

operating at 2.4 MHz. In Shutdown Mode, the supply current

drops below 1 µA, reducing power consumption. PFM Mode

can be disabled if fixed frequency is desired. The FAN53526

is available in a 15-bump, 1.310 mm x 2.015 mm, 0.4 mm

ball pitch WLCSP.

FAN53526 SW

COUT

L1

PVIN

PGND

CIN

VOUT

AGND

LOAD

VSEL

SCL

SDA

EN CIN_LOAD

CBY

Figure 1. Typical Application

FAN53526 • Rev. 3.1 www.onsemi.com

2

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Ordering Information

Part Number

Power-Up Defaults

DVS Range

/ Step Size

Temperature

Range

Package

Packing

Method

Device

Marking

VSEL0

VSEL1

FAN53526UC84X

1.125

0.600 V to

1.39375 V / 6.25 mV

-40 to 85°C

WLCSP

Tape &

Reel

F7

FAN53526UC89X

1.15625

CL

FAN53526UC100X

1.225

F9

FAN53526UC106X

1.2625

C7

FAN53526UC128X

1.2

F3

FAN53526UC00X

0.60

GA

Recommended External Components

Table 1. Recommended External Components for 3.0 A Maximum Load Current

Component

Description

Vendor

Parameter

Typ.

Unit

L1

330 nH, 2016 Case Size

See Table 2

L1

Alternative(1)

470 nH 2016 Case Size

COUT1, COUT2

47 µF, 6.3 V, X5R, 0603

GRM188R60J476ME15 (Murata)

C

47

µF

COUT1, COUT2

Alternative(1)

22 µF, 10 V, X5R, 0603

CL10A226MP8NUNB (SAMSUNG)

C

22

CIN

1 Piece; 4.7 µF, 10 V, X5R, 0603

C1608X5R1A475K (TDK)

C

4.7

CBY

1 Piece; 100 nF, 6.3V, X5R, 0201

GRM033R60J104KE19D (Murata)

C

100

nF

Note:

1. COUT Alternative and L1 Alternative can be used if not following reference design. CBY is recommended to reduce any high

frequency component on VIN bus. CBY is optional and used to filter any high frequency component on VIN bus.

Table 2. Recommended Inductors

Component Dimensions

Manufacturer

Part#

L (nH)

DCR

(mΩ Typ.)

ISAT(2)

L

W

H

Toko

DFE201612E-R33N

330

15

7.0

2.0

1.6

1.2

Toko

DFE201612E-R47N

470

21

6.1

2.0

1.6

1.2

Cyntek

PIFE20161B-R47MS-39

470

30

3.1

2.0

1.6

1.2

SEMCO

CIGT201610UMR47MNE

470

30

4.0

2.0

1.6

0.9

SEMCO

CIGT201210UMR47MNE

470

33

3.0

2.0

1.2

0.9

Note:

2. ISAT where the dc current drops the inductance by 30%.

FAN53526 • Rev. 3.1 www.onsemi.com

3

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Pin Configuration

PGND AGND

VSEL SDAEN

SCL VOUTAGND

PGNDSWVIN

C1

B1

A1 A2

C3

B3

A3

C2

D1 D3D2

B2

E1 E3E2

C1

B1

A1

C3

B3

A3 A2

C2

D1D3 D2

B2

E1E3 E2

Figure 2. Top View

Figure 3. Bottom View

Pin Definitions

Pin #

Name

Description

D1

VSEL

Voltage Select. When this pin is LOW, VOUT is set by the VSEL0 register. When this pin is HIGH,

VOUT is set by the VSEL1 register. Polarity of pin in conjunction with the MODE bits in the Control

register 02h, will select Forced PWM or Auto PFM/PWM mode of operation. VSEL0=Auto PFM,

and VSEL1=FPWM. The VSEL pin has an internal pull-down resistor (250k, which is only

activated with a logic low.

D2

EN

Enable. The device is in Shutdown Mode when this pin is LOW. Device keeps register content

when EN pin is LOW. The EN Pin has an internal pull-down resistor (250k, which is only

activated with a logic low.

E2

SCL

I2C Serial Clock

D3

SDA

I2C Serial Data

E3

VOUT

VOUT. Sense pin for VOUT. Connect to COUT.

A3, B3, C2

PGND

Power Ground. The low-side MOSFET is referenced to this pin. CIN and COUT should be returned

with a minimal path to these pins.

C3, E1

AGND

Analog Ground. All signals are referenced to this pin. Avoid routing high dV/dt AC currents

through this pin.

A1, B1, C1

VIN

Power Input Voltage. Connect to the input power source. Connect to CIN with minimal path.

A2, B2

SW

Switching Node. Connect to the inductor.

FAN53526 • Rev. 3.1 www.onsemi.com

4

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Absolute Maximum Ratings

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above

the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended

exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum

ratings are stress ratings only.

Symbol

Parameter

Min.

Max.

Unit

VIN

Voltage on SW, VIN Pins

IC Not Switching

-0.3

7.0

V

IC Switching

-0.3

6.5

Voltage on EN Pin

-0.3

VIN(3)

Voltage on All Other Pins

IC Not Switching

-0.3

VIN(3)

VOUT

Voltage on VOUT Pin

-0.3

6.5

V

VINOV_SLEW

Maximum Slew Rate of VIN > 6.5 V, PWM Switching

100

V/ms

ESD

Human Body Model, ANSI/ESDA/JEDEC JS-001-2012

2000

V

Charged Device Model per JESD22-C101

1000

TJ

Junction Temperature

-40

+150

°C

TSTG

Storage Temperature

-65

+150

°C

TL

Lead Soldering Temperature, 10 Seconds

+260

°C

Note:

3. Lesser of 7 V or VIN+0.3 V.

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating

conditions are specified to ensure optimal performance to the datasheet specifications. On Semiconductor does not

recommend exceeding them or designing to Absolute Maximum Ratings.

Symbol

Parameter

Min.

Typ.

Max.

Unit

VIN

Supply Voltage Range

2.5

5.5

V

IOUT

Output Current

0

3.0

A

TA

Operating Ambient Temperature

-40

+85

°C

TJ

Operating Junction Temperature

-40

+125

°C

Thermal Properties

Symbol

Parameter

Min.

Typ.

Max.

Unit

JA

Junction-to-Ambient Thermal Resistance(4)

42

°C/W

Note:

4. Junction-to-ambient thermal resistance is a function of application and board layout. This data is simulated with four-layer

2s2p boards with vias in accordance to JESD51- JEDEC standard. Special attention must be paid not to exceed the

junction temperature.

FAN53526 • Rev. 3.1 www.onsemi.com

5

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Electrical Characteristics

Minimum and maximum values are at VIN=3.6 V, TA=-40°C to +85°C, unless otherwise noted. Typical values are at TA=25°C,

VIN=3.6 V, and EN=HIGH. VOUT = 1.15625 V.

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

Power Supplies

IQ

Quiescent Current

ILOAD=0

50

µA

ILOAD=0, MODE Bit=1 (Forced PWM)

15

mA

I SD

H/W Shutdown Supply Current

EN=GND

0.1

3.0

µA

S/W Shutdown Supply Current

EN=VIN, BUCK_ENx=0, 2.5 V ≤ VIN ≤ 5.5 V

2

12

µA

VUVLO

Under-Voltage Lockout Threshold

VIN Rising

2.32

2.45

V

VUVHYST

Under-Voltage Lockout Hysteresis

350

mV

EN, VSEL, SDA, SCL

VIH

HIGH-Level Input Voltage

2.5 V ≤ VIN ≤ 5.5 V

1.1

V

VIL

LOW-Level Input Voltage

2.5 V ≤ VIN ≤ 5.5 V

0.4

V

IIN

Input Bias Current

Input Tied to GND or VIN

0.01

1.00

µA

VOUT Regulation

VREG

VOUT DC Accuracy

2.5 V ≤ VIN ≤ 5.5 V, VOUT from Minimum to

Maximum, IOUT(DC)=0 to 3.0 A, Auto

PFM/PWM

-2.5

2.5

%

2.5 V ≤ VIN ≤ 5.5 V, VOUT from Minimum to

Maximum, IOUT(DC)=0 to 3.0 A, Forced PWM

-1.5

1.5

VIN=3.8 V, VOUT=0.6 V, IOUT(DC)=500 mA,

Auto PFM/PWM

-2.3

-0.5

-14

-3

mV

LOAD

OUT

I

V



Load Regulation

IOUT(DC)=1 to 3 A

-0.01

%/A

IN

OUT

V



Line Regulation

2.5 V ≤ VIN ≤ 5.5 V, IOUT(DC)=1.5 A

0.01

%/V

VTRSP

Transient Response

ILOAD Step 0.01 A ⇔ 1.5 A, tr=tf=200 ns,

VOUT=1.15625 V

±50

mV

ILOAD Step 0 A ⇔ 500 mA, tr=tf=100 ns,

VIN=3.8 V, VOUT=0.6 V

±16

Power Switch / Protection

ILIMPK

P-MOS Peak Current Limit

4.00

4.75

5.50

A

TLIMIT

Thermal Shutdown

150

°C

THYST

Thermal Shutdown Hysteresis

17

°C

VSDWN

Input OVP Shutdown

Rising Threshold

6.15

V

Falling Threshold

5.50

5.73

Frequency Control

fSW

Oscillator Frequency

2.05

2.40

2.75

MHz

DAC

Resolution

7

Bits

Differential Nonlinearity(5)

0.5

LSB

Soft-Start

tSS

Regulator Enable to Regulated

VOUT

RLOAD > 5 , VOUT=1.15625 V, From EN

Rising Edge to 95% VOUT

150

µs

5. Monotonicity assured by design.

FAN53526 • Rev. 3.1 www.onsemi.com

6

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

I2C Timing Specifications

Guaranteed by design.

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

fSCL

SCL Clock Frequency

Standard Mode

100

kHz

Fast Mode

400

Fast Mode Plus

1000

High-Speed Mode, CB ≤100 pF

3400

High-Speed Mode, CB ≤ 400 pF

1700

tBUF

Bus-Free Time between STOP and

START Conditions

Standard Mode

4.7

µs

Fast Mode

1.3

Fast Mode Plus

0.5

tHD;STA

START or REPEATED START

Hold Time

Standard Mode

4

µs

Fast Mode

600

ns

Fast Mode Plus

260

High-Speed Mode

160

tLOW

SCL LOW Period

Standard Mode

4.7

µs

Fast Mode

1.3

Fast Mode Plus

0.5

High-Speed Mode, CB ≤ 100 pF

160

ns

High-Speed Mode, CB ≤ 400 pF

320

tHIGH

SCL HIGH Period

Standard Mode

4

µs

Fast Mode

600

ns

Fast Mode Plus

260

High-Speed Mode, CB ≤ 100 pF

60

High-Speed Mode, CB ≤ 400 pF

120

tSU;STA

REPEATED START Setup Time

Standard Mode

4.7

µs

Fast Mode

600

ns

Fast Mode Plus

260

High-Speed Mode

160

tSU;DAT

Data Setup Time

Standard Mode

250

ns

Fast Mode

100

Fast Mode Plus

50

High-Speed Mode

10

tHD;DAT

Data Hold Time

Standard Mode

0

3.45

µs

Fast Mode

0

900

ns

Fast Mode Plus

0

450

High-Speed Mode, CB ≤ 100 pF

0

70

High-Speed Mode, CB ≤ 400 pF

0

150

tRCL

SCL Rise Time

Standard Mode

20+0.1CB

1000

ns

Fast Mode

20+0.1CB

300

Fast Mode Plus

20+0.1CB

120

High-Speed Mode, CB ≤ 100 pF

10

80

High-Speed Mode, CB ≤ 400 pF

20

160

Continued on the following page…

FAN53526 • Rev. 3.1 www.onsemi.com

7

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

I2C Timing Specifications (Continued)

Guaranteed by design.

Symbol

Parameter

Condition

Min.

Typ.

Max.

Unit

tFCL

SCL Fall Time

Standard Mode

20+0.1CB

300

ns

Fast Mode

20+0.1CB

300

Fast Mode Plus

20+0.1CB

120

High-Speed Mode, CB ≤ 100 pF

10

40

High-Speed Mode, CB ≤ 400 pF

20

80

tRCL1

Rise Time of SCL After a

REPEATED START Condition and

After ACK Bit

High-Speed Mode, CB ≤ 100 pF

10

80

ns

High-Speed Mode, CB ≤ 400 pF

20

160

tRDA

SDA Rise Time

Standard Mode

20+0.1CB

1000

ns

Fast Mode

20+0.1CB

300

Fast Mode Plus

20+0.1CB

120

High-Speed Mode, CB ≤ 100 pF

10

80

High-Speed Mode, CB ≤ 400 pF

20

160

tFDA

SDA Fall Time

Standard Mode

20+0.1CB

300

ns

Fast Mode

20+0.1CB

300

Fast Mode Plus

20+0.1CB

120

High-Speed Mode, CB ≤ 100 pF

10

80

High-Speed Mode, CB ≤ 400 pF

20

160

tSU;STO

Stop Condition Setup Time

Standard Mode

4

µs

Fast Mode

600

ns

Fast Mode Plus

120

High-Speed Mode

160

CB

Capacitive Load for SDA and SCL

400

pF

FAN53526 • Rev. 3.1 www.onsemi.com

8

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Timing Diagrams

Figure 4. I2C Interface Timing for Fast Plus, Fast, and Slow Modes

Figure 5. I2C Interface Timing for High-Speed Mode

START

REPEATED

START

SCL

SDA

tF

tHD;STA

tLOW

tR

tHD;DAT

tHIGH

TSU;DAT

tSU;STA

tHD;STO

tBUF

START STOP

tHD;STA

REPEATED

START

SCLH

SDAH

tFDA

tLOW

tRCL1

tHD;DAT

tHIGH

tSU;STO

REPEATED

START

tRDA

tFCL

tSU;DAT

tRCL

STOP

= MCS Current Source Pull-up

= RP Resistor Pull-up

note A

Note A: First rising edge of SCLH after Repeated Start and after each ACK bit.

tHD;STA

tSU;STA

FAN53526 • Rev. 3.1 www.onsemi.com

9

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Typical Characteristics

Unless otherwise specified, Auto PFM/PWM Mode, VIN = 3.6 V, VOUT = 1.15625 V, VSEL = EN = VIN, TA = 25°C; circuit and

components according to Figure 1 and Table 1. Efficiency test conditions; ILOAD: 1 mA to 3 A, L = 330 nH, DFE201612E-R33N

(Toko). CIN =4.7 µF, 0603, C1608X5R1A475K (TDK), COUT x 2 = 2X47 µF, 0603, GRM188R60J476ME (Murata).

Figure 6. Efficiency vs. Load Current and Input Voltage,

VOUT=1.15625 V

Figure 7. Efficiency vs. Load Current and Temperature,

VIN=3.6 V, VOUT=1.15625 V

Figure 8. Output Regulation vs. Load Current and

Input Voltage, VOUT=1.15625 V

Figure 9. PWM Entry / Exit Level vs. Input Voltage,

VOUT=1.15625 V

Figure 10. Output Ripple vs. Load Current, VIN=4.2 V

and 3.6 V, VOUT=1.15625 V, Auto and Forced PWM

Figure 11. Frequency vs. Load Current, VIN=4.2 V

and 3.6 V, VOUT=1.15625 V, Auto PWM

70%

72%

74%

76%

78%

80%

82%

84%

86%

88%

90%

110 100 1000

Efficiency (%)

Load Current (mA)

3.3Vin (%)

3.6Vin (%)

3.8Vin (%)

4.2Vin (%)

70%

75%

80%

85%

90%

95%

110 100 1000

Efficiency (%)

Load Current (mA)

-40℃

25℃

85℃

1.12

1.13

1.14

1.15

1.16

1.17

1.18

0 500 1000 1500 2000 2500 3000

Output Voltage (V)

Load Current (mA)

3.3Vin(V)

3.6Vin(V)

3.8Vin(V)

4.2Vin(V)

0

200

400

600

800

1000

1200

2.7 3.2 3.7 4.2 4.7 5.2

Output Current (mA)

Input Voltage (V)

Enty(mA)

Exit(mA)

0

2

4

6

8

10

12

14

0 500 1000 1500 2000 2500 3000

Output Ripple (mVpp)

Load Current (mA)

4.2Vin FPWM

4.2Vin Auto

3.6Vin FPWM

3.6Vin Auto

0

500

1000

1500

2000

2500

3000

0 500 1000 1500 2000 2500 3000

Switching Frequency (KHz)

Load Current (mA)

3.6Vin Auto

4.2Vin Auto

3.6Vin FPWM

4.2VIN FPWM

FAN53526 • Rev. 3.1 www.onsemi.com

10

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Typical Characteristics

Unless otherwise specified, Auto PFM/PWM Mode, VIN = 3.6 V, VOUT = 1.15625 V, VSEL = EN = VIN, TA = 25°C; circuit and

components according to Figure 1 and Table 1. Efficiency test conditions; ILOAD: 1 mA to 3 A, L = 330 nH, DFE201612E-R33N

(Toko). CIN =4.7 µF, 0603, C1608X5R1A475K (TDK), COUT x 2 = 2X47 µF, 0603, GRM188R60J476ME (Murata).

Figure 12. Quiescent Current vs. Input Voltage and

Temperature, Auto Mode, VOUT=1.15625 V

Figure 13. Shutdown Current vs. Input Voltage

and Temperature

Figure 14. Line Transient, 3.6-4.2 VIN, 1.15625 VOUT, 10 µs

Edge at 1 A Load

Figure 15. Load Transient, 3.6 VIN, 1.15625 VOUT,

0.01-1.5 A, 120 ns Edge

Figure 16. Load Transient, 3.6 VIN, 1.15625 VOUT,

1.5-3 A, 120 ns Edge

Figure 17. Startup, 5  Load, VOUT=1.15625 V, VIN=3.6 V

20

30

40

50

60

70

80

2.4 2.9 3.4 3.9 4.4 4.9

IQ(μA)

Vin(V)

-40℃

25℃

85℃

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

2.4 2.9 3.4 3.9 4.4 4.9

ISD (μA)

Vin(V)

-40℃

25℃

85℃

VOUT

VIN

VOUT

IOUT

VOUT

IOUT

VOUT

EN

FAN53526 • Rev. 3.1 www.onsemi.com

11

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Typical Characteristics

Unless otherwise specified, Auto PFM/PWM Mode, VIN = 3.6 V, VOUT = 1.15625 V, VSEL = EN = VIN, TA = 25°C; circuit and

components according to Figure 1 and Table 1. Efficiency test conditions; ILOAD: 1 mA to 3 A, L = 330 nH, DFE201612E-R33N

(Toko). CIN =4.7 µF, 0603, C1608X5R1A475K (TDK), COUT x 2 = 2X47 µF, 0603, GRM188R60J476ME (Murata).

Figure 18. Load Transient, 3.8 VIN, 0.6 VOUT,

0-500 mA, 100 ns Edge, 47 µF COUT

VOUT (10mV/div)

0.6V offset

-16mV

+16mV

500mA

0mA

582mV

618mV

IOUT (500mA/div)

FAN53526 • Rev. 3.1 www.onsemi.com

12

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Operation Description

The FAN53526 is a step-down switching voltage regulator that

delivers a programmable output voltage from an input voltage

supply of 2.5 V to 5.5 V. Using a proprietary architecture with

synchronous rectification, the FAN53526 is capable of

delivering 3.0 A at over 80% efficiency. The regulator operates

at a nominal frequency of 2.4 MHz at full load, which reduces

the value of the external components to 330 nH or 470 nH for

the output inductor and 44 µF for the output capacitor. High

efficiency is maintained at light load with single-pulse PFM.

An I2C-compatible interface allows transfers up to 3.4 Mbps.

This communication interface can be used to:

 Dynamically re-program the output voltage in 6.25 mV

increments;

 Reprogram the mode to enable or disable PFM;

 Control voltage transition slew rate; or

 Enable / disable the regulator.

Control Scheme

The FAN53526 uses a proprietary non-linear, fixed-frequency

PWM modulator to deliver a fast load transient response,

while maintaining a constant switching frequency over a wide

range of operating conditions. The regulator performance is

independent of the output capacitor ESR , allowing for the use

of ceramic output capacitors. Although this type of operation

normally results in a switching frequency that varies with input

voltage and load current, an internal frequency loop holds the

switching frequency constant over a large range of input

voltages and load currents.

For very light loads, the FAN53526 operates in Discontinuous

Current Mode (DCM) single-pulse PFM, which produces low

output ripple compared with other PFM architectures.

Transition between PWM and PFM is relatively seamless,

providing a smooth transition between DCM and CCM Modes.

PFM can be disabled by programming the MODE bits in the

CONTROL register in combination with the state of the VSEL

pin. See table in the Control Register, 02h.

Enable and Soft-Start

When the EN pin is LOW; the IC is shut down, all internal

circuits are off, and the part draws very little current. In this

state, I2C can be written to or read from as long as input

voltage is above the UVLO. The registers keep the content

when the EN pin is LOW. The registers are reset to default

values during a Power On Reset (POR). When the

OUTPUT_DISCHARGE bit in the Control register is enabled

(logic HIGH) and the EN pin is LOW or the BUCK_ENx bit is

LOW, an 11  load is connected from VOUT to GND to

discharge the output capacitors.

Raising EN while the BUCK_ENx bit is HIGH activates the

part and begins the soft-start cycle. During soft-start, the

modulator’s internal reference is ramped slowly to minimize

surge currents on the input and prevent overshoot of the

output voltage. Synchronous rectification is inhibited,

allowing the IC to start into a pre-charged capacitive load.

If large values of output capacitance are used, the regulator

may fail to start. The maximum COUT capacitance for starting

with a heavy constant-current load is approximately:

 

OUT

LOADLIMPKOUTMAX V

320μ

IIC 

(1)

where COUTMAX is expressed in F and ILOAD is the load

current during soft-start, expressed in A.

If the regulator is at its current limit for 16 consecutive current

limit cycles, the regulator shuts down and enters tri-state

before reattempting soft-start 1700 µs later. This limits the

duty cycle of full output current during soft-start to prevent

excessive heating.

The IC allows for software enable of the regulator, when EN is

HIGH, through the BUCK_EN bits. BUCK_EN0 and

BUCK_EN1 are both initialized HIGH. These options start

after a POR, regardless of the state of the VSEL pin.

Table 3. Hardware and Software Enable

Pins

BITS

EN

VSEL

BUCK_EN0

BUCK_EN1

Output

Mode

0

X

OFF

Shutdown

1

0

X

OFF

Shutdown

1

0

1

X

ON

Auto

1

X

0

OFF

Shutdown

1

X

1

ON

FPWM

VSEL Pin and I2C Programming Output

Voltage

The output voltage is set by the NSELx control bits in VSEL0

and VSEL1 registers. The output is given as:

VOUT =0.600V+NSELx·6.25mV

(2)

For example, if NSEL =1010000 (80 decimal), then VOUT =

0.600 + 0.5 = 1.100 V.

Output voltage can also be controlled by toggling the VSEL

pin LOW or HIGH. VSEL LOW corresponds to VSEL0 and

VSEL HIGH corresponds to VSEL1. Upon POR, VSEL0 and

VSEL1 are reset to their default voltages, as shown in Table 7

FAN53526 • Rev. 3.1 www.onsemi.com

13

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Transition Slew Rate Limiting

When transitioning from a low to high voltage, the IC can be

programmed for one of eight possible slew rates using the

SLEW bits in the Control register, as shown in Table 4.

Table 4. Transition Slew Rate

Decimal

Bin

Slew Rate

0

000

64.00

mV/µs

1

001

32.00

mV/µs

2

010

16.00

mV/µs

3

011

8.00

mV/µs

4

100

4.00

mV/µs

5

101

2.00

mV/µs

6

110

1.00

mV/µs

7

111

0.50

mV/µs

Transitions from high to low voltage rely on the output load to

discharge VOUT to the new set point. Once the high-to-low

transition begins, the IC stops switching until VOUT has

reached the new set point.

Under-Voltage Lockout (UVLO)

When EN is HIGH, the under-voltage lockout keeps the part

from operating until the input supply voltage rises HIGH

enough to properly operate. This ensures proper operation of

the regulator during startup or shutdown.

Input Over-Voltage Protection (OVP)

When VIN exceeds VSDWN (~ 6.2 V), the IC stops switching to

protect the circuitry from internal spikes above 6.5 V. An

internal filter prevents the circuit from shutting down due to

noise spikes.

Current Limiting

A heavy load or short circuit on the output causes the current

in the inductor to increase until a maximum current threshold

is reached in the high-side switch. Upon reaching this point,

the high-side switch turns off, preventing high currents from

causing damage. 16 consecutive current limit cycles in current

limit, cause the regulator to shut down and stay off for about

1700 s before attempting a restart.

Thermal Shutdown

When the die temperature increases, due to a high load

condition and/or high ambient temperature, the output

switching is disabled until the die temperature falls sufficiently.

The junction temperature at which the thermal shutdown

activates is nominally 150°C with a 17°C hysteresis.

Monitor Register (Reg05)

The Monitor register indicates of the regulation state of the IC.

If the IC is enabled and is regulating, its value is (1000 0001).

I2C Interface

The serial interface is compatible with Standard, Fast, Fast

Plus, and HS Mode I2C Bus® specifications. The SCL line is

an input and its SDA line is a bi-directional open-drain output;

it can only pull down the bus when active. The SDA line only

pulls LOW during data reads and when signaling ACK. All

data is shifted in MSB (bit 7) first.

I2C Slave Address

In hex notation, the slave address assumes a 0 LS Bit. The

hex slave address is C0.

Table 5. I2C Slave Address

Hex

Bits

7

6

5

4

3

2

1

0

C0

1

0

WR/

Other slave addresses can be assigned. Contact an On

Semiconductor representative.

Bus Timing

As shown in Figure 19 data is normally transferred when SCL

is LOW. Data is clocked in on the rising edge of SCL.

Typically, data transitions shortly at or after the falling edge of

SCL to allow sufficient time for the data to set up before the

next SCL rising edge.

Figure 19. Data Transfer Timing

Each bus transaction begins and ends with SDA and SCL

HIGH. A transaction begins with a START condition, which is

defined as SDA transitioning from 1 to 0 with SCL HIGH, as

shown in Figure 20.

Figure 20. START Bit

A transaction ends with a STOP condition, defined as SDA

transitioning from 0 to 1 with SCL high, as shown in Figure 21.

Figure 21. STOP Bit

During a read from the FAN53526, the master issues a

REPEATED START after sending the register address and

before resending the slave address. The REPEATED START

is a 1 to 0 transition on SDA while SCL is HIGH, as shown in

Figure 22.

SCL tSU

tH

SDA

Data change allowed

SCL

tHD;STA

SDA Slave Address

MS Bit

SCL

SDA

Slave Releases Master Drives

ACK(0) or

NACK(1)

tHD;STO

FAN53526 • Rev. 3.1 www.onsemi.com

14

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Figure 22. REPEATED START Timing

High-Speed (HS) Mode

The protocols for High-Speed (HS), Low-Speed (LS), and

Fast-Speed (FS) Modes are identical; except the bus speed

for HS Mode is 3.4 MHz. HS Mode is entered when the bus

master sends the HS master code 00001XXX after a START

condition (Figure 20). The master code is sent in Fast or Fast-

Plus Mode (less than 1 MHz clock); slaves do not ACK this

transmission.

The master generates a REPEATED START condition (Figure

22) that causes all slaves on the bus to switch to HS Mode.

The master then sends I2C packets, as described above,

using the HS Mode clock rate and timing.

The bus remains in HS Mode until a STOP bit (Figure 21) is

sent by the master. While in HS Mode, packets are separated

by REPEATED START conditions (Figure 22).

Read and Write Transactions

The following figures outline the sequences for data read and

write. Bus control is signified by the shading of the packet,

defined as and .

All addresses and data are MSB first.

Table 6. I2C Bit Definitions for Figure 23 and

Figure 24

Symbol

Definition

S

START, see Figure 20

P

STOP, see Figure 21

R

REPEATED START, see Figure 22

A

ACK. The slave drives SDA to 0 to

acknowledge the preceding packet.

NACK. The slave sends a 1 to NACK the

preceding packet.

Figure 23. Write Transaction

Figure 24. Write Transaction Followed by a Read Transaction

SCL

SDA ACK(0) or

NACK(1)

Slave Releases

SLADDR

MS Bit

tHD;STA

tSU;STA

Slave Drives Bus

A

S Slave Address A Reg Addr A A P0

7 bits 8 bits 8 bits

Data

000

S Slave Address A Reg Addr A0

7 bits 8 bits

RSlave Address

7 bits

1 A Data A

8 bits

0 0 0 1

P

FAN53526 • Rev. 3.1 www.onsemi.com

15

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Register Description

Table 7. Register Map

Hex

Address

Name

Function

Binary

Hex

00

VSEL0

Controls VOUT settings when VSEL pin = LOW

1XXXXXXX

XX

01

VSEL1

Controls VOUT settings when VSEL pin = HIGH

1XXXXXXX

XX

02

CONTROL

Determines whether VOUT output discharge is enabled and also

the slew rate of positive transitions

10000010

82

03

ID1

Read-only register identifies vendor and chip type

10000001

81

04

ID2

Read-only register identifies die revision

00001000

08

05

MONITOR

Indicates device status

00000000

00

Bit Definitions

The following table defines the operation of each register bit. Bold indicates power-on default values.

Bit

Name

Type

Value

Description

VSEL0

Register Address: 00

7

BUCK_EN0

R/W

1

Software buck enable. When EN pin is LOW, the regulator is off. When EN

pin is HIGH, BUCK_EN bit takes precedent.

6:0

NSEL0

R/W

XXX XXXX

Sets VOUT value from 0.600 to 1.39375 V (see Eq. (2)).

VSEL1

Register Address: 01

7

BUCK_EN1

R/W

1

Software buck enable. When EN pin is LOW, the regulator is off. When EN

pin is HIGH, BUCK_EN bit takes precedent.

6:0

NSEL1

R/W

XXX XXXX

Sets VOUT value from 0.600 to 1.39375 V (see Eq. (2)).

CONTROL

Register Address: 02

7

OUTPUT_

DISCHARGE

R/W

0

When the regulator is disabled, VOUT is not discharged.

1

When the regulator is disabled, VOUT discharges through an internal pull-

down.

6:4

SLEW

R/W

000 –111

Sets the slew rate for positive voltage transitions (see Table 4).

3

Reserved

0

Always reads back 0.

2

RESET

R/W

0

Setting to 1 resets all registers to default values. Always reads back 0.

1:0

MODE

R/W

10

In combination with the VSEL pin, these two bits set the operation of the

buck to be either in Auto-PFM/PWM Mode during light load or Forced

PWM mode. See table below.

Mode of Operation

VSEL Pin

Binary

Operation

Low

X0

Auto PFM/PWM

Low

X1

Forced PWM

High

0X

Auto PFM/PWM

High

1X

Forced PWM

ID1

Register Address: 03

7:5

VENDOR

R

100

Signifies On Semiconductor as the IC vendor.

4

Reserved

R

0

Always reads back 0.

3:0

DIE_ID

R

0001

DIE ID - FAN53525/6.

ID2

Register Address: 04

7:4

Reserved

R

0000

Always reads back 0000.

3:0

DIE_REV

R

1000

FAN53526 Die Revision

FAN53526 • Rev. 3.1 www.onsemi.com

16

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Bit Definitions (Continued)

The following table defines the operation of each register bit. Bold indicates power-on default values.

Bit

Name

Type

Value

Description

MONITOR

Register Address: 05

7

PGOOD

R

0

1: Buck is enabled and soft-start is completed.

6

UVLO

R

0

1: Signifies the VIN is less than the UVLO threshold.

5

OVP

R

0

1: Signifies the VIN is greater than the OVP threshold.

4

POS

R

0

1: Signifies a positive voltage transition is in progress and the output

voltage has not yet reached its new setpoint. This bit is also set during IC

soft-start.

3

NEG

R

0

1: Signifies a negative voltage transition is in progress and the output

voltage has not yet reached its new setpoint.

2

RESET_STAT

R

0

1: Indicates that a register reset was performed. This bit is cleared after

register 5 is read.

1

OT

R

0

1: Signifies the thermal shutdown is active.

0

BUCK_STATUS

R

0

1: Buck enabled; 0: buck disabled.

FAN53526 • Rev. 3.1 www.onsemi.com

17

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Application Information

Selecting the Inductor

The output inductor must meet both the required inductance

and the energy-handling capability of the application. The

inductor value affects the average current limit, the output

voltage ripple, and the efficiency.

The ripple current (∆I) of the regulator is:



















SW

OUTIN

IN

OUT fL VV

V

ΔI

(3)

The maximum average load current, IMAX(LOAD), is related to

the peak current limit, ILIM(PK), by the ripple current such that:

2I

II )PK(LIM)LOAD(MAX 



(4)

The FAN53526 is optimized for operation with L=330 nH, but

is stable with inductances up to 1.0 H (nominal). The

inductor should be rated to maintain at least 80% of its value

at ILIM(PK). Failure to do so decreases the amount of DC

current the IC can deliver.

Efficiency is affected by the inductor DCR and inductance

value. Decreasing the inductor value for a given physical

size typically decreases the DCR; but since ∆I increases, the

RMS current increases, as do core and skin-effect losses:

12

I

I I 2

2

)DC(OUTRMS 



(5)

The increased RMS current produces higher losses through

the RDS(ON) of the IC MOSFETs and the inductor ESR.

Increasing the inductor value produces lower RMS currents,

but degrades transient response. For a given physical inductor

size, increased inductance usually results in an inductor with

lower saturation current.

Table 8. Effects of Inductor Value (from 330 nH

Recommended) on Regulator Performance

IMAX(LOAD)

∆VOUT (Eq.(7))

Transient Response

Increase

Decrease

Degraded

Inductor Current Rating

The current-limit circuit can allow substantial peak currents to

flow through L1 under worst-case conditions. If it is possible

for the load to draw such currents, the inductor should be

capable of sustaining the current or failing in a safe manner.

For space-constrained applications, a lower current rating for

L1 can be used. The FAN53526 may still protect these

inductors in the event of a short circuit, but may not be able to

protect the inductor from failure if the load is able to draw

higher currents than the DC rating of the inductor. Refer to

Table 2 for the recommended inductors.

Output Capacitor and VOUT Ripple

If space is at a premium, 0603 capacitors may be used.

Increasing COUT has negligible effect on loop stability and

can be increased to reduce output voltage ripple or to

improve transient response. Output voltage ripple, ∆VOUT, is

calculated by:

 





















 OUTSW

2

OUTSW

LOUT Cf8 1

D1D2 ESRCf

IV

(6)

where COUT is the effective output capacitance.

The capacitance of COUT decreases at higher output voltages,

which results in higher ∆VOUT. Equation (6) is only valid for

CCM operation, which occurs in PWM Mode.

The FAN53526 can be used with either 2 x 22 µF (0603) or 2

x 47 µF (0603) output capacitor configuration. If a tighter ripple

and transient specification is need from the FAN53526, then

the 2 x 47 µF is recommended.

The lowest ∆VOUT is obtained when the IC is in PWM Mode

and, therefore, operating at 2.4 MHz. In PFM Mode, fSW is

reduced, causing ∆VOUT to increase.

ESL Effects

The Equivalent Series Inductance (ESL) of the output

capacitor network should be kept low to minimize the square-

wave component of output ripple that results from the division

ratio COUT ESL and the output inductor (LOUT). The square-

wave component due to the ESL can be estimated as:

1L

ESL

VV COUT

IN)SQ(OUT 

(7)

A good practice to minimize this ripple is to use multiple output

capacitors to achieve the desired COUT value. For example, to

obtain COUT=20 F, a single 22 F 0805 would produce twice

the square wave ripple as two x 10 F 0805.

To minimize ESL, try to use capacitors with the lowest ratio of

length to width. 0805 s have lower ESL than 1206 s. If low

output ripple is a chief concern, some vendors produce 0508

capacitors with ultra-low ESL. Placing additional small-value

capacitors near the load also reduces the high-frequency

ripple components.

Input Capacitor

The ceramic input capacitors should be placed as close as

possible between the VIN and PGND pins to minimize the

parasitic inductance. If a long wire is used to bring power to

the IC, additional “bulk” capacitance (electrolytic or tantalum)

should be placed between CIN and the power source lead to

reduce under-damped ringing that can occur between the

inductance of the power source leads and CIN.

The effective CIN capacitance value decreases as VIN

increases due to DC bias effects. This has no significant

impact on regulator performance.

FAN53526 • Rev. 3.1 www.onsemi.com

18

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Thermal Considerations

Heat is removed from the IC through the solder bumps to the

PCB copper. The junction-to-ambient thermal resistance (JA)

is largely a function of the PCB layout (size, copper weight,

and trace width) and the temperature rise from junction to

ambient (T).

For the FAN53526, JA is 42°C/W when mounted on its four-

layer with vias evaluation board in still air with 2 oz. outer layer

copper weight and 1 oz. inner layer.

For long-term reliable operation, the junction temperature (TJ)

should be maintained below 125°C.

To calculate maximum operating temperature (<125°C) for a

specific application:

1. Use efficiency graphs to determine efficiency for the

desired VIN, VOUT, and load conditions.

2. Calculate total power dissipation using:















 1

1

LOADOUTT IVP

(8)

where η is efficiency from Figure 6 through Figure 7

3. Estimate inductor copper losses using:

L

2

LOADL DCRIP 

(9)

4. Determine IC losses by removing inductor losses (step 3)

from total dissipation:

LTIC PPP 

(10)

5. Determine device operating temperature:

JAIC

PT 

and

TTT AIC 

(11)

Note that the RDS(ON) of the power MOSFETs increases

linearly with temperature at about 1.4%/°C. This causes the

efficiency () to degrade with increasing die temperature.

FAN53526 • Rev. 3.1 www.onsemi.com

19

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Layout Recommendations

1. The input capacitor (CIN) should be connected as close

as possible to the VIN and GND pins. Connect to VIN

and GND using only top metal.

Do not route through vias (see Figure 26).

2. Place the inductor (L) as close as possible to the IC.

Use short wide traces for the main current paths.

3. The output capacitor (COUT) should be as close as

possible to the IC. Connection to GND should only be

on top metal. Feedback signal connection to VOUT

should be routed away from noisy components and

traces (e.g. SW line) (see Figure 28).

Figure 25. Guidance for Layer 1

Figure 26. Layer 2

CIN

0603 X5R

10V 4.7μF

L1

IMAXDC>3A

COUT

0603 X5R

10V 22μ

VIN SW PGND

VIN PGND AGND

VSEL EN SDA

AGND SCL VOUT

VIN PGND

VOUT

1-4 1-41-4

1-4

1-4 1-3

1-3

1-41-4

1-4

Recommend separating AGND to PGND. Place via in pad

of AGND and connect directly to System GND

The shared GND for CIN and COUT connects down

to the System GND of the device.

The clearance is abut 10 mil or 0.26mm.

If this is an issue, use via(1-3) to come

down to the System GND.

Note:

The via 1-2 goes to&from layer 1 to 2.

The via 1-3 goes to&from layer 1 to 3.

The via 1-4 goes to&from layer 1 to 4.

The via is staggered from the pad for clear

demonstration purpose only. If there is no issue

with via on pad, please do so or follow

manufacturing guide for PCB.

1-2

1-4

FAN53526 • Rev. 3.1 www.onsemi.com

20

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Figure 27. Layer 3

Figure 28. Layer 4

VIN SW PGND

VIN PGND AGND

VSEL EN SDA

AGND SCL VOUT

1-4 1-41-4

1-4

1-4 1-3

1-4

1-3

VOUT

EN

1-41-4

1-4

The other logic signals maybe routed on

the layer 1.

Dedicated System Ground

VIN SW PGND

VIN PGND AGND

VSEL EN SDA

AGND SCL VOUT

1-4 1-41-4

1-4

1-41-4

1-4

FAN53526 • Rev. 3.1 www.onsemi.com

21

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Figure 29. Remote Sensing Schematic

FAN

53525

SW

C

OUT

L

1

PVIN

P

GND

C

IN

VOUT

C

IN

1

AGND

Core

Processor

(

System Load

)

GND

V

DD

VSEL

SCL

SDA

EN

1. FB trace connects to “+” side of COUT cap.

3. Maximum trace resistance between the inductor and the load should not exceed 30mΩ.

2. Do not place COUT near FAN53526, place COUT near load.

For a 20mils wide PCB trace with 0.5mils thickness using 2oz. copper, a length of 0.5 inches

gives a resistance of 24.3mΩ.

FAN53526

FAN53526 • Rev. 3.1 www.onsemi.com

22

FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

Physical Dimensions

Figure 30. 15-Ball, Wafer-Level Chip-Scale Package (WLCSP), 3x5 Array, 0.4 mm Pitch, 250 µm Ball

Product-Specific Dimensions

D

E

X

Y

2.015 ±0.03 mm

1.310 ±0.03 mm

0.255 mm

0.2075 mm

B

A

BALL A1

INDEX

AREA

C

0.005 C A B

SIDE VIEWS

TOP VIEW

NOTES

A. NO JEDEC REGISTRATION APPLIES.

B. DIMENSIONS ARE IN MILLIMETERS.

C. DIMENSIONS AND TOLERANCE PER

ASME Y14.5 - 2009.

D. DATUM C IS DEFINED BY THE

SPHERICAL CROWNS OF THE BALLS.

E. PACKAGE NOMINAL HEIGHT IS

586 ± 39 MICRONS (547-625 MICRONS).

F. FOR DIMENSIONS D,E,X, AND Y SEE

PRODUCT DATASHEET.

G. DRAWING FILNAME: MKT-UC015AB Rev1

0.03 C

15X

BOTTOM VIEW

0.05 C

0.06 C

RECOMMENDED LAND PATTERN

(NSMD TYPE)

D

2X

E

D

(Ø0.200)

Cu Pad

(Ø0.300)

Solder Mask

Opening

A1

Seating Plane

Ø0.260±0.02

(Y)±0.018

(X)±0.018

0.625

0.547 0.378±0.018

0.208±0.021

0.40

F

1 2 3

A

B

C

D

E

0.80

1.60

0.80

1.60

FAN53526 • Rev. 3.1 www.onsemi.com

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FAN53526 — 3.0 A, 2.4 MHz, Digitally Programmable TinyBuck® Regulator

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1

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

N. American Technical Support: 800−282−9855 Toll Free

USA/Canada

Europe, Middle East and Africa Technical Support:

Phone: 421 33 790 2910

Japan Customer Focus Center

Phone: 81−3−5817−1050

www.onsemi.com

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor

19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA

Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada

Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada

Email: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Order Literature: http://www.onsemi.com/orderlit

For additional information, please contact your local

Sales Representative