PET2000-12-074RD - BEL POWER SOLUTIONS

The PET2000-12-074xD is a 2000 Watt DC to DC power supply that

converts 40-72 VDC voltage into an isolated main output of +12 VDC

for powering intermediate bus architectures (IBA) in high performance

and reliability servers, routers, and network switches.

The PET2000-12-074xD utilizes full digital control architecture for

greater efficiency, control, and functionality.

This power supply meets international safety standards.

• Best-in-class, “Platinum” efficiency

• Wide input voltage range: 40-72 VDC

• Always-On 12 V / 3 A / 36 W standby output

• Hot-plug capable

• Parallel operation with active current sharing

• Full digital controls for improved performance

• High density design: 42.1 W/in3

• Small form factor: 265 x 73.5 x 40 mm (10.43 x 2.89 x 1.57 in)

• Power Management Bus communication protocol for control,

programming and monitoring

• Status LED with fault signaling

• Networking Switches

• Servers & Routers

• Telecommunications

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PET2000-12-074xD

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1.

PET

2000

-

12

-

074

x

D

x

Product Family

Power Level

Dash

V1 Output

Dash

Width

Airflow

Input

DC Inlet

PET Front-Ends

2000 W

12 V

74 mm

N: Normal

R: Reverse

D: DC

- - - Black, 6 AWG (C10-747100)*

K - Black, 4 AWG (C10-747442)

Y - Grey, 6 AWG (C10-638974)

* Default option – no suffix needed.

Input plug with wire: Amphenol # CR-302001-257

2.

The PET2000-12-074xD DC/DC power supply is a fully DSP controlled, highly efficient front-end power supply. It incorporates state-

of-the art technology and uses an interleaved forward converter topology with active clamp and synchronous rectification to reduce

component stresses, thus providing increased system reliability and very high efficiency.

With a wide input DC voltage range the PET2000-12-074xD maximizes power availability in demanding server, network, and other

high availability applications. The supply is fan cooled and ideally suited for integration with a matching airflow path.

An active OR-ing device on the output ensures no reverse load current and renders the supply ideally suited for operation in

redundant power systems.

The always-on standby output provides power to external power distribution and management controllers. It is protected with an

active OR-ing device for maximum reliability.

Status information is provided with a front-panel LED. In addition, the power supply can be controlled and the fan speed set via the

I2C bus. The I2C bus allows full monitoring of the supply, including input and output voltage, current, power, and inside temperatures.

Cooling is managed by a fan controlled by the DSP controller. The fan speed is adjusted automatically depending on the actual

power demand and supply temperature and can be overridden through the I2C bus.

Figure 1. Block Diagram

PET2000-12-074xD

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3.

Stresses in excess of the absolute maximum ratings may cause performance degradation, adversely affect long-term reliability and

cause permanent damage to the supply.

PARAMETER

CONDITIONS / DESCRIPTION

MIN

MAX

UNITS

Vi max

Maximum Input Voltage

Continuous

72

VDC

4.

General Condition: TA = 0…40 °C (PET2000-12-074RD), TA = 0…55 °C (PET2000-12-074ND), unless otherwise noted.

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

Vi start

Minimum Operating Input

Voltage

Stand-by output available, DSP running

32

VDC

Vi nom

Nominal Input Voltage

53

VDC

Vi

Input Voltage

Normal operation (from Vi min to Vi max)

40

72

VDC

Ii

Input Current

Vi > Vi min

A

Ii pk

Inrush Current Limitation

From Vi min to Vi max, TA = 25°C, turn on

40

55

A

Vi on

Turn-On Standby Input

Voltage

Ramping up

30

VDC

Vi on

Turn-On Input Voltage

Ramping up

41

42

VDC

Vi off

Turn-Off Input Voltage

Ramping down

38.0

39.5

VDC

η

Efficiency

Vi = -53 VDC; 20% load

93

%

Vi = -53 VDC; 50% load

95

%

Vi = -53 VDC; 100% load

93

%

Thold_V1

Hold-Up Time V1

167 A on I1, 2.5 A on Vsb with 2,200 µF of Load

capacitance

5

6

ms

Thold_sb

Hold-Up Time Vsb

167 A on I1, 2.5 A on Vsb with 2,200 µF of Load

capacitance

10

18

ms

4.1 INPUT FUSE

A fast-acting 80 A input fuse in the negative voltage path inside the power supply protect against severe defects.

The fuse is not accessible from the outside and are therefore not serviceable parts.

4.2 INRUSH CURRENT

Internal bulk capacitors will be charged through resistors connected from bulk cap minus pin to the DC rail minus, thus limiting

the inrush current. After the inrush phase, NTC resistors are then shorted with MOSFETs connected in parallel. The Inrush

control is managed by the digital controller (DSP).

4.3 INPUT UNDER-VOLTAGE

If the value of input DC voltage stays below the input under voltage lockout threshold Vi on, the supply will be inhibited.

Once the input voltage returns within the normal operating range, the supply will return to normal operation again. If the input

voltage stays below the input undervoltage lockout threshold Vi on, the supply will be inhibited. Once the input voltage returns

within the normal operating range, the supply will return to normal operation again.

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5.

General Condition: TA = 0…40 °C (PET2000-12-074RD), TA = 0…55 °C (PET2000-12-074ND), unless otherwise noted.

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

Main Output V1

V1 nom

Nominal Output Voltage

0.5 ∙

I1 nom

,

TA

= 25°C

12.0

VDC

V1 set

Output Setpoint Accuracy

-0.5

+0.5

%V

1 nom

dV1 tot

Total Static Regulation

Vi min

to

Vi max

, 0 to 100%

I1 nom, TA

= 0 to 40°C

-5

+5

%V

1 nom

P1 nom

Nominal Output Power 1

Vi min

to

Vi max

,

TA

= 0 to 55°C (PET2000-12-074ND)

Vi min

to

Vi max

,,

TA

= 0 to 40°C (PET2000-12-074RD)

2000

W

I1 nom

Output Current

Vi min

to

Vi max

,,

TA

= 0 to 55°C (PET2000-12-074ND)

Vi min

to

Vi max

,,

TA

= 0 to 40°C (PET2000-12-074RD)

0.0

167

ADC

I1 peak

Peak Output Current

Vi min

to

Vi max

,

0.0

175.3

ADC

V1 pp

Output Ripple Voltage 2

Vi min

to

Vi max

, 0 to 100%

I1 nom

,

Cext

≥ 1 mF/Low ESR

120

mVpp

dV1 load

Load Regulation

Vi nom

, 0 to 100%

I1 nom

-160

mV

dV1 line

Line Regulation

Vi min

to

Vi max

, 0.5 ∙

I1 nom

-20

0

20

mV

dV1 temp

Thermal Drift

Vi nom HL

, 0.5 ∙

I1 nom

-0.5

mV/°C

dI1 share

Current Sharing

Deviation from

I

1 tot / N,

I

1 > 10%

-4

+4

ADC

VISHARE

Current Share Bus Voltage

I1 peak

at 180 A

9.4

VDC

dV1 lt

Load Transient Response

Δ

I

1 = 40%

I

1 nom,

I

1 = 10 … 100%

I

1 nom,

Cext

= 0 mF,

d

I

1/d

t

= 1A/μs, recovery within 1% of

V

1 nom

0.6

VDC

trec

Recovery Time

0.5

1

ms

V1 dyn

Dynamic Load Regulation

Δ

I

1 = 40%

I

1 nom, starting anywere from 10% to 60%,

f

= 50 ... 5000 Hz, Duty cycle = 10 ... 90%,

Cext

= 2 ...30mF, di/dt =1A/µs, 25°C

11.4

12.6

V

tV1 on delay

Delay time from DC applied

V1 in regulation Vi = 0V to

Vi min

,

Vi nom, Vi max

3

sec

tV1 rise

Output Voltage Rise Time

V

1 = 10…90%

V

1 nom,

Cext

< 10 mF

10

200

ms

tV1 ovr sh

Output Turn-on Overshoot

Vi nom

, 0 to 100%

I1 nom

13.2

V

dV1 sense

Remote Sense

Compensation for cable drop, 0 to 100%

I1 nom

0.25

V

CV1 load

Capacitive Loading

0

20

mF

OVP

Over voltage Trip

Vi min

to

Vi max

,

13.6

15.0

V

Standby Output VSB

VSB nom

Nominal Output Voltage

ISB =1.25A (50% of

I

SBnom

, 25°C, (PET2000-12-074ND))

ISB =1.50A (50% of

I

SBnom

, 25°C, (PET2000-12-074RD))

12.0

VDC

VSB set

Output Setpoint Accuracy

-2

+2

%V

SBnom

dVSB tot

Total Regulation

Vi min

to

Vi max

, 0 to 100%

ISB nom

-5

+5

%V

SBnom

PSB nom

Nominal Output Power

Vi min

to

Vi max

,

TA

= 0 to 75°C (PET2000-12-074ND)

Vi min

to

Vi max

,

TA

= 0 to 55°C (PET2000-12-074RD)

30

36

W

PSB peak

Peak Output Power

Vi min

to

Vi max

(PET2000-12-074ND)

Vi min

to

Vi max

(PET2000-12-074RD)

34

40

W

ISB nom

Output Current

Vi min

to

Vi max

,

TA

= 0 to 75°C (PET2000-12-074ND)

Vi min

to

Vi max

,

TA

= 0 to 55°C (PET2000-12-074RD)

0

2.5

3.0

ADC

ISB peak

Peak Output Current

Vi min

to

Vi max

(PET2000-12-074ND)

Vi min

to

Vi max

(PET2000-12-074RD)

2.85

3.4

3.8

3.5

4.5

5

ADC

VSB pp

Output Ripple Voltage 2

Vi min

to

Vi max

, 0 to 100%

ISB nom

,

Cext

= 0 mF

150

mVpp

Vi min

to

Vi max

, 0 to 100%

ISB nom

,

Cext

≥ 2 mF/Low ESR

120

mVpp

dVSB load

Load Regulation

Vi nom HL

, 0 to 100%

ISB nom

-300

mV

dVSB line

Line Regulation

Vi min

to

Vi max

,

ISB nom = 0 A

-20

4

20

mV

dVSB temp

Thermal Drift

Vi nom HL

,

ISB nom = 0 A

-0.5

mV/°C

dISB share

Current Sharing

Deviation from

I

SB tot / N,

I

SB = 0.5 ∙

ISB nom

-1

+1

ADC

1

See also chapter TEMPERATURE AND FAN CONTROL

2

Measured with a 10 µF low ESR capacitor in parallel with a 0.1 µF ceramic capacitor at the point of measurement

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dVSB lt

Load Transient Response

Δ

I

SB = 50%

I

SB nom,

I

SB = 0 … 100%

I

SB nom,

d

I

SB/d

t

= 1A/µs, recovery within 1% of

V

SB nom

0.2

0.3

VDC

trec

Recovery Time

1

2

ms

VSB dyn

Dynamic Load Regulation

Δ

I

SB = 1 A,

I

SB = 0 …

ISB nom

,

f

= 50 ... 5000 Hz,

Duty cycle = 10 ... 90%,

Cext

= 0 ... 5 mF

10.8

13.2

V

tVSB rise

Output Voltage Rise Time

V

SB = 10…90%

V

SB nom,

Cext

< 1 mF

5

10

20

ms

tVSB ovr sh

Output Turn-on Overshoot

Vi nom

, 0 to 100%

ISB nom

13.2

V

CVSB load

Capacitive Loading

0

3000

µF

6.

Figure 2. Efficiency vs. Output Power

7.

The output return path serves as power and signal ground. All output voltages and signals are referenced to these pins.

To prevent a shift in signal and voltage levels due to ground wiring voltage drop a low impedance ground plane should be used as

shown in

Figure 3

. Alternatively, separated ground signals can be used as shown in

Figure 4

. In this case the two ground planes

should be connected together at the power supplies ground pins.

Figure 3. Common low impedance ground plane

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PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

F

Input Fuse (L)

Not use accessible, fast acting

80

A

V1 OV

OV Threshold

V1

Over Voltage

V1

Protection, Latch-off Type

13.6

14.3

14.5

VDC

tV1 OV

OV Trip Time

V1

1

ms

VVSB OV

OV Threshold

VSB

Over Voltage

V1

Protection, Automatic retry each 1s

13.6

14.3

14.5

VDC

tVSB OV

OV Trip Time

VSB

1

ms

IV1 OC Slow

OC Limit

V1

Over Current Limitation, Latch-off,

Vi min

to

Vi max

169

175

ADC

Over Current Limitation, Latch-off time

20

s

IV1 OC Fast

Fast OC Limit

V1

Fast Over Current Limit. Latch-off,

Vi min

to

Vi max

176

ADC

tV1 OC Fast

Fast OC Trip time

V1

Fast Over Current Limitation, Latch-off time

50

60

ms

I

V1 SC

Max Short Circuit Current

V

1

V

1 < 3 V, time until

I

V1 is limited to <

I

V1 sc

180

A

t

V1 SC

Short Circuit Regulation Time

Over Current Limitation, Constant-Current Type

2

ms

IVSB OC

OC Limit

VSB

Over Current Limit., time until

I

VSB is limited to

I

VSB OC

6

A

tVSB OC

OC Trip time

VSB

Automatic shut-down

1

ms

TSD

Over Temperature on Heat Sinks

115

°C

OVP

Over voltage trip

Vi min

to

Vi max

13.6

15.0

V

Figure 4. Separated power and signal ground

Due the unit has no Input Earth Connector Terminal on the front of the unit it is mandatory to have a reliable system output

GND to Earth connection.

Figure 5. Block diagram with reliable System Earth connection

8.

General Condition: TA = 0…40 °C (PET2000-12-074RD), TA = 0…55 °C (PET2000-12-074ND), unless otherwise noted.

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9.

The power supply operating parameters can be accessed through I2C interface. For more details refer to chapter I2C / POWER

MANAGEMENT BUS COMMUNICATION and document URP.00234 (PET2000-12-074 Power Management Bus Communication

Manual).

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

Vi mon

Input Voltage

Vi min LL

≤

Vi

≤

Vi max

-2

+2

VDC

Ii mon

Input Current

Ii

> 5.8 A

-10

+10

%

Pi mon

True Input Power

Pi

> 250 W

-10

+10

%

V1 mon

V1

Voltage

-0.2

+0.2

VDC

I1 mon

V1

Current

I1

> 50A

-2

+2

%

5 A <

I1

≤ 50 A

-0.5

+0.5

ADC

P1 nom

V1

Output Power

Pi

> 1000 W

-3

+3

%

50 W <

Pi

≤ 1000 W

-10

+10

W

VSB mon

VSB

Voltage

-0.2

+0.2

VDC

ISB mon

VSB

Current

-0.2

+0.2

ADC

TA mon

Inlet Temperature

TA min

≤ T

A

≤

TA max

-5

2

+5

°C

8.1 OVERVOLTAGE PROTECTION

The PET2000-12-074xD front-end provides a fixed threshold overvoltage (OV) protection implemented with a HW comparator

for both the main and the standby output. Once an OV condition has been triggered on the main output, the supply will shut

down and latch the fault condition. The latch can be unlocked by disconnecting the supply from the DC supply or by toggling

the PSON_L input. The standby output will continuously try to restart with a 1 s interval after OV condition has occurred.

8.2 UNDERVOLTAGE DETECTION

Both main and standby outputs are monitored. LED and PWOK_H pin signal if the output voltage exceeds ±5% of its nominal

voltage.

The main output will latch off if the main output voltage

V1

falls below 10 V (typically in an overload condition) for more than

55 ms. The latch can be unlocked by disconnecting the supply from the DC supply or by toggling the PSON_L input.

If the standby output leaves its regulation bandwidth for more than 2 ms then the main output is disabled to protect the system.

8.3 CURRENT LIMITATION

MAIN OUTPUT

The main output exhibits a substantially rectangular output characteristic controlled by a software feedback loop. If output

current exceeds

IV1 OC Fast

it will reduce output voltage in order to keep output current at

IV1 OC Fast

. If the output voltage drops

below ~10.0 VDC for more than 55 ms, the output will latch off (standby remains on).

The latch can be unlocked by disconnecting the supply from the DC mains or by toggling the PSON_L input. The main output

current limitation thresholds depend on the actual input applied to the power supply.

STANDBY OUTPUT

The standby output exhibits a substantially rectangular output characteristic down to 0 V (no hiccup mode / latch off).

The current limitation of the standby output is independent of the DC input voltage.

Running in current limitation causes the output voltage to fall, this will trigger under voltage protection and disables the

main output.

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PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

PSON_H / HOTSTANDBYEN_H

VIL

Input Low Level Voltage

PSON_L: Main output enabled

-0.2

0.8

V

HOTSTANDBYEN_H: Hot Standby mode

not allowed

VIH

Input High Level Voltage

PSON_L: Main output disabled

2

3.5

V

HOTSTANDBYEN_H: Hot Standby mode

allowed

IIL,H

Maximum Input Sink or Source Current

VI

= -0.2 V to +3.5 V

-1

1

mA

Rpull up

Internal Pull up Resistor to internal 3.3 V

10

kΩ

RLOW

Maximum external Pull down Resistance

to GND to obtain Low Level

1

kΩ

RHIGH

Minimum external Pull down Resistance

to GND to obtain High Level

50

kΩ

PWOK_H

VOL

Output Low Level Voltage

V1

or

VSB

out of regulation,

VIsink

< 4 mA

0

0.4

V

VOH

Output High Level Voltage

V1

and

VSB

in regulation

, Isource

< 0.5 mA

2.4

3.5

V

Rpull up

Internal Pull up Resistor to internal 3.3 V

1

kΩ

IOL

Maximum Sink Current

VO

< 0.4 V

4

mA

10.

10.1 ELECTRICAL CHARACTERISTICS

10.2 SENSE INPUTS

The main output has sense lines implemented to compensate for voltage drop on load wires in both positive and negative

path. The maximum allowed voltage drop is 200 mV on the positive rail and 100 mV on the GND rail.

With open sense inputs the main output voltage will rise by 270 mV. Therefore, if not used, these inputs should be connected

to the power output and GND at the power supply connector. The sense inputs are protected against short circuit. In this case

the power supply will shut down.

10.3 CURRENT SHARE

The PET front-ends have an active current share scheme implemented for V1. All the ISHARE current share pins need to be

interconnected in order to activate the sharing function. If a supply has an internal fault or is not turned on, it will disconnect

its ISHARE pin from the share bus. This will prevent dragging the output down (or up) in such cases.

The current share function uses an analog bus to transmit and receive current share information. The controller implements a

Master/Slave current share function. The power supply providing the largest current among the group is automatically the

Master. The other supplies will operate as Slaves and increase their output current to a value close to the Master by slightly

increasing their output voltage. The voltage increase is limited to +250 mV.

The standby output uses a passive current share method (droop output voltage characteristic).

10.4 PSON_L INPUT

The PSON_L is an internally pulled-up (3.3 V) input signal to enable/disable the main output V1 of the front-end.

With low level input the main output is enabled. This active-low pin is also used to clear any latched fault condition.

The PSON_L can be either controlled by an open collector device or by a voltage source.

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PSU 1 PDU

PSU 2

3.3V

PSU 1 PDU

PSU 2

3.3V

PSON_L

Figure 6. PSON_L connection

10.5 PWOK_H OUTPUT

The PWOK_H is an open drain output with an internal pull-up to 3.3 V indicating whether both VSB and V1 outputs are within

regulation. This pin is active-low.

PSU 1 PDU

PSU 2

3.3V

PWOK_H

3.3V

PWOK_H

PSU PDU

3.3V

PWOK_H

>10kΩ

PSU PDU

3.3V

PWOK_H ≥1kΩ

3.3V

PSU 1 PDU

PSU 2

3.3V

PWOK_H

3.3V

PWOK_H ≥1kΩ

3.3V

Figure 7. PWOK_H connection

10.6 PRESENT_L OUTPUT

The PRESENT_L pin is wired through a 100 Ohms resistor to internal GND within the power supply. This pin does indicate that

there is a power supply present in this system slot. An external pull-up resistor has to be added within the application. Current

into PRESENT_L should not exceed 5mA to guarantee a low level voltage if power supply is seated.

PSU PDU

PRESENT_L

100Ω

Vext

Figure 8. PRESENT_L connection

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PARAMETER

DESCRIPTION /

CONDITION

MIN

NOM

MAX

UNIT

TDC VSB

DC Line to 90%

VSB

3

s

tAC V1

DC Line to 90%

V1

PSON_L = Low

5 3

s

tVSB V1 del

VSB

to

V1

delay

PSON_L = Low

50

1000

ms

tV1 rise

V1

rise time

See chapter OUTPUT

tVSB rise

VSB

rise time

See chapter OUTPUT

TDC drop1

DC drop from Vi = 48 VDC, without

V1

leaving

regulation

I1 nom

,

ISB nom

5

5.5

ms

TDC drop2

DC drop without

VSB

leaving regulation

I1 nom

,

ISB nom

10

ms

tV1 holdup

Loss of DC to

V1

leaving regulation

See chapter INPUT

5

6

ms

tVSB holdup

Loss of DC to

V1

leaving regulation

See chapter INPUT

6

12

ms

tPWOK_H del

Outputs in regulation to PWOK_H asserted

5

400

ms

tPWOK_H warn

Warning time from de-assertion of PWOK_H to

V1

leaving regulation

0.15

ms

tPWOK_H holdup

Loss of DC to PWOK_H de-asserted

2

ms

tPWOK_H low

Time PWOK_H is kept low after being de-asserted

100

ms

tPSON_L V1 on

Delay PSON_L active to

V1

in regulation

5

400

ms

tPSON_L V1 off

Delay PSON_L de-asserted to

V1

disabled

TBD

ms

tPSON_L PWOK_H

Delay PSON_L de-asserted to PWOK_H de-asserted

4

ms

tV1 off

Time

V1

is kept off after leaving regulation

1

s

tVSB off

Time

VSB

is kept off after leaving regulation

1

s

3

At repeated ON-OFF cycles the start-up times can be increased by 1 s

10.7 SIGNAL TIMING

Figure 9. DC turn-on timing

Figure 10. DC short dips

Figure 11. DC long dips

Figure 12. PSON_L turn-on/off timing

VSB

V1

tDC VSB tVSB rise

tV1 rise

tDC V1

tPWOK_H del

tVSB V1 del

PSON_L

PWOK_H

DC

Input

DC

Input

VSB

V1

tV1 holdup

tV1 off

tPWOK_H warn

tDC drop1

tDC drop2

PSON_L

PWOK_H tPWOK_H holdup

DC

Input

VSB

V1

tVSB holdup

tV1 holdup

tV1 off

tVSB off

tPWOK_H warn

PSON_L

PWOK_H

tPWOK_H holdup

VSB

DC

Input

V1

PSON_L

PWOK_H

tPSON_L V1 on

tV1 rise

tPWOK_H del

tPSON_L PWOK_H

tPWOK_H warn

tPSON V1 off

tV1 off

tPWOK_H low

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OPERATING CONDITION 4

LED SIGNALING

No Vi or DC Line in UV condition,

VSB

not present from paralleled power supplies

Off

PSON_L High

Blinking Green 1 Hz

No DC or ADC Line in UV condition,

VSB

present from paralleled power supplies

Solid Amber

V

1 or

V

SB out of regulation

Over temperature shutdown

Output over voltage shutdown (

V

1 or

V

SB)

Output over current shutdown (

V

1 or

V

SB)

Fan error (>15%)

Over temperature warning

Blinking Amber 1 Hz

Minor fan regulation error (>5%, <15%)

Firmware boot loading in process

Blinking Green 2 Hz

Outputs V1 and VSB in regulation

Solid Green

Table 1. LED Status

4

The order of the criteria in the table corresponds to the testing precedence in the controller

10.8 LED INDICATOR

The front-end has one front LED showing the status of the supply. The LED is bi-colored: green and amber, and indicates

DC input and DC output power presence and warning or fault conditions.

Table 1

below lists the different LED status.

12

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PARAMETER

DESCRIPTION

CONDITION

MIN

MAX

UNIT

SCL / SDA

V

iL

Input low voltage

-0.5

1.0

V

iH

Input high voltage

2.3

3.5

V

hys

Input hysteresis

0.15

V

oL

Output low voltage

3 mA sink current

0

0.4

V

t

r

Rise time for SDA and SCL

20+0.1Cb1

300

ns

t

of

Output fall time ViHmin → ViLmax

10 pF < Cb1 < 400 pF

20+0.1Cb1

250

ns

I

i

Input current SCL/SDA

0.1 VDD < Vi < 0.9 VDD

-10

10

μA

C

i

Internal Capacitance for each SCL/SDA

50

pF

f

SCL

SCL clock frequency

0

100

kHz

R

pull-up

External pull-up resistor

fSCL ≤ 100 kHz

1000 ns / Cb1

Ω

t

HDSTA

Hold time (repeated) START

fSCL ≤ 100 kHz

4.0

μs

t

LOW

Low period of the SCL clock

fSCL ≤ 100 kHz

4.7

μs

t

HIGH

High period of the SCL clock

fSCL ≤ 100 kHz

4.0

μs

t

SUSTA

Setup time for a repeated START

fSCL ≤ 100 kHz

4.7

μs

t

HDDAT

Data hold time

fSCL ≤ 100 kHz

0

3.45

μs

t

SUDAT

Data setup time

fSCL ≤ 100 kHz

250

ns

t

SUSTO

Setup time for STOP condition

fSCL ≤ 100 kHz

4.0

μs

t

BUF

Bus free time between STOP and START

fSCL ≤ 100 kHz

5

ms

1 Cb = Capacitance of bus line in pF, typically in the range of 10…400 pF

Table 2. I2C / SMBus Specification

Figure 14. I2C / SMBus Timing

tr

tLOW

tHIGH

tLOW

tHDSTA

tSUSTA tHDDAT tSUDAT tSUSTO tBUF

tof

SDA

SCL

11.

The PET front-end is a communication Slave device only; it never initiates messages on the I2C/SMBus by itself. The

communication bus voltage and timing is defined in

Table 2

and further characterized through:

• The SDA/SCL IOs use 3.3 V logic levels

• External pull-up resistors on SDA/SCL required for correct

signal edges

• Full SMBus clock speed of 100 kbps

• Clock stretching limited to 1 ms

• SCL low time-out of >25 ms with recovery within 10 ms

• Recognizes any time Start/Stop bus conditions

3.3/5V

Rpull-up

TX

RX

SDA/SCL

3.3V

10kΩ

DSP or EEPROM

TX_EN

Figure 13. Physical Layer of Communication Interface

Communication to the DSP or the EEPROM will be possible as long as the input DC voltage is provided. If no DC is present,

communication to the unit is possible as long as it is connected to a life VSB output (provided e.g. by the redundant unit).

If only V1 is provided, communication is not possible.

PET2000-12-074xD

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ADDRESS SELECTION

The address for I2C communication can be configured by pulling address input pins A1 and A0 either to GND (Logic Low) or

leave them open (Logic High). An internal pull up resistor will cause the A0/A1 and A3 pin to be in High Level if left open.

A fixed addressing offset exists between the Controller and the EEPROM.

A2 2)

A1

A0

I2C Address 1)

Controller

EEPROM

0

0xB0

0xA0

0

1

0xB2

0xA2

0

1

0

0xB4

0xA4

0

1

0xB6

0xA6

1

0

0xB8

0xA8

1

0

1

0xBA

0xAA

1

0

0xBC

0xAC

1

0xBE

0xAE

1) The LSB of the address byte is the R/W bit.

2) A2 is used on the standard model only.

On special models (e.g. PET2000-12-074ND020) the connector PIN is used for IN_OK functionality.

These models have only two addressing pins A0 and A1. A2 is set to 0 inside firmware by default.

Table 3. Address and Protocol Encoding

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

SMB_ALERT_L

Vext

Maximum External Pull up Voltage

12

V

IOH

Maximum High Level Leakage Current

No Failure or Warning condition,

VO

= 12 V

10

µA

VOL

Output Low Level Voltage

Failure or Warning condition,

Isink

< 4 mA

0

0.4

V

Rpull up

Internal Pull up Resistor to internal 3.3 V

None

IOL

Maximum Sink Current

VO

< 0.4 V

4

mA

PSU 1 PDU

PSU 2

SMB-

ALERT_L ≥1kΩ

3.3V

SMB-

ALERT_L

Figure 15. SMBALERT_L connection

11.1 SMBALERT_L OUTPUT

The SMBALERT_L signal indicates that the power supply is experiencing a problem that the system agent should investigate.

This is a logical OR of the Shutdown and Warning events. It is asserted (pulled Low) at Shutdown or Warning events such as

reaching temperature warning/shutdown threshold of critical component, general failure, over-current, over-voltage, under-

voltage or low-speed of failed fan. This signal may also indicate the power supply is operating in an environment exceeding

the specified limits.

The SMBAlert signal is asserted simultaneously with the LED turning to solid amber or blinking amber.

14

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11.2 CONTROLLER AND EEPROM ACCESS

The controller and the EEPROM in the power supply share the same I2C bus physical layer (see

Figure 16

) and can be

accessed under different addresses, see ADDRESS SELECTION. The SDA/SCL lines are connected directly to the controller

and EEPROM which are supplied by internal 3.3 V.

The EEPROM provides 256 bytes of user memory. None of the bytes are used for the operation of the power supply.

DSP

EEPROM

SDA

SCL

A2..0

Protection

Address Selection

Figure 16. I2C Bus to DSP and EEPROM

11.3 EEPROM PROTOCOL

The EEPROM follows the industry communication protocols used for this type of device. Even though page write / read

commands are defined, it is recommended to use the single byte write / read commands.

WRITE

The write command follows the “SMBus 1.1 Write Byte Protocol”. After the device address with the write bit cleared, the Two

Byte Data Address is sent followed by the data byte and the STOP condition. A new START condition on the bus should only

occur after 5ms of the last STOP condition to allow the EEPROM to write the data into its memory.

READ

The read command follows the “SMBus 1.1 Read Byte Protocol”. After the device address with the write bit cleared the two

byte data address is sent followed by a repeated start, the device address and the read bit set. The EEPROM will respond with

the data byte at the specified location.

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11.4 POWER MANAGEMENT BUS PROTOCOL

The Power Management Bus is an open standard protocol that defines means of communicating with power conversion and

other devices. For more information, please see the System Management Interface Forum web site at: www.powerSIG.org.

Power Management Bus command codes are not register addresses. They describe a specific command to be executed.

The PET2000-12-074ND supply supports the following basic command structures:

• Clock stretching limited to 1 ms

• SCL low time-out of >25 ms with recovery within 10 ms

• Recognized any time Start/Stop bus conditions

WRITE

The write protocol is the SMBus 1.1 Write Byte/Word protocol. Note that the write protocol may end after the command byte

or after the first data byte (Byte command) or then after sending 2 data bytes (Word command).

In addition, Block write commands are supported with a total maximum length of 255 bytes. See PET2000-12-074NA /

PET2000-12-074ND Power Management Bus Communication Manual URP.00234 for further information.

READ

The read protocol is the SMBus 1.1 Read Byte/Word protocol. Note that the read protocol may request a single byte or word.

In addition, Block read commands are supported with a total maximum length of 255 bytes.

See PET2000-12-074NA/ PET2000-12-074ND Power Management Bus Communication Manual URP.00234 for further

information.

S Address W A Command A

Data Low Byte1) A Data High Byte1) A P

1) Optional

S Address W A Command A

Byte 1 A Byte N A P

Byte Count A

S Address W A Command A

Data (Low) Byte AS Address R A Data High Byte1) nA P

1) Optional

S Address W A Command A

Byte 1 A

S Address R A

Byte N nA PByte Count A

16

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11.5 GRAPHICAL USER INTERFACE

The Bel Power Solutions provides with its “I2C Utility” a Windows® XP/Vista/Win7 compatible graphical user interface allowing

the programming and monitoring of the PET2000-12-074xD Front-End. The utility can be downloaded on:

www.belpowersolution.com and supports both the PSMI and Power Management Bus protocols.

The GUI allows automatic discovery of the units connected to the communication bus and will show them in the navigation

tree. In the monitoring view the power supply can be controlled and monitored.

If the GUI is used in conjunction with the YTM.00046 Evaluation Board it is also possible to control the PSON_L pin(s) of the

power supply.

Further there is a button to disable the internal fan for approximately 10 seconds. This allows the user to take input power

measurements without fan consumptions to check efficiency compliance to the Climate Saver Computing Platinum

specification.

The monitoring screen also allows to enable the hot-standby mode on the power supply. The mode status is monitored and

by changing the load current it can be monitored when the power supply is being disabled for further energy savings.

This obviously requires 2 power supplies being operated as a redundant system (as in the evaluation kit).

NOTE: The user of the GUI needs to ensure that only one of the power supplies have the hot-standby mode enabled.

Figure 17. Monitoring dialog of the I2C Utility

12.

To achieve best cooling results sufficient airflow through the supply must be ensured. Do not block or obstruct the airflow at the

rear of the supply by placing large objects directly at the output connector. The PET2000-12-074ND is provided with a rear to front

airflow, which means the air enters through the DC-output of the supply and leaves at the DC-inlet. The PET2000-12-074RD is

provided with a front to rear airflow, which means the air enters through the DC-input of the supply and leaves at the DC-output.

The PET2000-12-074xD power supply has been designed for horizontal operation.

PET2000-12-074xD

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Figure 18. Airflow direction PET2000-12-074ND

Figure 19. Airflow direction PET2000-12-074RD

The fan inside of the supply is controlled by a microprocessor. The rpm of the fan is adjusted to ensure optimal supply cooling and

is a function of output power and the inlet temperature.

Figure 20

illustrates the programmed fan curves.

Figure 20. Fan speed vs. main output load

The PET2000-12-074ND provides access via I2C to the measured temperatures of sensors within the power supply, see

Table 4

.

The microprocessor is monitoring these temperatures and if warning threshold of one of these sensors is reached it will set fan to

maximum speed. If temperatures continue to rise above shut down threshold the main output

V1

(or

VSB

if auxiliary converter is

affected) will be disabled. At the same time, the warning or fault condition is signalized accordingly through LED, PWOK_H and

SMBALERT_L.

TEMPERATURE SENSOR

DESCRIPTION / CONDITION

POWER

MANAGEMENT

BUS REGISTER

WARNING

THRESHOLD

SHUT DOWN

THRESHOLD

Inlet Air Temperature

PET2000-12-074ND

Sensor located on control board close to DC end

of power supply (card edge connector)

PET2000-12-074RD

Sensor located next to the fan of power supply

Ox8D

77°C

67°C

80°C

70°C

Synchronous Rectifier

Sensor located on secondary side of DC/DC

stage

0xD6

95°C

105°C

Primary Heat Sink

Sensor located next to the heat sink

0x8E

95°C

105°C

Table 4. Temperature sensor location and thresholds

Airflow

18

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13.

For safety compliant operation the power supply needs to be operating inside the specified operating conditions.

The PET2000-12-074xD modules have different power derating behavior which are mainly dependent on the air flow direction and

the ambient conditions.

PET2000-12-074ND

Between 0°C and 55°C power supply is only depending on AC input altitude. Above 55°C the maximum output power is further reduced

with rising temperature.

Figure 21

illustrates these maximum current and power levels.

Figure 21. Maximum current and power levels PET2000-12-074ND

PET2000-12-074RD

Between 0°C and 40°C power supply is only depending on AC input altitude. Above 40°C the maximum output power is further

reduced with rising temperature.

Figure 22

illustrates these maximum current and power levels.

Figure 22. Maximum current and power levels PET2000-12-074RD

167

150

100

0

20

40

60

80

100

120

140

160

35 40 45 50 55 60

Main output current [A]

Ambient Temperature [°C]

PET2000-12-074RD

2000

1800

1200

0

200

400

600

800

1000

1200

1400

1600

1800

2000

30 35 40 45 50 55 60

Main output power [W]

Ambient Temperature [°C]

PET2000-12-074RD

PET2000-12-074xD

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PARAMETER

DESCRIPTION / CONDITION

CRITERION

ESD Contact Discharge

IEC / EN 61000-4-2, ±8 kV, 25+25 discharges per test point (metallic case, LED,

connector body)

A

ESD Air Discharge

IEC / EN 61000-4-2, ±15 kV, 25+25 discharges per test point (non-metallic user

accessible surfaces)

A

Radiated Electromagnetics Filed

IEC / EN 61000-4-3, 10 V/m, 1 kHz/80% Amplitude Modulation, 1µs Pulse

Modulation, 10 kHz ... 2 GHz

A

Burst

IEC / EN 61000-4-4, Level 3

DC input port ±2 kV, 1 minute

A

Surge

IEC / EN 61000-4-5 ; NEBS GR-1089-CORE Issue 6

Common mode: ±1 kV (2 Ohm)

Differential mode : ±1 kV (2 Ohm)

A

RF Conducted Immunity

IEC / EN 61000-4-6, Level 3, 10 Vrms, CW, 0.1 … 80 MHz

A

PARAMETER

DESCRIPTION / CONDITION

CRITERION

Conducted Emission

EN 55022 / CISPR 22: 0.15 … 30 MHz, QP and AVG,

single power supply

Class A - 6 dB

Radiated Emission

EN 55022 / CISPR 22: 30 MHz … 1 GHz, QP,

single power supply

Class A - 6 dB

Acoustical Noise

Distance at bystander position, 25°C, 50% Load

65 dBA

PARAMETER

DESCRIPTION / CONDITION

NOTE

Agency Approvals

UL 60950-1 2nd Edition

CAN/CSA-C22.2 No. 60950-1-07 2nd Edition

IEC 60950-1: 2005

EN 62368-1: 2014

EN 60950-1: 2006

EN 62368-1: 2014

NEMKO

EAC

CQC

GB4943.1-2011

TR TC 004/2011

Approved

Isolation Strength

Input plus to chassis; 1414V for 1 minute

Basic

Input minus to chassis; 1414V for 1 minute

Basic

Output to chassis

None

(Direct connection)

Creepage / Clearance

Primary to chassis (PE)

>2 mm

Primary to secondary

14.

14.1 IMMUNITY

14.2 EMISSION

15.

Maximum electric strength testing is performed in the factory according to IEC/EN 60950, and UL 60950. Input-to-output electric

strength tests should not be repeated in the field. Bel Power Solutions will not honor any warranty claims resulting from electric

strength field tests.

20

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PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

TA

Ambient Temperature

Up to 1’000m ASL, PET2000-12-074ND

Up to 1’000m ASL, PET2000-12-074RD

-5

+55

+40

°C

Linear derating from 1’000 to 3’048 m ASL

PET2000-12-074ND

PET2000-12-074RD

+45

+30

°C

TAext

Extended Temp. Range

PET2000-12-074ND

PET2000-12-074RD

70

55

°C

TS

Storage Temperature

Non-operational

-20

+70

°C

Altitude

Operational, above Sea Level

-

3’048

m

Non-operational, above Sea Level

-

10’600

m

Shock, operational

Half sine, 11ms, 10 shocks per direction,

6 directions

1

g peak

Shock, non-operational

30

g peak

Vibration, sinusoidal, operational

IEC/EN 60068-2-6, sweep 5 to 500 to 5 Hz, 1

octave/min, 5 sweep per axis

1

g peak

Vibration, sinusoidal, non-operational

4

g peak

Vibration, random, operational

7.7grms 30min, 3 axes operational

7.7

Grms

Vibration, random, non-operational

IEC/EN 60068-2-64, 5 to 500 Hz, 1 hour per axis

0.025

g2/Hz

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

MTBF

Mean time to failure

According Bellcore TR-TSY-000332, Issue 3

TA

= 25°C,

Vi

= 48 VDC, 0.5 ∙

I1 nom

,

ISB nom

683

kh

Expected life time

TA

= 25°C,

Vi

= 48 VDC, 0.7 ∙

I1 nom

,

ISB nom

7

years

TA

= 55°C,

Vi

= 48 VDC,

I1 nom

,

ISB nom

2

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

Dimensions *

Width

73.5

mm

Heigth

40.0

mm

Depth

265.0

mm

m

Weight

1.2

kg

* Dimensions in mm, tolerances acc. ISO 2768 ()-H, unless otherwise stated: 0.5-30: ±0.2; 30-120: ±0.3; 120-400: ±0.5

16.

17.

18.

PET2000-12-074xD

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Figure 23. Top and side view with the connector added

V1

GND

I2C

VSB

Digital I/O

Analog I/O

Reserved

GND

P1

P36P19

P18

S1

S12

S13 S24

Mating connector,

soldered onto application

backplane

Power supply

rear view

Card edge PCB

within power supply

Application backplane,

top view

P1

P36

P11

P28

P18

P19

P10

P29

S12

S13

S1

S24

Figure 24. Front view

Figure 25. Rear view

A screw added on the PET2000-12-074xD side prevents the unit from being inserted into system with standard INTEL connector.

Systems using PET2000-12-074xD must have a slot of ø6 mm x 14 mm implemented to allow the unit to be inserted. The maximum

size of the screw head is ø6mm and height 2.12 mm.

22

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Figure 26. Polarizing screw

PARAMETER

DESCRIPTION / CONDITION

MIN

NOM

MAX

UNIT

DC inlet

Receptacle: Amphenol # C10-730138-000, 3.6 mm

Plug: Amphenol # C10-747100-000, for 6 AWG (black)

Amphenol # C10-638974-000, for 6 AWG (gray)

Amphenol # C10-747442-000, for 4 AWG (black)

Input wire harness (with black plug):

Amphenol # CR-302001-257

DC diameter requirement

Wire size

6

4

AWG

Output connector

25-Pin PCB card edge

Mating output connector

Manufacturer: FCI Electronics

Manufacturer P/N: 10130248-005LF

(see

Figure 27

for option x)

BEL P/N: ZES.00678

SIGNAL NAME

DESCRIPTION

P1 ~ P10

GND

Power and signal ground (return)

P29 ~ P36

GND

P11 ~ P18

V1

+12 VDC main output

P19 ~ P28

V1

S1

A0

I2C address selection input

S2

A1

S3, S4,

S21, S22

VSB

+12 V Standby positive output

S5

NC

Not used

S6

ISHARE

Analog current share bus

S7

Reserved

For future use, keep open circuit

S8

PRESENT_L

Power supply seated, active-low

S9

A2

or

IN_OK

I2C address selection input (on standard models)

or

Input voltage OK signal output, active-high (e.g. For PET2000-12-074ND0200)

S10 ~ S15

GND

Power and signal ground (return)

S16

PWOK_H

Power OK signal output, active-high

S17

V1_SENSE

Main output positive sense

S18

V1_SENSE_R

Main output negative sense

S19

SMB_ALERT_L

SMB Alert signal output, active-low

S20

PSON_L

Power supply on input, active-low

S23

SCL

I2C clock signal line

S24

SDA

I2C data signal line

Table 5. Output connector pin assignment

19.

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Figure 27. Mating connector drawing page 1

24

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Figure 28. Mating connector drawing page 2

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Figure 29. Mating connector drawing page 3

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ITEM

DESCRIPTION

ORDERING PART

NUMBER

SOURCE

I2C Utility

Windows XP/Vista/7 compatible GUI

to program, control and monitor

Front-End power supplies (and other

I2C units)

ZS-00130

belfuse.com/power-solutions

Evaluation Board

Connector board to operate

PET2000-12-074NA and

PET2000-12-074ND.

Includes an on-board USB to I2C

converter (use

I2C Utility

as desktop

software).

YTM.00046

belfuse.com/power-solutions

NUCLEAR AND MEDICAL APPLICATIONS - Products are not designed or intended for use as critical components in life support systems,

equipment used in hazardous environments, or nuclear control systems.

TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on

the date manufactured. Specifications are subject to change without notice.

20.