CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCT OBER 2001
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Function, Pinout, and Drive Compatible
With FCT and F Logic
D
Reduced VOH (Typically = 3.3 V) Versions
of Equivalent FCT Functions
D
Edge-Rate Control Circuitry for
Significantly Improved Noise
Characteristics
D
Ioff Supports Partial-Power-Down Mode
Operation
D
Matched Rise and Fall Times
D
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D
Fully Compatible With TTL Input and
Output Logic Levels
D
CY54FCT273T
– 32-mA Output Sink Current
– 12-mA Output Source Current
D
CY74FCT273T
– 64-mA Output Sink Current
– 32-mA Output Source Current
description
The ’FCT273T devices consist of eight
edge-triggered D-type flip-flops with individual
D inputs and Q outputs. The common
buffered-clock (CP) and master-reset (MR) inputs
load and reset all flip-flops simultaneously . These
devices are edge-triggered registers. The state of
each D input (one setup time before the
low-to-high clock transition) is transferred to the
corresponding flip-flop’s Q output. All outputs are
forced low by a low logic level on the MR input.
This device is fully specified for
partial-power-down applications using Ioff. The Ioff
circuitry disables the outputs, preventing
damaging current backflow through the device
when it is powered down.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
CY54FCT273T ...D PACKAGE
CY74FCT273T ...Q OR SO PACKAGE
(TOP VIEW)
CY54FCT273T . . . L PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3
GND
VCC
Q7
D7
D6
Q6
Q5
D5
D4
Q4
CP
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
D1
Q1
Q2
D2
D3
D
MR
3
GND
VCC
D7
D6
Q6
Q5
D5
Q
CP
4
Q
4
D
0
Q0
Q7
CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCTOBER 2001
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ORDERING INFORMATION
TAPACKAGE†SPEED
(ns) ORDERABLE
PART NUMBER TOP-SIDE
MARKING
QSOP – Q Tape and reel 5.8 CY74FCT273CTQCT FCT273C
SOIC SO
Tube 5.8 CY74FCT273CTSOC
FCT273C
SOIC
–
SO
Tape and reel 5.8 CY74FCT273CTSOCT
FCT273C
QSOP – Q Tape and reel 7.2 CY74FCT273ATQCT FCT273A
–40°C to 85°C
SOIC SO
Tube 7.2 CY74FCT273ATSOC
FCT273A
SOIC
–
SO
Tape and reel 7.2 CY74FCT273ATSOCT
FCT273A
QSOP – Q Tape and reel 13 CY74FCT273TQCT FCT273
SOIC SO
Tube 13 CY74FCT273TSOC
FCT273
SOIC
–
SO
Tape and reel 13 CY74FCT273TSOCT
FCT273
–55°C to 125°C LCC – L Tube 8.3 CY54FCT273ATLMB
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
FUNCTION TABLE
INPUTS OUTPUT OPERATING
MR CP D Q MODE
L X X L Reset (clear)
H↑h H Load ‘1’
H↑l L Load ‘0’
H = High logic level steady state, h = High logic level one
setup time prior to low-to-high clock transition, L = Low
logic level steady state, l = Low logic level one setup time
prior to the low-to-high transition, X = Don’t care,
↑ = Low-to-high clock transition
logic diagram (positive logic)
CP
D0
MR
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
R
C1
3 4 7 8 13 14 17 18
2 5 6 9 12 15 16 19
11
1
D1D2D3D4D5D6D7
Q0Q1Q2Q3Q4Q5Q6Q7
CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCTOBER 2001
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range to ground potential –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC input voltage range –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output voltage range –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output current (maximum sink current/pin) 120 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 1): Q package 68°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SO package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Ambient temperature range with power applied, TA –65°C to 135°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 2)
CY54FCT273T CY74FCT273T
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 4.5 5 5.5 4.75 5 5.25 V
VIH High-level input voltage 2 2 V
VIL Low-level input voltage 0.8 0.8 V
IOH High-level output current –12 –32 mA
IOL Low-level output current 32 64 mA
TAOperating free-air temperature –55 125 –40 85 °C
NOTE 2: All unused inputs of the device must be held at VCC or GND to ensure proper device operation.
CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCTOBER 2001
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
CY54FCT273T CY74FCT273T
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
VIK
VCC = 4.5 V, IIN = –18 mA –0.7 –1.2
V
V
IK VCC = 4.75 V, IIN = –18 mA –0.7 –1.2
V
VCC = 4.5 V, IOH = –12 mA 2.4 3.3
VOH
VCC 475V
IOH = –32 mA 2V
V
CC =
4
.
75
V
IOH = –15 mA 2.4 3.3
VOL
VCC = 4.5 V, IOL = 32 mA 0.3 0.55
V
V
OL VCC = 4.75 V, IOL = 64 mA 0.3 0.55
V
Vhys All inputs 0.2 0.2 V
II
VCC = 5.5 V, VIN = VCC 5
µA
I
IVCC = 5.25 V, VIN = VCC 5µ
A
IIH
VCC = 5.5 V, VIN = 2.7 V ±1
µA
I
IH VCC = 5.25 V, VIN = 2.7 V ±1µ
A
IIL
VCC = 5.5 V, VIN = 0.5 V ±1
µA
I
IL VCC = 5.25 V, VIN = 0.5 V ±1µ
A
Ioff VCC = 0 V, VOUT = 4.5 V ±1±1µA
IOS‡
VCC = 5.5 V, VOUT = 0 V –60 –120 –225
mA
I
OS
‡
VCC = 5.25 V, VOUT = 0 V –60 –120 –225
mA
ICC
VCC = 5.5 V, VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V 0.1 0.2
mA
I
CC VCC = 5.25 V, VIN ≤ 0.2 V, VIN ≥ VCC – 0.2 V 0.1 0.2
mA
∆ICC
VCC = 5.5 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2
mA
∆I
CC VCC = 5.25 V, VIN = 3.4 V§, f1 = 0, Outputs open 0.5 2
mA
†Typical values are at VCC = 5 V, TA = 25°C.
‡Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or
sample-and-hold techniques are preferable to minimize internal chip heating and more accurately reflect operational values. Otherwise, prolonged
shorting of a high output can raise the chip temperature well above normal and cause invalid readings in other parametric tests. In any sequence
of parameter tests, IOS tests should be performed last.
§Per TTL-driven input (VIN = 3.4 V); all other inputs at VCC or GND
CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCTOBER 2001
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted) (continued)
PARAMETER
TEST CONDITIONS
CY54FCT273T CY74FCT273T
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP†MAX MIN TYP†MAX
UNIT
ICCD
VCC = 5.5 V, Outputs open,
One bit switching at 50% duty cycle, MR = VCC,
VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 0.06 0.12 mA/
I
CCD
VCC = 5.25 V, Outputs open,
One bit switching at 50% duty cycle, MR = VCC,
VIN ≤ 0.2 V or VIN ≥ VCC – 0.2 V 0.06 0.12 MHz
#
VCC =55V
One bit switching
at f1 = 2.5 MHz VIN ≤0.2 V or
VIN ≥VCC – 0.2 V 0.7 1.4
#
VCC
=
5
.
5
V
,
f
0
= 10 MHz,
at 50% duty cycle VIN = 3.4 V or GND 1.2 3.4
#
0,
Outputs open,
MR = VCC Eight bits switching
at f1 = 2.5 MHz VIN ≤0.2 V or
VIN ≥VCC – 0.2 V 1.6 3.2||
IC#
at 50% duty cycle VIN = 3.4 V or GND 3.9 12.2||
mA
I
C
#
VCC = 5 25 V
One bit switching
at f1 = 5 MHz VIN ≤0.2 V or
VIN ≥VCC – 0.2 V 0.7 1.4
mA
VCC
=
5
.
25
V
,
f
0
= 10 MHz,
at 50% duty cycle VIN = 3.4 V or GND 1.2 3.4
0,
Outputs open,
MR = VCC Eight bits switching
at f1 = 5 MHz VIN ≤0.2 V or
VIN ≥VCC – 0.2 V 1.6 3.2||
at 50% duty cycle VIN = 3.4 V or GND 3.9 12.2||
Ci5 10 5 10 pF
Co9 12 9 12 pF
†Typical values are at VCC = 5 V, TA = 25°C.
This parameter is derived for use in total power-supply calculations.
#IC= ICC + ∆ICC × DH × NT + ICCD (f0/2 + f1 × N1)
Where:
IC= Total supply current
ICC = Power-supply current with CMOS input levels
∆ICC = Power-supply current for a TTL high input (VIN = 3.4 V)
DH= Duty cycle for TTL inputs high
NT= Number of TTL inputs at DH
ICCD = Dynamic current caused by an input transition pair (HLH or LHL)
f0= Clock frequency for registered devices, otherwise zero
f1= Input signal frequency
N1= Number of inputs changing at f1
All currents are in milliamperes and all frequencies are in megahertz.
|| Values for these conditions are examples of the ICC formula.
CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCTOBER 2001
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
CY74FCT273T CY54FCT273AT CY74FCT273AT CY74FCT273CT
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
UNIT
t
Pulse duration high or low
CP 6 6 6 6
ns
t
w
P
u
lse
d
u
ration
,
high
or
lo
wMR 6 6 6 6
ns
tsu Setup time, high or low D before CP↑2 2 2 2 ns
thHold time, high or low D after CP↑1.5 1.5 1.5 1.5 ns
trec Recovery time MR after CP↑2 2.5 2 2 ns
switching characteristics over operating free-air temperature range (see Figure 1)
PARAMETER
FROM TO CY74FCT273T CY54FCT273AT CY74FCT273AT CY74FCT273CT
UNIT
PARAMETER
(INPUT) (OUTPUT) MIN MAX MIN MAX MIN MAX MIN MAX
UNIT
tPLH
CP
Q
2 13 2 8.3 2 7.2 2 5.8
ns
tPHL
CP
Q
2 13 2 8.3 2 7.2 2 5.8
ns
tPLH
MR
Q
2 13 2 8.3 2 7.2 2 6.1
ns
tPHL
MR
Q
2 13 2 8.3 2 7.2 2 6.1
ns
CY54FCT273T, CY74FCT273T
8-BIT REGISTERS
SCCS020A – MARCH 1995 – REVISED OCTOBER 2001
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
3 V
3 V
0 V
0 V
th
tsu
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Data Input
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
3 V
0 V
Input
Out-of-Phase
Output
In-Phase
Output
Timing Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
Output
W aveform 1
(see Note B)
Output
W aveform 2
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
≈3.5 V
0 V
VOL + 0.3 V
≈0 V
3 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7 V
Open
TEST S1
3 V
0 V
tw
VOLTAGE WAVEFORMS
PULSE DURATION
Input
NOTES: A. CL includes probe and jig capacitance.
B. W aveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
W aveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. The outputs are measured one at a time with one input transition per measurement.
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR
3-STATE OUTPUTS
S1 7 V
500 ΩGND
From Output
Under Test
CL = 50 pF
(see Note A)
Test
Point
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
Open
VOH – 0.3 V
500 Ω
500 Ω
1.5 V1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
Figure 1. Load Circuit and Voltage Waveforms
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
5962-9221503M2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9221503M2A
CY54FCT
273ATLMB
5962-9221503MRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9221503MR
A
CY54FCT273ATLMB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962-
9221503M2A
CY54FCT
273ATLMB
CY74FCT273ATQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273A
CY74FCT273ATQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273A
CY74FCT273ATQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273A
CY74FCT273ATSOC ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273A
CY74FCT273ATSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273A
CY74FCT273ATSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273A
CY74FCT273ATSOCT ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273A
CY74FCT273ATSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273A
CY74FCT273ATSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273A
CY74FCT273CTQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273C
CY74FCT273CTQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273C
CY74FCT273CTQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273C
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 2
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
CY74FCT273CTSOC ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273C
CY74FCT273CTSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273C
CY74FCT273CTSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273C
CY74FCT273TQCT ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273
CY74FCT273TQCTE4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273
CY74FCT273TQCTG4 ACTIVE SSOP DBQ 20 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 FCT273
CY74FCT273TSOC ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273
CY74FCT273TSOCE4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273
CY74FCT273TSOCG4 ACTIVE SOIC DW 20 25 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273
CY74FCT273TSOCT ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273
CY74FCT273TSOCTE4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273
CY74FCT273TSOCTG4 ACTIVE SOIC DW 20 2000 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 FCT273
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 25-Sep-2013
Addendum-Page 3
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
CY74FCT273ATQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
CY74FCT273ATSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
CY74FCT273CTQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
CY74FCT273TQCT SSOP DBQ 20 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
CY74FCT273TSOCT SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
CY74FCT273ATQCT SSOP DBQ 20 2500 367.0 367.0 38.0
CY74FCT273ATSOCT SOIC DW 20 2000 367.0 367.0 45.0
CY74FCT273CTQCT SSOP DBQ 20 2500 367.0 367.0 38.0
CY74FCT273TQCT SSOP DBQ 20 2500 367.0 367.0 38.0
CY74FCT273TSOCT SOIC DW 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated