LMH6552MANOPB - NATIONAL SEMICONDUCTOR

LMH6551

LMH6551 Differential, High Speed Op Amp

Literature Number: SNOSAK7B

LMH6551

October 21, 2011

Differential, High Speed Op Amp

General Description

The LMH®6551 is a high performance voltage feedback dif-

ferential amplifier. The LMH6551 has the high speed and low

distortion necessary for driving high performance ADCs as

well as the current handling capability to drive signals over

balanced transmission lines like CAT 5 data cables. The

LMH6551 can handle a wide range of video and data formats.

With external gain set resistors, the LMH6551 can be used at

any desired gain. Gain flexibility coupled with high speed

makes the LMH6551 suitable for use as an IF amplifier in high

performance communications equipment.

The LMH6551 is available in the space saving SOIC and

MSOP packages.

Features

■370 MHz −3 dB bandwidth (VOUT = 0.5 VPP)

■50 MHz 0.1 dB bandwidth

■2400 V/µs slew Rate

■18 ns settling time to 0.05%

■−94/−96 dB HD2/HD3 @ 5 MHz

Applications

■Differential AD driver

■Video over twisted pair

■Differential line driver

■Single end to differential converter

■High speed differential signaling

■IF/RF amplifier

■SAW filter buffer/driver

Typical Application

Single Ended to Differential ADC Driver

20133241

LMH® is a registered trademark of National Semiconductor Corporation.

LMH6551 Differential, High Speed Op Amp

Connection Diagram

8-Pin SOIC & MSOP

20133208

Top View

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

8-Pin SOIC LMH6551MA LMH6551MA 95/Rails M08A

LMH6551MAX 2.5k Units Tape and Reel

8–Pin MSOP LMH6551MM AU1A 1k Units Tape and Reel MUA08A

LMH6551MMX 3.5k Units Tape and Reel

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LMH6551

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Tolerance (Note 5)

Human Body Model 2000V

Machine Model 200V

Supply Voltage 13.2V

Common Mode Input Voltage ±Vs

Maximum Input Current (pins 1, 2, 7,

8) 30mA

Maximum Output Current (pins 4, 5) (Note 3)

Maximum Junction Temperature 150°C

Soldering Information

See Product Folder at www.national.com and http://

www.national.com/ms/MS/MS-SOLDERING.pdf

Operating Ratings (Note 1)

Operating Temperature Range −40°C to +125°C

Storage Temperature Range −65°C to +150°C

Total Supply Voltage 3V to 12V

Package Thermal Resistance (θJA) (Note 4)

8-Pin MSOP 235°C/W

8-Pin SOIC 150°C/W

±5V Electrical Characteristics (Note 2)

Single ended in differential out, TA= 25°C, G = +1, VS = ±5V, VCM = 0V, RF = RG = 365Ω, RL = 500Ω;; Unless specified Bold-

face limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 8)

Typ

(Note 7)

Max

(Note 8)Units

AC Performance (Differential)

SSBW Small Signal −3 dB Bandwidth VOUT = 0.5 VPP 370 MHz

LSBW Large Signal −3 dB Bandwidth VOUT = 2 VPP 340 MHz

Large Signal −3 dB Bandwidth VOUT = 4 VPP 320 MHz

0.1 dB Bandwidth VOUT = 2 VPP 50 MHz

Slew Rate 4V Step(Note 6) 2400 V/μs

Rise/Fall Time 2V Step 1.8 ns

Settling Time 2V Step, 0.05% 18 ns

VCM Pin AC Performance (Common Mode Feedback Amplifier)

Common Mode Small Signal

Bandwidth

VCMbypass capacitor removed 200 MHz

Distortion and Noise Response

HD2 VO = 2 VPP, f = 5 MHz, RL=800Ω −94 dBc

HD2 VO = 2 VPP, f = 20MHz, RL=800Ω −85 dBc

HD3 VO = 2 VPP, f = 5 MHz, RL=800Ω −96 dBc

HD3 VO = 2 VPP, f = 20 MHz, RL=800Ω −72 dBc

enInput Referred Voltage Noise Freq ≥ 1 MHz 6.0 nV/

inInput Referred Noise Current Freq ≥ 1 MHz 1.5 pA/

Input Characteristics (Differential)

VOSD Input Offset Voltage Differential Mode, VID = 0, VCM = 0 0.5 ±4

±6

Input Offset Voltage Average

Temperature Drift

(Note 10) −0.8 µV/°C

IBI Input Bias Current (Note 9) -4 0

-10

µA

Input Bias Current Average

Temperature Drift

(Note 10) −2.6 nA/°C

Input Bias Difference Difference in Bias currents between

the two inputs

0.03 µA

CMRR Common Mode Rejection Ratio DC, VCM = 0V, VID = 0V 72 80 dBc

RIN Input Resistance Differential 5 MΩ

CIN Input Capacitance Differential 1 pF

CMVR Input Common Mode Voltage

Range

CMRR > 53dB +3.1

−4.6

+3.2

−4.7

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LMH6551

Symbol Parameter Conditions Min

(Note 8)

Typ

(Note 7)

Max

(Note 8)Units

VCMPin Input Characteristics (Common Mode Feedback Amplifier)

VOSC Input Offset Voltage Common Mode, VID = 0 0.5 ±5

±8

Input Offset Voltage Average

Temperature Drift

(Note 10) 8.2 µV/°C

Input Bias Current (Note 9) −2 μA

VCM CMRR VID = 0V, 1V step on VCM pin, measure

VOD

70 75 dB

Input Resistance 25 kΩ

Common Mode Gain ΔVO,CM/ΔVCM 0.995 0.999 1.005 V/V

Output Performance

Output Voltage Swing Single Ended, Peak to Peak ±7.38

±7.18

±7.8 V

Output Common Mode Voltage

Range

VID = 0 V, ±3.69 ±3.8 V

IOUT Linear Output Current VOUT = 0V ±50 ±65 mA

ISC Short Circuit Current Output Shorted to Ground

VIN = 3V Single Ended(Note 3)l

140 mA

Output Balance Error ΔVOUTCommon Mode /

ΔVOUTDIfferential , VOUT = 0.5 Vpp

Differential, f = 10 MHz

−70 dB

Miscellaneous Performance

AVOL Open Loop Gain Differential 70 dB

PSRR Power Supply Rejection Ratio DC, ΔVS = ±1V 74 90 dB

Supply Current RL = ∞11 12.5 14.5

16.5

5V Electrical Characteristics (Note 2)

Single ended in differential out, TA= 25°C, G = +1, VS = 5V, VCM = 2.5V, RF = RG = 365Ω, RL = 500Ω; ; Unless specifiedBold-

face limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 8)

Typ

(Note 7)

Max

(Note 8)Units

SSBW Small Signal −3 dB Bandwidth RL = 500Ω, VOUT = 0.5 VPP 350 MHz

LSBW Large Signal −3 dB Bandwidth RL = 500Ω, VOUT = 2 VPP 300 MHz

0.1 dB Bandwidth VOUT = 2 VPP 50 MHz

Slew Rate 4V Step(Note 6) 1800 V/μs

Rise/Fall Time, 10% to 90% 4V Step 2 ns

Settling Time 4V Step, 0.05% 17 ns

VCM Pin AC Performance (Common Mode Feedback Amplifier)

Common Mode Small Signal

Bandwidth

170 MHz

Distortion and Noise Response

HD2 2nd Harmonic Distortion VO = 2 VPP, f = 5 MHz, RL=800Ω −84 dBc

HD2 VO = 2 VPP, f = 20 MHz, RL=800Ω −69 dBc

HD3 3rd Harmonic Distortion VO = 2 VPP, f = 5 MHz, RL=800Ω −93 dBc

HD3 VO = 2 VPP, f = 20 MHz, RL=800Ω −67 dBc

enInput Referred Noise Voltage Freq ≥ 1 MHz 6.0 nV/

inInput Referred Noise Current Freq ≥ 1 MHz 1.5 pA/

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LMH6551

Symbol Parameter Conditions Min

(Note 8)

Typ

(Note 7)

Max

(Note 8)Units

Input Characteristics (Differential)

VOSD Input Offset Voltage Differential Mode, VID = 0, VCM = 0 0.5 ±4

±6

Input Offset Voltage Average

Temperature Drift

(Note 10) −0.8 µV/°C

IBIAS Input Bias Current (Note 9) −4 0

-10

μA

Input Bias Current Average

Temperature Drift

(Note 10) −3 nA/°C

Input Bias Current Difference Difference in Bias currents between the

two inputs

0.03 µA

CMRR Common-Mode Rejection Ratio DC, VID = 0V 70 78 dBc

Input Resistance Differential 5 MΩ

Input Capacitance Differential 1 pF

VICM Input Common Mode Range CMRR > 53 dB +3.1

+0.4

+3.2

+0.3

VCMPin Input Characteristics (Common Mode Feedback Amplifier)

Input Offset Voltage Common Mode, VID = 0 0.5 ±5

±8

Input Offset Voltage Average

Temperature Drift

5.8 µV/°C

Input Bias Current 3 μA

VCM CMRR VID = 0,

1V step on VCM pin, measure VOD

70 75 dB

Input Resistance VCM pin to ground 25 kΩ

Common Mode Gain ΔVO,CM/ΔVCM 0.995 0.991 1.005 V/V

Output Performance

VOUT Output Voltage Swing Single Ended, Peak to Peak, VS= ±2.5V,

VCM= 0V

±2.4 ±2.8 V

IOUT Linear Output Current VOUT = 0V Differential ±45 ±60 mA

ISC Output Short Circuit Current Output Shorted to Ground

VIN = 3V Single Ended(Note 3)

230 mA

CMVR Output Common Mode Voltage

Range

VID = 0, VCMpin = 1.2V and 3.8V 3.72

1.23

3.8

1.2

Output Balance Error ΔVOUTCommon Mode /

ΔVOUTDIfferential , VOUT = 1Vpp

Differential, f = 10 MHz

−65 dB

Miscellaneous Performance

Open Loop Gain DC, Differential 70 dB

PSRR Power Supply Rejection Ratio DC, ΔVS = ±0.5V 72 88 dB

ISSupply Current RL = ∞10 11.5 13.5

15.5

3.3V Electrical Characteristics (Note 2)

Single ended in differential out, TA= 25°C, G = +1, VS = 3.3V, VCM = 1.65V, RF = RG = 365Ω, RL = 500Ω; ; Unless speci-

fiedBoldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 8)

Typ

(Note 7)

Max

(Note 8)Units

SSBW Small Signal −3 dB Bandwidth RL = 500Ω, VOUT = 0.5 VPP 320 MHz

LSBW Large Signal −3 dB Bandwidth RL = 500Ω, VOUT = 1 VPP 300 MHz

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LMH6551

Symbol Parameter Conditions Min

(Note 8)

Typ

(Note 7)

Max

(Note 8)Units

Slew Rate 1V Step(Note 6) 700 V/μs

Rise/Fall Time, 10% to 90% 1V Step 2 ns

VCM Pin AC Performance (Common Mode Feedback Amplifier)

Common Mode Small Signal

Bandwidth

95 MHz

Distortion and Noise Response

HD2 2nd Harmonic Distortion VO = 1 VPP, f = 5 MHz, RL=800Ω −93 dBc

HD2 VO = 1 VPP, f = 20 MHz, RL=800Ω −74 dBc

HD3 3rd Harmonic Distortion VO = 1VPP, f = 5 MHz, RL=800Ω −85 dBc

HD3 VO = 1VPP, f = 20 MHz, RL=800Ω −69 dBc

Input Characteristics (Differential)

VOSD Input Offset Voltage Differential Mode, VID = 0, VCM = 0 1 mV

Input Offset Voltage Average

Temperature Drift

(Note 10) 1.6 µV/°C

IBIAS Input Bias Current (Note 9) −8 μA

Input Bias Current Average

Temperature Drift

(Note 10) 9.5 nA/°C

Input Bias Current Difference Difference in Bias currents between the

two inputs

0.3 µA

CMRR Common-Mode Rejection Ratio DC, VID = 0V 78 dBc

Input Resistance Differential 5 MΩ

Input Capacitance Differential 1 pF

VICM Input Common Mode Range CMRR > 53 dB +1.5

+0.3

VCMPin Input Characteristics (Common Mode Feedback Amplifier)

Input Offset Voltage Common Mode, VID = 0 1 ±5 mV

Input Offset Voltage Average

Temperature Drift

18.6 µV/°C

Input Bias Current 3 μA

VCM CMRR VID = 0,

1V step on VCM pin, measure VOD

60 dB

Input Resistance VCM pin to ground 25 kΩ

Common Mode Gain ΔVO,CM/ΔVCM 0.999 V/V

Output Performance

VOUT Output Voltage Swing Single Ended, Peak to Peak, VS= 3.3V,

VCM= 1.65V

±0.75 ±0.9 V

IOUT Linear Output Current VOUT = 0V Differential ±30 ±40 mA

ISC Output Short Circuit Current Output Shorted to Ground

VIN = 2V Single Ended(Note 3)

200 mA

CMVR Output Common Mode Voltage

Range

VID = 0, VCMpin = 1.2V and 2.1V 2.1

1.2

Output Balance Error ΔVOUTCommon Mode /

ΔVOUTDIfferential , VOUT = 1Vpp

Differential, f = 10 MHz

−65 dB

Miscellaneous Performance

Open Loop Gain DC, Differential 70 dB

PSRR Power Supply Rejection Ratio DC, ΔVS = ±0.5V 75 dB

ISSupply Current RL = ∞ 8 mA

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LMH6551

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications, see the Electrical Characteristics tables.

Note 2: Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating

of the device such that TJ = TA. No guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ >

TA.

Note 3: The maximum output current (IOUT) is determined by device power dissipation limitations.

Note 4: The maximum power dissipation is a function of TJ(MAX), θJA and TA. The maximum allowable power dissipation at any ambient temperature is

P D= (TJ(MAX) — TA)/ θJA. All numbers apply for package soldered directly into a 2 layer PC board with zero air flow.

Note 5: Human body model: 1.5 kΩ in series with 100 pF. Machine model: 0Ω in series with 200pF.

Note 6: Slew Rate is the average of the rising and falling edges.

Note 7: Typical numbers are the most likely parametric norm.

Note 8: Limits are 100% production tested at 25°C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality

Control (SQC) methods.

Note 9: Negative input current implies current flowing out of the device.

Note 10: Drift determined by dividing the change in parameter at temperature extremes by the total temperature change.

Note 11: Parameter is guaranteed by design.

Typical Performance Characteristics (TA = 25°C, VS = ±5V, RL = 500Ω, RF = RG = 365Ω; Unless

Specified).

Frequency Response vs. Supply Voltage

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Frequency Response

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Frequency Response vs. VOUT

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Frequency Response vs. Capacitive Load

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LMH6551

Suggested ROUT vs. Cap Load

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Suggested ROUT vs. Cap Load

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1 VPP Pulse Response Single Ended Input

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2 VPP Pulse Response Single Ended Input

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Large Signal Pulse Response

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Output Common Mode Pulse Response

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LMH6551

Distortion vs. Frequency

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Distortion vs. Frequency

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Distortion vs. Frequency

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Distortion vs. Supply Voltage (Split Supplies)

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Distortion vs. Supply Voltage (Single Supply)

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Maximum VOUT vs. IOUT

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LMH6551

Minimum VOUT vs. IOUT

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Closed Loop Output Impedance

20133217

Closed Loop Output Impedance

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Closed Loop Output Impedance

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PSRR

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PSRR

20133220

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LMH6551

CMRR

20133233

Balance Error

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Application Section

The LMH6551 is a fully differential amplifier designed to pro-

vide low distortion amplification to wide bandwidth differential

signals. The LMH6551, though fully integrated for ultimate

balance and distortion performance, functionally provides

three channels. Two of these channels are the V+ and V− sig-

nal path channels, which function similarly to inverting mode

operational amplifiers and are the primary signal paths. The

third channel is the common mode feedback circuit. This is

the circuit that sets the output common mode as well as driv-

ing the V+ and V− outputs to be equal magnitude and opposite

phase, even when only one of the two input channels is driv-

en. The common mode feedback circuit allows single ended

to differential operation.

The LMH6551 is a voltage feedback amplifier with gain set by

external resistors. Output common mode voltage is set by the

VCM pin. This pin should be driven by a low impedance refer-

ence and should be bypassed to ground with a 0.1 µF ceramic

capacitor. Any signal coupling into the VCM will be passed

along to the output and will reduce the dynamic range of the

amplifier.

FULLY DIFFERENTIAL OPERATION

The LMH6551 will perform best when used with split supplies

and in a fully differential configuration. See Figure 1 and Fig-

ure 2 for recommend circuits.

20133204

FIGURE 1. Typical Application

The circuit shown in Figure 1 is a typical fully differential ap-

plication as might be used to drive an ADC. In this circuit

closed loop gain, (AV) = VOUT/ VIN = RF/RG. For all the appli-

cations in this data sheet VIN is presumed to be the voltage

presented to the circuit by the signal source. For differential

signals this will be the difference of the signals on each input

(which will be double the magnitude of each individual signal),

while in single ended inputs it will just be the driven input sig-

nal.

The resistors RO help keep the amplifier stable when pre-

sented with a load CL as is typical in an analog to digital

converter (ADC). When fed with a differential signal, the

LMH6551 provides excellent distortion, balance and common

mode rejection provided the resistors RF, RG and RO are well

matched and strict symmetry is observed in board layout.

With a DC CMRR of over 80dB, the DC and low frequency

CMRR of most circuits will be dominated by the external re-

sistors and board trace resistance. At higher frequencies

board layout symmetry becomes a factor as well. Precision

resistors of at least 0.1% accuracy are recommended and

careful board layout will also be required.

20133202

FIGURE 2. Fully Differential Cable Driver

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LMH6551

With up to 15 VPP differential output voltage swing and 80 mA

of linear drive current the LMH6551 makes an excellent cable

driver as shown in Figure 2. The LMH6551 is also suitable for

driving differential cables from a single ended source.

The LMH6551 requires supply bypassing capacitors as

shown in Figure 3 and Figure 4. The 0.01 µF and 0.1 µF ca-

pacitors should be leadless SMT ceramic capacitors and

should be no more than 3 mm from the supply pins. The SMT

capacitors should be connected directly to a ground plane.

Thin traces or small vias will reduce the effectiveness of by-

pass capacitors. Also shown in both figures is a capacitor from

the VCM pin to ground. The VCM pin is a high impedance input

to a buffer which sets the output common mode voltage. Any

noise on this input is transferred directly to the output. Output

common mode noise will result in loss of dynamic range, de-

graded CMRR, degraded Balance and higher distortion. The

VCM pin should be bypassed even if the pin in not used. There

is an internal resistive divider on chip to set the output com-

mon mode voltage to the mid point of the supply pins. The

impedance looking into this pin is approximately 25 kΩ. If a

different output common mode voltage is desired drive this

pin with a clean, accurate voltage reference.

20133201

FIGURE 3. Split Supply Bypassing Capacitors

20133212

FIGURE 4. Single Supply Bypassing Capacitors

SINGLE ENDED INPUT TO DIFFERENTIAL OUTPUT

The LMH6551 provides excellent performance as an active

balun transformer. Figure 5 shows a typical application where

an LMH6551 is used to produce a differential signal from a

single ended source.

In single ended input operation the output common mode

voltage is set by the VCM pin as in fully differential mode. Also,

in this mode the common mode feedback circuit must recre-

ate the signal that is not present on the unused differential

input pin. The performance chart titled “Balance Error” is the

measurement of the effectiveness of this process. The com-

mon mode feedback circuit is responsible for ensuring bal-

anced output with a single ended input. Balance error is

defined as the amount of input signal that couples into the

output common mode. It is measured as a the undesired out-

put common mode swing divided by the signal on the input.

Balance error can be caused by either a channel to channel

gain error, or phase error. Either condition will produce a

common mode shift. The chart titled “Balance Error” mea-

sures the balance error with a single ended input as that is

the most demanding mode of operation for the amplifier.

Supply and VCM pin bypassing are also critical in this mode of

operation. See the above section on FULLY DIFFERENTIAL

OPERATION for bypassing recommendations and also see

Figure 3 and Figure 4 for recommended supply bypassing

configurations.

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LMH6551

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FIGURE 5. Single Ended In to Differential Out

SINGLE SUPPLY OPERATION

The input stage of the LMH6551 has a built in offset of 0.7V

towards the lower supply to accommodate single supply op-

eration with single ended inputs. As shown in Figure 5 , the

input common mode voltage is less than the output common

voltage. It is set by current flowing through the feedback net-

work from the device output. The input common mode range

of 0.4V to 3.2V places constraints on gain settings. Possible

solutions to this limitation include AC coupling the input signal,

using split power supplies and limiting stage gain. AC cou-

pling with single supply is shown in Figure 6.

In Figure 5 closed loop gain = VO / VI ≊ RF / RG, where VI

=VS / 2, as long as RM << RG. Note that in single ended to

differential operation VI is measured single ended while VO is

measured differentially. This means that gain is really 1/2 or

6 dB less when measured on either of the output pins sepa-

rately. Additionally, note that the input signal at RT (labeled as

VI) is 1/2 of VS when RT is chosen to match RS to RIN.

VICM = Input common mode voltage = (VI1+VI2) / 2. 20133209

FIGURE 6. AC Coupled for Single Supply Operation

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LMH6551

DRIVING ANALOG TO DIGITAL CONVERTERS

Analog to digital converters (ADC) present challenging load

conditions. They typically have high impedance inputs with

large and often variable capacitive components. As well,

there are usually current spikes associated with switched ca-

pacitor or sample and hold circuits. Figure 7 shows a typical

circuit for driving an ADC. The two 56Ω resistors serve to iso-

late the capacitive loading of the ADC from the amplifier and

ensure stability. In addition, the resistors form part of a low

pass filter which helps to provide anti alias and noise reduc-

tion functions. The two 39 pF capacitors help to smooth the

current spikes associated with the internal switching circuits

of the ADC and also are a key component in the low pass

filtering of the ADC input. In the circuit of Figure 7the cutoff

frequency of the filter is 1/ (2*π*56Ω *(39 pF + 14pF)) =

53MHz (which is slightly less than the sampling frequency).

Note that the ADC input capacitance must be factored into the

frequency response of the input filter, and that being a differ-

ential input the effective input capacitance is double. Also as

shown in Figure 7 the input capacitance to many ADCs is

variable based on the clock cycle. See the data sheet for your

particular ADC for details.

20133205

FIGURE 7. Driving an ADC

The amplifier and ADC should be located as closely together

as possible. Both devices require that the filter components

be in close proximity to them. The amplifier needs to have

minimal parasitic loading on the output traces and the ADC is

sensitive to high frequency noise that may couple in on its

input lines. Some high performance ADCs have an input

stage that has a bandwidth of several times its sample rate.

The sampling process results in all input signals presented to

the input stage mixing down into the Nyquist range (DC to Fs/

2). See AN-236 for more details on the subsampling process

and the requirements this imposes on the filtering necessary

in your system.

USING TRANSFORMERS

Transformers are useful for impedance transformation as well

as for single to differential, and differential to single ended

conversion. A transformer can be used to step up the output

voltage of the amplifier to drive very high impedance loads as

shown in Figure 8. Figure 10 shows the opposite case where

the output voltage is stepped down to drive a low impedance

load.

Transformers have limitations that must be considered before

choosing to use one. Compared to a differential amplifier, the

most serious limitations of a transformer are the inability to

pass DC and balance error (which causes distortion and gain

errors). For most applications the LMH6551 will have ade-

quate output swing and drive current and a transformer will

not be desirable. Transformers are used primarily to interface

differential circuits to 50Ω single ended test equipment to

simplify diagnostic testing.

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FIGURE 8. Transformer Out High Impedance Load

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LMH6551

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FIGURE 9. Calculating Transformer Circuit Net Gain

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FIGURE 10. Transformer Out Low Impedance Load 20133203

FIGURE 11. Driving 50Ω Test Equipment

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LMH6551

CAPACITIVE DRIVE

As noted in the Driving ADC section, capacitive loads should

be isolated from the amplifier output with small valued resis-

tors. This is particularly the case when the load has a resistive

component that is 500Ω or higher. A typical ADC has capac-

itive components of around 10 pF and the resistive compo-

nent could be 1000Ω or higher. If driving a transmission line,

such as 50Ω coaxial or 100Ω twisted pair, using matching re-

sistors will be sufficient to isolate any subsequent capaci-

tance. For other applications see the “Suggested Rout vs.

Cap Load” charts in the Typical Performance Characteristics

section.

POWER DISSIPATION

The LMH6551 is optimized for maximum speed and perfor-

mance in the small form factor of the standard SOIC package,

and is essentially a dual channel amplifier. To ensure maxi-

mum output drive and highest performance, thermal shut-

down is not provided. Therefore, it is of utmost importance to

make sure that the TJMAXof 150°C is never exceeded due to

the overall power dissipation.

Follow these steps to determine the Maximum power dissi-

pation for the LMH6551:

1. Calculate the quiescent (no-load) power: PAMP = ICC*

(VS), where VS = V+ - V−. (Be sure to include any current

through the feedback network if VOCM is not mid rail.)

2. Calculate the RMS power dissipated in each of the output

stages: PD (rms) = rms ((VS - V+OUT) * I+OUT) + rms ((VS

− V−OUT) * I−OUT) , where VOUT and IOUT are the voltage

and the current measured at the output pins of the

differential amplifier as if they were single ended

amplifiers and VS is the total supply voltage.

3. Calculate the total RMS power: PT = PAMP + PD.

The maximum power that the LMH6551 package can dissi-

pate at a given temperature can be derived with the following

equation:

PMAX = (150° – TAMB)/ θJA, where TAMB = Ambient temperature

(°C) and θJA = Thermal resistance, from junction to ambient,

for a given package (°C/W). For the SOIC package θJA is 150°

C/W.

NOTE: If VCM is not 0V then there will be quiescent current

flowing in the feedback network. This current should be in-

cluded in the thermal calculations and added into the quies-

cent power dissipation of the amplifier.

ESD PROTECTION

The LMH6551 is protected against electrostatic discharge

(ESD) on all pins. The LMH6551 will survive 2000V Human

Body model and 200V Machine model events. Under normal

operation the ESD diodes have no effect on circuit perfor-

mance. There are occasions, however, when the ESD diodes

will be evident. If the LMH6551 is driven by a large signal while

the device is powered down the ESD diodes will conduct . The

current that flows through the ESD diodes will either exit the

chip through the supply pins or will flow through the device,

hence it is possible to power up a chip with a large signal

applied to the input pins.

BOARD LAYOUT

The LMH6551 is a very high performance amplifier. In order

to get maximum benefit from the differential circuit architec-

ture board layout and component selection is very critical. The

circuit board should have low a inductance ground plane and

well bypassed broad supply lines. External components

should be leadless surface mount types. The feedback net-

work and output matching resistors should be composed of

short traces and precision resistors (0.1%). The output match-

ing resistors should be placed within 3-4 mm of the amplifier

as should the supply bypass capacitors. The LMH730154

evaluation board is an example of good layout techniques.

The LMH6551 is sensitive to parasitic capacitances on the

amplifier inputs and to a lesser extent on the outputs as well.

Ground and power plane metal should be removed from be-

neath the amplifier and from beneath RF and RG.

With any differential signal path symmetry is very important.

Even small amounts of asymmetry will contribute to distortion

and balance errors.

EVALUATION BOARD

National Semiconductor offers evaluation board(s) to aid in

device testing and characterization and as a guide for proper

layout. Generally, a good high frequency layout will keep

power supply and ground traces away from the inverting input

and output pins. Parasitic capacitances on these nodes to

ground will cause frequency response peaking and possible

circuit oscillations (see Application Note OA-15 for more in-

formation).

www.national.com 16

LMH6551

Physical Dimensions inches (millimeters) unless otherwise noted

8-Pin SOIC

NS Package Number M08A

8–Pin MSOP

NS Package Number MUA08A

17 www.national.com

LMH6551

Notes

LMH6551 Differential, High Speed Op Amp

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