REVISIONS
LTR
DESCRIPTION DATE (YR-MO-DA)
APPROVED
A
Add vendor CAGE F8859. Add device class V criteria. Add table III, delta
limits. Update boilerplate to MIL-PRF-38535 requirements. -jak
01-09-05
Thomas M. Hess
B
Add section 1.5, radiation features. Update the boilerplate to include radiation
hardness assured requirements. Editorial changes throughout. LTG
04-05-14
Charles F. Saffle
C
Update radiation features in section 1.5. Add SEP test table IB and paragraph
4.4.4.2. – jak.
11-05-19
David J. Corbett
REV
SHEET
REV
C
C
SHEET
15
16
REV STATUS
REV
C C C C C C C C
C
C
C C C C
OF SHEETS
SHEET
1 2 3 4 5 6 7 8
9
10
11 12 13 14
PMIC N/A
PREPARED BY
Jeffery Tunstall
DLA LAND AND MARITIME
COLUMBUS, OHIO 4321 8-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT DRAWING
CHECKED BY
D. A. DiCenzo
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
APPROVED BY
Robert P. Evans MICROCIRCUIT, DIGITAL, ADVANCED
CMOS, DUAL 1-OF-4 DECODER,
MONOLITHIC SILICON
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
DRAWING APPROVAL DATE
87-11-10
AMSC N/A
REVISION LEVEL
C
SIZE
A
CAGE CODE
67268
5962-87623
SHEET 1 OF 16
DSCC FORM 2233
APR 97 5962-E017-11
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 2
DSCC FORM 2234
APR 97
1. SCOPE
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN.
1.2 PIN. The PIN is as shown in the following examples.
For device classes M and Q:
5962 - 87623 01 E A
Federal RHA Device Case Lead
stock class designator type outline finish
designator (see 1.2.1) (see 1.2.2) (see 1.2.4) (see 1.2.5)
\ /
\/
Drawing number
For device class V:
5962 F 87623 01 V X A
Federal RHA Device Device Case Lead
stock class designator type class outline finish
designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5)
\ / (see 1.2.3)
\/
Drawing number
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are
marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.
1.2.2 Device type(s). The device type(s) identify the circuit function as follows:
Device type Generic number Circuit function
01 54AC139 Dual 1-of-4 decoder
1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed
below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q
designators will not be included in the PIN and will not be marked on the device.
Device class Device requirements documentation
M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN
class level B microcircuits in accordance with MIL-PRF-38535, appendix A
Q or V Certification and qualification to MIL-PRF-38535
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 3
DSCC FORM 2234
APR 97
1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows:
Outline letter Descriptive designator Terminals Package style
E GDIP1-T16 or CDIP2-T16 16 Dual-in-line
F GDFP2-F16 or CDFP3-F16 16 Flat pack
X CDFP4-F16 16 Flat pack
2 CQCC1-N20 20 Square leadless chip carrier
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A
for device class M.
1.3 Absolute maximum ratings. 1/ 2/ 3/
Supply voltage range (VCC) .................................................................................. -0.5 V dc to +7.0 V dc
DC input voltage range (VIN) ................................................................................ -0.5 V dc to VCC + 0.5 V dc
DC output voltage range (VOUT) ........................................................................... -0.5 V dc to VCC + 0.5 V dc
Clamp diode current (IIK, IOK) ................................................................................ 20 mA
DC output current (per pin) .................................................................................. 50 mA
DC VCC or GND current (per pin) ......................................................................... 100 mA
Storage temperature range (TSTG) ....................................................................... -65C to +150C
Maximum power dissipation (PD) ......................................................................... 500 mW
Lead temperature (soldering, 10 seconds):
Case outline X .................................................................................................. +260
All other case outlines except X ........................................................................ +245C
Thermal resistance, junction-to-case (JC) ........................................................... See MIL-STD-1835
Junction temperature (TJ) .................................................................................... +175C 4/
1.4 Recommended operating conditions. 2/ 3/
Supply voltage range (VCC) ................................................................................. +2.0 V dc to +6.0 V dc
Input voltage range .............................................................................................. 0.0 V dc to VCC
Output voltage range ........................................................................................... 0.0 V dc to VCC
Case operating temperature range (TC) ............................................................. -55C to +125C
Input rise or fall time (tr, tf):
VCC = 3.6 V ........................................................................................................ 0 to 8 ns
VCC = 5.5 V ........................................................................................................ 0 to 8 ns
1.5 Radiation features.
Device type 01:
Maximum total dose available (dose rate = 50 – 300 rads(Si)/s) .................... 300 krads (Si)
Single event phenomenon (SEP):
effective LET, no SEL (see 4.4.4.2) .............................................................. ≤ 93 MeV-cm2/mg 5/
effective LET, no SEU (see 4.4.4.2) ............................................................. ≤ 93 MeV-cm2/mg 5/
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the
maximum levels may degrade performance and affect reliability.
2/ Unless otherwise noted, all voltages are referenced to GND.
3/ The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range
of –55C to +125C.
4/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in
accordance with method 5004 of MIL-STD-883.
5/ These limits were obtained during technology characterization and qualification, and are guaranteed by design or process,
but not production tested unless specified by the customer through the purchase order or contract.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 4
DSCC FORM 2234
APR 97
2. APPLICABLE DOCUMENTS
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks
form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATION
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-883 - Test Method Standard Microcircuits.
MIL-STD-1835 - Interface Standard Electronic Component Case Outlines.
DEPARTMENT OF DEFENSE HANDBOOKS
MIL-HDBK-103 - List of Standard Microcircuit Drawings.
MIL-HDBK-780 - Standard Microcircuit Drawings.
(Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or from the Standardization
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.)
2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein.
Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract.
JEDEC – SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC)
JESD-20 - Standard for Description of 54/74ACXXXX and 54/74ACTXXXX Advanced High-Speed
CMOS Devices.
(Copies of these documents are available online at http:/www.jedec.org or from JEDEC – Solid State Technology Association,
3103 North 10th Street, Suite 240–S, Arlington, VA 22201.)
ASTM INTERNATIONAL (ASTM)
ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion
Irradiation of Semiconductor Devices.
(Copies of this document is available online at http://www.astm.org/ or from ASTM International, P. O. Box C700,
100 Barr Harbor Drive, West Conshohocken, PA 19428-2959).
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute
the documents. These documents may also be available in or through libraries or other informational services.)
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of
this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific
exemption has been obtained.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 5
DSCC FORM 2234
APR 97
3. REQUIREMENTS
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with
MIL-PRF-38535 and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The
modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for
device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified
herein.
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in
MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.
3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein.
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1.
3.2.3 Truth table. The truth table shall be as specified on figure 2.
3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3.
3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4.
3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document
revision level control and shall be made available to the preparing or acquiring activity upon request.
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical
performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case
operating temperature range.
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical
tests for each subgroup are defined in table IA.
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be
marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer
has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator shall still be
marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in
accordance with MIL-PRF-38535, appendix A.
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see
6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of
supply for this drawing shall affirm that the manufacturer's product meets, for device classes Q and V, the requirements of
MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein.
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or
for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.
3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of
product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing.
3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, DLA Land and Maritime 's agent,
and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. Offshore
documentation shall be made available onshore at the option of the reviewer.
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit
group number 39 (see MIL-PRF-38535, appendix A).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 6
DSCC FORM 2234
APR 97
TABLE IA. Electrical performance characteristics.
Test and
MIL-STD-883
test method 1/
Symbol Test conditions 2/ 3/
-55C TC +125C
+3.0 V VCC +5.5 V
Device
type
and
Device
class
VCC Group A
subgroups
Limits 4/ Unit
unless otherwise specified Min Max
Positive input
clamp voltage
3022
VIC+ For input under test, IIN = 1.0 mA All
V
0.0 V 1 0.4 1.5 V
Negative input
clamp voltage
3022
VIC- For input under test, IIN = -1.0 mA All
V
Open 1 -0.4 -1.5 V
High level output
voltage
3006
VOH
5/
VIN = VIH or VIL
IOH = -50 A
All
All
3.0 V 1, 2, 3 2.90 V
All
All
4.5 V 4.40
All
All
5.5 V 5.40
VIN = VIH or VIL
IOH = -4 mA
All
All
3.0 V 2.40
VIN = VIH or VIL
IOH = -24 mA
All
All
4.5 V 3.70
5.5 V 4.70
VIN = VIH or VIL
IOH = -50 mA
All
All
5.5 V 3.85
Low level output
voltage
3007
VOL
5/
VIN = VIH or VIL
IOL = 50 A
All
All
3.0 V 1, 2, 3 0.10 V
All
All
4.5 V 0.10
All
All
5.5 V 0.10
VIN = VIH or VIL
IOL = 12 mA
All
All
3.0 V 0.50
VIN = VIH or VIL
IOL = 24 mA
All
All
4.5 V 0.50
All
All
5.5 V 0.50
VIN = VIH or VIL
IOL = 50 mA
All
All
5.5 V 1.65
High level input
voltage
VIH
6/
All
All
3.0 V 1, 2, 3 2.1 V
All
All
4.5 V 1, 2, 3 3.15
All
All
5.5 V
1, 2, 3 3.85
Low level input
voltage
VIL
6/
All
All
3.0 V 1, 2, 3 0.9 V
4.5 V 1.35
5.5 V 1.65
Input leakage
current low
3009
IIL V
IN = 0.0 V All
All
5.5 V 1 -0.1
A
2, 3 -1.0
Input leakage
current high
3010
IIH V
IN = 5.5 V All
All
5.5 V 1 0.1
A
2, 3 1.0
See footnotes at end of table.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 7
DSCC FORM 2234
APR 97
TABLE IA. Electrical performance characteristics - Continued.
Test and
MIL-STD-883
test method 1/
Symbol Test conditions 2/ 3/
-55C TC +125C
+3.0 V VCC +5.5 V
Device
type
and
Device
class
VCC Group A
subgroups
Limits 4/ Unit
unless otherwise specified Min Max
Quiescent supply
current, output
high
3005
ICCH V
IN = 5.5 V All
All
5.5 V 1 4
A
2, 3 80
M, D, P, L, R, F 7/ 01
Q, V
1 50
Quiescent supply
current, output
low
3005
ICCL V
IN = 0.0 V All
All
5.5 V 1 4
A
2, 3 80
M, D, P, L, R, F 7/ 01
Q, V
1 50
Input capacitance
3012
CIN See 4.4.1c
TC = +25C
All
All
GND 4 8.0 pF
Power dissipation
capacitance
CPD
8/
See 4.4.1c
TC = +25C, f = 1 MHz
All
All
5.0 V 4 85 pF
Functional tests
3014
9/
See 4.4.1b
VIN = VIH or VIL
Verify output VOUT
All
All
3.0 V
7, 8 L H
5.5 V
7, 8 L H
Propagation delay
time, Anx to Omx
3003
tPHL1
10/
CL = 50 pF minimum
RL = 500
See figure 4
All
All
3.0 V 9 1.0 10.0 ns
10, 11 1.0 12.5
4.5 V 9 1.0 8.0
10, 11 1.0 10.0
tPLH1
10/
3.0 V 9 1.0 11.5
10, 11 1.0 14.5
4.5 V 9 1.0 9.0
10, 11 1.0 11.0
Propagation delay
time, Ex
to Omx
3003
tPHL2
10/
CL = 50 pF minimum
RL = 500
See figure 4
All
All
3.0 V 9 1.0 10.0 ns
10, 11 1.0 12.5
4.5 V 9 1.0 8.0
10, 11 1.0 10.0
tPLH2
10/
3.0 V 9 1.0 12.0
10, 11 1.0 14.5
4.5 V 9 1.0 8.5
10, 11 1.0 11.0
1/ For tests not listed in the referenced MIL-STD-883, [e.g. VIH, VIL], utilize the general test procedure under the conditions
listed herein.
2/ Each input/output, as applicable, shall be tested at the specified temperature, for the specified limits, to the tests in table IA
herein. Output terminals not designated shall be high level logic, low level logic, or open, except as follows:
a. VIC (pos) tests, the GND terminal can be open. TC = +25C.
b. VIC (neg) tests, the VCC terminal shall be open. TC = +25C.
c. All ICC tests, the output terminal shall be open. When performing these tests, the current meter shall be
placed in the circuit such that all current flows through the meter.
3/ RHA device type 01 devices supplied to this drawing has been characterized through all levels M, D, P, L, R, and F of
irradiation. However, these parts are only tested at the 'F' level. Pre and post irradiation values are identical unless
otherwise specified in table I. When performing post irradiation electrical measurements for any RHA level, TA = +25C.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
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SIZE
A
5962-87623
REVISION LEVEL
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SHEET 8
DSCC FORM 2234
APR 97
TABLE IA. Electrical performance characteristics - Continued.
4/ For negative and positive voltage and current values, the sign designates the potential difference in reference to GND and
the direction of current flow, respectively; and the absolute value of the magnitude, not the sign, is relative to the minimum
and maximum limits, as applicable, listed herein. All devices shall meet or exceed the limits specified in table IA, as
applicable, at 3.0 V VCC 3.6 V and 4.5 V VCC 5.5 V.
5/ The VOH and VOL tests shall be tested at VCC = 3.0 V and 4.5 V. The VOH and VOL tests are guaranteed, if not tested, for
other values of VCC. Limits shown apply to operation at VCC = 3.3 V 0.3 V and VCC = 5.0 V 0.5 V. Tests with input
current at +50 mA or -50 mA are performed on only one input at a time with duration not to exceed 10 ms. Transmission
driving tests may be performed using VIN = VCC or GND. When VIN = VCC or GND is used, the test is guaranteed for
VIN = VIH minimum and VIL maximum. Values for subgroup 1 shall be guaranteed, if not tested, to the limits specified in
table I, herein.
6/ The VIH and VIL tests are not required if applied as forcing functions for VOH and VOL tests.
7/ The maximum limit for this parameter at 100 krads (Si) is 4 A.
8/ Power dissipation capacitance (CPD) determines both the power consumption (PD) and dynamic current consumption (IS).
Where:
P
D = (CPD + CL) (VCC x VCC)f + (ICC x VCC)
I
S = (CPD + CL) VCCf + ICC
f is the frequency of the input signal and CL is the external output load capacitance.
9/ Tests shall be performed in sequence, attributes data only. Functional tests shall include the truth table and other logic
patterns used for fault detection. The test vectors used to verify the truth table shall, at a minimum, test all functions of
each input and output. All possible input to output logic patterns per function shall be guaranteed, if not tested, to the
truth table in figure 2 herein. Functional tests shall be performed in sequence as approved by the qualifying activity on
qualified devices. For VOUT measurements, L 0.3VCC and H 0.7VCC.
10/ AC limits at VCC = 5.5 V are equal to the limits at VCC = 4.5 V and guaranteed by testing at VCC = 4.5 V. AC limits at
VCC = 3.6 V are equal to limits at VCC = 3.0 V and guaranteed by testing at VCC = 3.0 V. Minimum ac limits for VCC = 5.5 V
and VCC = 3.6 V are 1.0 ns and guaranteed by guardbanding the VCC = 4.5 V and VCC = 3.0 V minimum limits, respectively,
to 1.5 ns. For propagation delay tests, all paths must be tested.
TABLE IB. SEP test limits. 1/ 2/
Device
type
VCC = 2.0 V 3/ Bias for
latch-up test
VCC = 6.0 V
no latch-up
LET = 4/ 5/
[MeV/(mg/cm2)]
Effective LET
no upsets
[MeV/(mg/cm2)]
01 LET ≤ 93 6/ ≤ 93
1
/ For SEP test conditions, see 4.4.4.2 herein.
2
/ Technology characterization and model verification supplemented by in-line data
may be used in lieu of end-of-line testing. Test plan must be approved by TRB
and qualifying activity.
3
/ Tested for upsets at operating temperature, TA = +25C 10C.
4
/ Tested at operating temperature, TA = +125C 10C for latch-up.
5
/ Tested to a LET ≤ 93 MeV/(mg/cm2) with no latch-up (SEL).
6
/ Tested to a LET ≤ 93 MeV/(mg/cm2) with no single event upsets (SEU).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
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SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 9
DSCC FORM 2234
APR 97
Case outlines E, F, and X 2
Terminal numbe
r
Terminal symbol
1 Ea
NC
2 A0a
Ea
3 A1a A0a
4 O0a
A1a
5 O1a
O0a
6 O2a
NC
7 O3a
O1a
8 GND
O2a
9 O3b
O3a
10 O2b
GND
11 O1b
NC
12 O0b
O3b
13 A1b
O2b
14 A0b
O1b
15 Eb
O0b
16 VCC NC
17 - - - A1b
18 - - - A0b
19 - - - Eb
20 - - - VCC
NC = No internal connection
Pin description
Symbol Description
Anx (n = 1 to 2) (x = a or b) Address inputs
Ex
(x = a or b) Enable inputs (active low)
Omx
(m = 0 to 3) (x = a or b) Outputs (active low)
FIGURE 1. Terminal connections.
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DSCC FORM 2234
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Inputs Outputs
Ex
A0x
A1x
O0x
O1x
O2x
O3x
H X X H H H H
L L L L H H H
L H L H L H H
L L H H H L H
L H H H H H L
H = High voltage level
L = Low voltage level
X = Irrelevant
FIGURE 2. Truth table.
FIGURE 3. Logic diagram.
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NOTES:
1. CL = 50 pF or equivalent, (includes probe and jig capacitance).
2. RL = 500 or equivalent.
3. Input signal from pulse generator: VIN = 0.0 V to VCC; PRR 1 MHz; ZO = 50 tr 3.0 ns; tf 3.0 ns; tr and tf shall be
measured from 10% of VCC to 90% of VCC and from 90% of VCC to 10% of VCC, respectively; duty cycle = 50 percent.
4. Timing parameters shall be tested at a minimum input frequency of 1MHz.
5. The outputs are measured one at a time with one transition per measurement.
FIGURE 4. Switching waveforms and test circuit.
STANDARD
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DSCC FORM 2234
APR 97
4. VERIFICATION
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with
MIL-PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan
shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in
accordance with MIL-PRF-38535, appendix A.
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on
all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance
with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.
4.2.1 Additional criteria for device class M.
a. Burn-in test, method 1015 of MIL-STD-883.
(1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision
level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015.
(2) TA = +125C, minimum.
b. Interim and final electrical test parameters shall be as specified in table IIA herein.
4.2.2 Additional criteria for device classes Q and V.
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the
device manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under
document revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with
MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall
specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1015 of MIL-STD-883.
b. Interim and final electrical test parameters shall be as specified in table IIA herein.
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in
MIL-PRF-38535, appendix B.
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with
MIL-PRF-38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for
device class M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for
device class M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections
(see 4.4.1 through 4.4.4).
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 13
DSCC FORM 2234
APR 97
TABLE IIA. Electrical test requirements.
Test requirements Subgroups
(in accordance with
MIL-STD-883,
method 5005, table
IA)
Subgroups
(in accordance with
MIL-PRF-38535, table IIB)
Device
class M
Device
class Q
Device
class V
Interim electrical
parameters (see 4.2)
- - - - - - 1
Final electrical
parameters (see 4.2)
1/ 1, 2, 3, 7,
8, 9
1/ 1, 2, 3, 7,
8, 9
2/ 3/ 1, 2, 3, 7,
8, 9, 10, 11
Group A test
requirements (see 4.4)
1, 2, 3, 4, 7,
8, 9, 10, 11
1, 2, 3, 4, 7,
8, 9, 10, 11
1, 2, 3, 4, 7,
8, 9, 10, 11
Group C end-point electrical
parameters (see 4.4)
1, 2, 3 1, 2, 3 3/ 1, 2, 3, 7,
8, 9, 10, 11
Group D end-point electrical
parameters (see 4.4)
1, 2, 3 1, 2, 3 1, 2, 3, 7, 9
Group E end-point electrical
parameters (see 4.4)
1, 7, 9 1, 7, 9 1, 7, 9
1/ PDA applies to subgroup 1.
2/ PDA applies to subgroups 1, 7, and deltas.
3/ Delta limits, as specified in table IIB, shall be required where specified and the delta limits shall be completed
with reference to the zero hour electrical parameters.
Table IIB. Burn-in and operating life test, delta parameters (+25C). 1/
Parameter 2/ Symbol Delta limits
Quiescent current ICC 300 nA
Input current low level IIL 20 nA
Input current high level IIH 20 nA
Output voltage low level
(IOL = 24 mA, VCC = 5.5 V)
VOL 0.04 V
Output voltage high level
(IOH = -24 mA, VCC = 5.5 V)
VOH 0.20 V
1/ This table is representation of what vendor CAGE F8859 has experienced and
is guaranteed and not meant to be construed as a quality assurance requirement
for any other vendor.
2/ These parameters shall be recorded before and after the required burn-in and
life tests to determine the delta limits.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 14
DSCC FORM 2234
APR 97
4.4.1 Group A inspection
a. Tests shall be as specified in table II herein.
b. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table in figure 2 herein. The test
vectors used to verify the truth table shall, at a minimum, test all functions of each input and output. All possible input to
output logic patterns per function shall be guaranteed, if not tested, to the truth table in figure 2, herein. For device
classes Q and V, subgroups 7 and 8 shall include verifying the functionality of the device.
c. CIN and CPD shall be measured only for initial qualification and after process or design changes which may affect
capacitance. CIN shall be measured between the designated terminal and GND at a frequency of 1 MHz. CPD shall be
tested in accordance with the latest revision of JESD-20 and table IA herein. For CIN and CPD, test all applicable pins on
five devices with zero failures.
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.2.1 Additional criteria for device class M. Steady-state life test conditions, method 1005 of MIL-STD-883:
a. Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision level
control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the
inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of
MIL-STD-883.
b. TA = +125C, minimum.
c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883.
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test
temperature, or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with
MIL-PRF-38535. The test circuit shall be maintained under document revision level control by the device manufacturer's TRB in
accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit
shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in
method 1005 of MIL-STD-883.
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein.
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured
(see 3.5 herein).
a. End-point electrical parameters shall be as specified in table IIA herein.
b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as
specified in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to
radiation hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device
classes must meet the postirradiation end-point electrical parameter limits as defined in table IA at TA = +25C 5C,
after exposure, to the subgroups specified in table IIA herein.
c. RHA tests for device classes M, Q and V for levels M, D, P, L, R, and F shall be performed through each level to
determine at what levels the devices meet the RHA requirements. These RHA tests shall be performed for initial
qualification and after design or process changes which may affect the RHA performance of the device.
d. Prior to irradiation, each selected sample shall be assembled in its qualification package. It shall pass the specified
group A electrical parameters in table IA for subgroups specified in table IIA herein.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 15
DSCC FORM 2234
APR 97
4.4.4.1 Total dose irradiation testing. Total dose irradiation testing shall be performed in accordance with MIL-STD-883,
method 1019, condition A, and as specified herein. Prior to and during total dose irradiation characterization and testing, the
devices for characterization shall be biased so that 50 percent are at inputs high and 50 percent are at inputs low, and the
devices for testing shall be biased to the worst case condition established during characterization. Devices shall be biased as
follows:
a. Inputs tested high, VCC = 5.5 V dc 5%, VIN = 5.0 V dc +10%, RIN = 1k 20%, and all outputs are open.
b. Inputs tested low, VCC = 5.5 V dc 5%, VIN = 0.0 V dc, RIN = 1k 20%, and all outputs are open.
4.4.4.1.1 Accelerated annealing test. Accelerated annealing tests shall be performed on all devices requiring a RHA level
greater than 5k rads (Si). The post-anneal end-point electrical parameter limits shall be as specified in table IA herein and shall be
the pre-irradiation end-point electrical parameter limit at +25C 5C. Testing shall be performed at initial qualification and after
any design or process changes which may affect the RHA response of the device.
4.4.4.2 Single event phenomena (SEP). When specified in the purchase order or contract, SEP testing shall be performed on
class V devices. SEP testing shall be performed on the Standard Evaluation Circuit (SEC) or alternate SEP test vehicle as
approved by the qualifying activity at initial qualification and after any design or process changes which may affect the upset or
latchup characteristics. Test 4 devices with zero failures. ASTM F1192 may be used as a guideline when performing SEP testing.
The recommended test conditions for SEP are as follows:
a. The ion beam angle of incidence shall be between normal to the die surface and 60 to the normal, inclusive
(i.e. 0 angle 60). No shadowing of the ion beam due to fixturing or package related effects is allowed.
b. The fluence shall be 100 errors or 107 ions/cm2.
c. The flux shall be between 102 and 105 ions/cm2/s. The cross-section shall be verified to be flux independent by
measuring the cross-section at two flux rates that differ by at least an order of magnitude.
d. The particle range shall be 20 microns in silicon.
e. The test temperature shall be +25C and the maximum rated operating temperature 10C.
f. Bias conditions shall be defined by the manufacturer for the latchup measurements.
g. Test four devices with zero failures.
4.5 Methods of inspection. Methods of inspection shall be specified as follows:
4.5.1 Voltage and current. Unless otherwise specified, all voltages given are referenced to the microcircuit GND terminal.
Currents given are conventional current and positive when flowing into the referenced terminal.
5. PACKAGING
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes
Q and V or MIL-PRF-38535, appendix A for device class M.
STANDARD
MICROCIRCUIT DRAWING
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
SIZE
A
5962-87623
REVISION LEVEL
C
SHEET 16
DSCC FORM 2234
APR 97
6. NOTES
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications
(original equipment), design applications, and logistics purposes.
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-
prepared specification or drawing.
6.1.2 Substitutability. Device class Q devices will replace device class M devices.
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the
individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.
6.3 Record of users. Military and industrial users should inform DLA Land and Maritime when a system application requires
configuration control and which SMD's are applicable to that system. DLA Land and Maritime will maintain a record of users and
this list will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic
devices (FSC 5962) should contact DLA Land and Maritime -VA, telephone (614) 692-0544.
6.4 Comments. Comments on this drawing should be directed to DLA Land and Maritime -VA , Columbus, Ohio 43218-3990,
or telephone (614) 692-0547.
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in
MIL-PRF-38535 and MIL-HDBK-1331.
6.6 Sources of supply.
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DLA Land and Maritime -VA and
have agreed to this drawing.
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103 and
QML-38535. The vendors listed in MIL-HDBK-103 and QML-38535 have agreed to this drawing and a certificate of compliance
(see 3.6 herein) has been submitted to and accepted by DLA Land and Maritime -VA.
STANDARD MICROCIRCUIT DRAWING BULLETIN
DATE: 11-05-19
Approved sources of supply for SMD 5962-87623 are listed below for immediate acquisition information only and
shall be added to MIL-HDBK-103 and QML-38535 during the next revision. MIL-HDBK-103 and QML-38535 will be
revised to include the addition or deletion of sources. The vendors listed below have agreed to this drawing and a
certificate of compliance has been submitted to and accepted by DLA Land and Maritime -VA. This information
bulletin is superseded by the next dated revision of MIL-HDBK-103 and QML-38535. DLA Land and Maritime
maintains an online database of all current sources of supply at http://www.dscc.dla.mil/Programs/Smcr/.
Standard
microcircuit drawing
PIN 1/
Vendor
CAGE
number
Vendor
similar
PIN 2/
5962-8762301EA 0C7V7 54AC139DMQB
5962-8762301FA 0C7V7 54AC139FMQB
5962-87623012A 0C7V7 54AC139LMQB
5962-8762301XA 3/ 54AC139K02Q
5962-8762301VXA 3/ 54AC139K02V
5962F8762301XA F8859 RHFAC139K02Q
5962F8762301XC F8859 RHFAC139K01Q
5962F8762301VXA F8859 RHFAC139K02V
5962F8762301VXC F8859 RHFAC139K01V
1/ The lead finish shown for each PIN representing a hermetic
package is the most readily available from the manufacturer
listed for that part. If the desired lead finish is not listed
contact the vendor to determine its availability.
2/ Caution. Do not use this number for item
acquisition. Items acquired to this number may not
satisfy the performance requirements of this drawing.
3/ Not available from an approved source of supply.
Vendor CAGE Vendor name
number and address
0C7V7 E2V Aerospace and Defense, Inc.
dba QP Semiconductor, Inc.
2945 Oakmead Village Court
Santa Clara, CA 95051
F8859 ST Microelectronics
3 rue de Suisse
BP4199
35041 RENNES cedex2 - France
The information contained herein is disseminated for convenience only and the
Government assumes no liability whatsoever for any inaccuracies in the
information bulletin.
