PRELIMINARY SURFACE MOUNT PASSIVE DELAY LINES RESISTORS wCOILS wDELAY LINES SMP1410 SERIES- SMALL OUTLINE 14 PIN, 10-TAP SMP1610 SERIES- SMALL OUTLINE 16 PIN, 10-TAP FEATURES r r r r r r Economical cost, prompt delivery SO and Quad formats wih 50-mil pin spacing Available on 24mm embossed plastic Tape & Reel 0.002" Co-planarity Fast rise times Operating temperature: 0C to +70C OPTIONS r 28 pin surface mount J-lead quad package (.450" sq.) r Custom circuits available r Non-standard delay or impedance values r Tighter tolerance or temperature coefficient r Faster rise times r 100-mil pin spacing available r Military screening per MIL-D-83532 SMP1410 0.004[.10] .450 [11.4] .050[1.27] 14 8 0.300 [7.62] .360 [9.1] .260 [6.6] 1 7 .020 [.51] .050 .075[1.9] 3 CIRCUIT `A' 4 5 6 7-8 9 10 11 0.210[5.33] Max. 13 (OUT) 14 (GND) CIRCUIT `B' 4 5 6 8 9 10 11 (IN) 2 13 (OUT) 7 (GND) 2 12 3 11 4 5 10 6 9 (IN) 14 (GND) 1 7 (OUT) 8 (GND) SMP1610 0.004[.10] .450 [11.4] .050[1.27] 16 0.300 [7.62] 8 .020 [.51] .050 .050[1.27] CIRCUIT `A' 15 2 14 3 13 4 12 5 11 (IN) 1 6 (OUT) (GND) 8 CIRCUIT `B' .360 [9.1] .260 [6.6] 1 9 8 (GND) 2 14 3 13 4 5 11 6 Total Delay Tolerance Tem perature C oefficient D ielectric S trength Insulation Resistance D istortion 5% or 1nS w hichever is greater 100ppm /C m ax. 100VDC 100M m in. 10% m ax. TEST CONDITIONS @ 25C 1) Input test pulse shall have an amplitude of 3V, rise time of 3nS maximum, pulse width of 3X the total delay 2) Delay line to be terminated to within 1% of its characteristic impedance 3) Delay time measured from 50% of input pulse to 50% of output pulse 4) Rise time measured from 10% to 90% of output pulse ELECTRICAL CHARACTERISTICS 12 (GND) 1 CIRCUIT `C' RCD SMP Series passive (analog) surface mount delay lines are a lumped constant design per applicable portions of MIL-D23859. The series incorporates high performance inductors and multi-layer capacitors in a molded package ensuring stable transmission, low temperature coefficient, and excellent environmental performance. 12 (IN) 2 (GND) 1 3 RCD SMP1410 50NS 50 10 (IN) 15 7 (OUT) (GND) 1 9 (GND) 0.210[5.33] Max. Total Rise Time Delay Max. (nSec) (nSec) 10 2.5 20 4 30 6 8 40 50 10 75 15 100 20 125 25 150 30 200 40 Delay Available Attenuation per Tap Impedance Max. (%) (nSec) Values (10%)* 50 , 100 , 200 1.5 3 2.5 3 50 , 100 , 200 50 , 100 , 200 4 31 50 , 100 , 200 41.5 4 50 , 100 , 200 51.5 8 7.51.5 8 50 , 100 , 200 50 , 100 , 200 102 10 50 , 100 12.52 10 50 , 100 152 10 50 , 100 202 10 * 100 is the most common impedance value. P/N DESIGNATION: SMP1410 - 50nS - 101 RCD Type Total Delay Impedance in 3 digit code:(use R for decimal below 100--50R=50, 101=100) Circuit: A, B, C Packaging: B = Bulk, T = Tape & Reel RCD Components Inc., 520 E. Industrial Park Dr., Manchester, NH USA 03109 Tel: (603) 669-0054 Fax:(603) 669-5455 E-mail: rcdcompinc@aol.com www.rcd-comp.com FAXXX specifications subject to change without notice A T