PA84 PA84A PA84S APEX MICROTECHNOLOGY CORPORALION APPLICATIONS HOTLINE 800 546-APE X (800-546-2? 7:39) FEATURES HIGH SLEW RATE 200V/us FAST SETTLING TIME .1% in lus (PA84S) FULLY PROTECTED INPUT Up to +150v LOW BIAS CURRENT, LOW NOISE FET Input WIDE SUPPLY RANGE +15V to +150V SECOND SOURCEABLE BB3584JM APPLICATIONS HIGH VOLTAGE INSTRUMENTATION * ELECTROSTATIC TRANSDUCERS & DEFLECTION PROGRAMMABLE POWER SUPPLIES UP TO 290V ANALOG SIMULATORS DESCRIPTION The PA84 is a high voltage operational amplifier designed for output voltage swings up to +145V with a dual supply or 290V with a single supply. Two versions are available. The new PA84S, fast settling amplifier can absorb differentia! input over- voitages up to +50V while the established PA84 and PA84A can handle differential input overvoltages of up to +300V. Both versions are protected against common mode transients and overvoltages up to the supply rails. High accuracy is achieved with a cascode input circuit configuration. All internal biasing is referenced to a zener diode fed by a FET constant current source. As a result, the PA84 features an unprecedented supply range and excellent supply rejection. The output stage is biased- on for linear operation. External phase compensation allows for user flexibility in obtaining the maximum slew rate. Fixed current limits protect these amplifiers against shorts to common at supply voltages up to 150V. For operation into inductive loads, two extemal flyback pulse protection diodes are recommended. With the exception of PA84S, a built-in thermal shutoff circuit prevents destructive overheating. However, a heatsink may be necessary to maintain the proper case temperature under normal operating conditions. This hybrid integrated circuit utilizes a beryllia (BeO) sub- strate, thick film resistors. ceramic capacitors and semicon- ductor chips to maximize reliability, minimize size and give top performance. Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8- pin TO-3 package is hermetically sealed and electrically isolated. The use of compressible thermal isolation washers and/or improper mounting torque will void the product war- ranty. Please see General Operating Considerations. EXTERNAL CONNECTION PHASE COMPENSATION GAIN Co Ag 1 1OnF 2000 10 500pPF oxo 100 50pF 20K aQ 1000 none = none NOTES: for safe operation 2.input offset trimpot optional. 1. Phase Compensation required Recommended vaiue 100KQ. INK JET |" CONTROL -150V L TYPICAL APPLICATION The PA84 is ideally suited to driving ink jet contro! units {often a piezo electric device) which require precise pulse shape contral to deposit crisp clear date or lot code information on product containers. The external compensation network has been optimized to match the gain setting of the circuit and the complex impedance of the ink jet control unit. The combi- nation of speed and high voltage capabilities of the PA84 form ink droplets of uniform volume at high production rates to enhance the value of the printer. EQUIVALENT SCHEMATIC *NOTE: Not used for PA84S APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8601) FAX (52(}) 888-3329 ORDERS (520) 690-8601 EMAIL ProdLit@ TeamApex.cam C157PA84 PA84A PA84S ABSOLUTE MAXIMUM RATINGS SPECIFICATIONS Li M SUPPLY VOLTAGE, +V, to -V, 300V ABSOLUTE MAXIMUM RATINGS OUTPUT CURRENT, within SOA Internally Limited POWER DISSIPATION, internal at T, = 25C? 17.5W INPUT VOLTAGE, differential PA84/PA84A' +300V INPUT VOLTAGE, differential PA84S +50V INPUT VOLTAGE. common mode! tV, TEMPERATURE, pins for 10s max (solder) 300C TEMPERATURE, junction? 200C TEMPERATURE RANGE, storage -65 to +150C OPERATING TEMPERATURE RANGE, case 55 to +125C SPECIFICATIONS PA84/PA84S PAS4A PARAMETER TEST CONDITIONS: MIN TYP MAX | MIN TYP MAX | UNITS INPUT OFFSET VOLTAGE, initial T, = 25C +15 3 56 +1 mv OFFSET VOLTAGE, vs. temperature T, =-25 to +85C +10 425 +5 +10 uVviG OFFSET VOLTAGE, vs. supply T. = 25C +5 t.2 pV OFFSET VOLTAGE, vs. time Te = 25C +75 . LVAKh BIAS CURRENT, initial* Ty, = 25C 5 50 3 10 pA BIAS CURRENT, vs. supply Ty, = 25C 01 , pAV OFFSET CURRENT, initial* Tz = 25C 2.5 +50 21.5 +10 pA OFFSET CURRENT, vs. supply Tz = 25C +.01 , pA/V INPUT IMPEDANCE, DC = 25C 10" * Q INPUT CAPACITANCE T, = -25 to +85C 6 . pF COMMON MODE VOLTAGE RANGE | T, =-25 to +85C +V5-10 | +V5-8.5 * . v COMMON MODE REJECTION, DC T, = -25 to +85C 130 * dB GAIN OPEN LOOP GAIN at 10Hz T, = 25C, Ry = 0 120 * dB OPEN LOOP GAIN at 10Hz. Te. = 28C, R, = 9.5KQ 100 118 * . dB GAIN BANDWIDTH PRODUCT @ 1MHz | T, = 25C, R, = 3.5KQ. RA, = 20K 75 , MHz POWER BANDWIDTH, high gain Ty = 26C, R, = 3.5KQ. Ry, = 20KQ 250 180 . kHz POWER BANDWIDTH, low gain Te = 26C, R, = 3.5KQ. Re = 20KQ 120 . kHz OUTPUT VOLTAGE SWING T,. = 25C, Io = +40MA 4Ve-7 | 4V.-3 * * Vv VOLTAGE SWING? Te = -25 to +85C, Ip = +15mA #Ve-5 | V5-2 * . v CURRENT, peak Ty. = 25C 40 * mA CURRENT, short circuit Ty, = 25C 50 . mA SLEW RATE, high gain Te= = 25C, R, = 3,5KQ, Ry = 20KQ 200 150 . Vius SLEW RATE, low gain Tpa25C,.R=95KQR=2O | | 5 | | vs SETTLING TIME .01% at gain = 100 |T.=25C,R,-3.5KO PARAS |_ 2 r T us SETTLING TIME. 1% at gain =100___| Ro = 20KO, Vy= 2V step ONLY | | tt as SETTLING TIME .01% at gain = 100 T, = 25C. R,=3.5KQ PA84/84A 20 20 us SETTLING TIME. .1% at gain = 100 __|Re=20KO, Vy=2Vstep_ | 2 | 12 | f 4s POWER SUPPLY VOLTAGE Ty = 55C to +126C 15 +150 * * Vv CURRENT, quiescent TT. = 25C 5.5 75 . mA THERMAL RESISTANCE, AC, junction to case T. = -55C to +125C, F > 60Hz 3.8 . C/W RESISTANCE, DC, junction to case Te = 55C to +125C, F < 60Hz 6 6.5 . * CW RESISTANCE, case to air T, = -85C to +125C 30 . oCWW TEMPERATURE RANGE, case Meets full range specifications -25 +85 * . C * NOTES: The specification of PA84A is identical to the specification for PA84/PA84S in appticable column to the left. 1. Signal slew rates at pins 5 and 6 must be limited to less than 1V/ns to avoid damage. When faster waveforms are unavoidable, resistors in series with those pins, limiting current to 150mA will protect the amplifier from damage. to achieve high MTTF. Pape Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation The power supply voltage for all tests is +150V, unless otherwise noted as a test condition. Doubles for every 10C of temperature increase. +V, and -V, denote the positive and negative power supply rail respectively. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz. The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850C to avoid generating toxic fumes. APEX MICROTECHNOLOGY CORPORATION 5980: NORTH SHANNON ROAD TUCSON. ARIZONA 85741 * USA * APPLICATIONS HOTLINE: | (800) 546-2739 C158GRAPHS PA84 PA84A PA84S $ POWER DERATING $0 CURRENT LIMIT _ OPEN LOOP GAIN Q = =z Te = 85C g = 70 z E = 3 2 Z 60 a B E 8 a 6 2 50 2 Ww b& a = G 40 5 a = S To = -25C 2 = 30 E cas 2 s o Ww) b 20 a Z 0 2 50 75 100 125 150 55 -25 0 25 50 75 100 125 0 50 100 150 200 250 300 TEMPERATURE, Tg (C) CASE TEMPERATURE, Tg (C) TOTAL SUPPLY VOLTAGE, Vg (V) 420 SMALL SIGNAL RESPONSE 0 OUTPUT VOLTAGE SWING 300 POWER RESPONSE > | S A g 100 : G20 oD 3S = 150 , g 80 = - o ep To \ Xe 7 > 2 * % z ~ 100 a Z 60 2 o 3 % < 5 9 %, 9 e a = 60 KN a 40 a a 9 3 fe) 6 x > > 2 a 5 uu R, = 3.5K 9 a 30 2 a 0 Vg = 2150V -20 5 1 1 10 100 1K 10K 1M 1M 10M ~ 0 10 20 30 40 50 60 70 50K 1M .2M 3M .5M.7M1M FREQUENCY, F (Hz} OUTPUT CURRENT, Io (mA} FREQUENCY, F (Hz} SLEW RATE VS. COMP 16 SLEW RATE VS. SUPPLY 20 INPUT NOISE : RT x= 180 S14 3% = wu = & 100 < Z 10 S$ c 1.2 > E70 i @ 7 & a 1.0 t 5 a 50 oO 5 a N 3 > a z @ 30 Zz 6 DQ 3 =35KQ 8 RL =3.5KQ 5 20 4 a 2 1 1 3050 100 150 200 250 30 2 1 1 1 1 1 EXT. COMPENSATION RESISTANCE, Ag (Q) TOTAL SUPPLY VOLTAGE, Vs (V) FREQUENCY, F (Hz) 0 COMMON MODE REJECTION 0 POWER SUPPLY REJECTION 300 COMMON MODE VOLTAGE nN oa = nN oa 100 Q wo Oo oO aD Q o co b ao 40 Vg = 150V 15 n 3 POWER SUPPLY REJECTION, PSR (dB) o = So COMMON MODE VOLTAGE, Voy (Vpp) 1 10 160 1K 10K .1M 1M 1 10 100 1K i0K .iM 1M 10K 20K 50K 1M 2M 5M 1M FREQUENCY, F (Hz) FREQUENCY, F (Hz) FREQUENCY. F (Hz) COMMON MODE REJECTION, CMR (dB) APEX MICROTECHNOLOGY CORPORATION * TELEPHONE (520) 690-8600 + FAX (520) 888-3329 * ORDERS (520) 690-8601 * EMAIL ProdLir@TeamApex.com C159PA84 PA84A PA84S OPERATING CONSIDERATIONS GENERAL Please read the General Operating Considerations sec- tion, which covers stability, supplies, heatsinking, mounting, current limit, SOA interpretation, and specification interpreta- tion. Additional information can be found in the application notes. For information on the package outline, heatsinks, and mounting hardware, consult the Accessory and Package Mechanical Data section of the handbook. SAFE OPERATING AREA (SOA) The bipolar output stage of this high voltage operational amplifier has two output limitations: 1. The internal current fimit which fimits maximum available output current. 2. The second breakdown effect, which occurs whenever the simultaneous collector current and collector-emitter voltage exceeds specified limits. ou oS p oO S ir Z| V ; \ 25 LZ L) SAFE OPERATING AREA CURVES | 20 | 150. 170 200 250 300 SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE (V) OUTPUT CURRENT FROM +Vz, OR Vg (mA) The SOA curves combine the effect of these limits. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. However, the following guidelines may save extensive analytical efforts: 1. The following capacitive and inductive loads are safe: Vs C(MAX) L(MAX) 150V 1.2uF 7H 125V 6.0uF 25H 100V 12uF 90H 75V ALL ALL 2. Short circuits to ground are safe with dual supplies up to +150V or single supplies up to 150V. 3. Short circuits to the supply rails are safe with total supply voltages up to 150V (i.e. +75V). THERMAL SHUTDOWN PROTECTION PA84S does not have this feature. The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approximately 150C. This allows heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperatures during temporary fault conditions. Thermal protection is a fairly slow-acting circuit and there- fore does not protect the amplifier against transient SOA violations (areas outside of the T, = 25C boundary). It is designed to protect against short-term fault conditions that result in high power dissipation within the amplifier. If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, will destroy signal integrity, and reduce the reliability of the device. OUTPUT PROTECTION Two external diodes as shown in Figure 2, are required to protect these amplifiers against flyback (kickback) pulses exceeding the supply voltages of the amplifier when driving inductive loads. For component selection, these external diodes must be very quick, such as ultra fast recovery diodes with no more than 200 nanoseconds of reverse recovery time. The diode will turn on to divert the flyback energy into the supply rails thus protecting the output transistors from destruc- tion due to reverse bias. Anote of caution about the supply. The energy of the flyback pulse must be absorbed by the power supply. As a result, a transient will be superimposed on the supply voltage, the magnitude of the transient being a function of its transient impedance and current sinking capability. If the supply voltage plus transient exceeds the maximum supply rating or if the AC impedance of the supply is unknown, it is best to clamp the output and the supply with a zener diode to absorb the transient. FIGURE 1. PROTECTIVE, +V5 INDUCTIVE LOAD N x 'N4936 OR & VES1106 , NO A Vs STABILITY Due toits large bandwidth the PA84 is more likely to oscillate than lower bandwidth Power Operational Amplifiers such as the PA83 or PAOS. To prevent oscillations, a reasonable phase margin must be maintained by: 1. Selection of the proper phase compensation capacitor and resistor. Use the values given in the table under external connections and interpolate if necessary. The phase mar- gin can be increased by using a large capacitor and a smaller resistor than the slew rate optimized values listed in the table. The compensation capacitor may be connected to common (in lieu of +V,) if the positive supply is properly bypassed to common. Because the voltage at pin 8 is only a few volts below the positive supply, this ground connec- tion requires the use of a high voltage capacitor. 2. Keeping the external sumpoint stray capacitance to ground at a minimum and the sumpoint load resistance (input and feedback resistors in parallel) below 500Q. Larger sumpoint Joad resistance can be used with increased phase compen- sation (see 1 above). 3. Connecting the amplifier case to a local AC common thus preventing it from acting as an antenna. C160 Pasdt REN } MAY 1996 1) 1996 Apex Microtechnalogy Curp.PA84M APEX MICROTFCHNOL OGY CORPORATION APPLICATIONS HOTLINE 800 546-APEX (800-546-2739) SG PARAMETER SYMBOL | TEMP. | POWER | TEST CONDITIONS MIN MAX | UNITS 1 Quiescent Current Ig 25C | +150V | V,=0,A,= 100 7.5 mA 1 Input Offset Voltage Vos 25C | +150V | V,, = 0, A, = 100 3 mV 1 Input Offset Voltage Vos 25C +15V Vi = 0, Ay = 100 5.7 mV 1 Input Bias Current, +IN tle 25C | +150V | Vy =0 50 pA 1 Input Bias Current, -IN -la 25C | +150V Vn =O 50 pA 1 Input Offset Current log 25C | +150V | Vy =0 50 pA 3 Quiescent Current lo -5C | +150V | Vy =0, A,= 100 9.5 mA 3 Input Offset Voltage Vos -56C | +150V | V,, =0, A, = 100 5 mV 3 Input Offset Voltage Vos 85C | +15V Vin = 0, Ay= 100 7.7 mV 3 Input Bias Current, +IN +H, ~55C | +150V | Vy =0 50 pA 3 Input BiasCurrent, -1N Ip -55C | +150V | Vy=0 50 pA 3 Input Offset Current log -55C | 150V | Vy =O 50 pA 2 Quiescent Current lg 125C | +150V | V,,=0, Ay = 100 9.5 mA 2 Input Offset Voltage Vos 125C | +150V | Vy, =9, Ay = 100 5.5 mV 2 Input Offset Voltage Vos 125C | +15V | V,,=0, Ay = 100 8.2 mV 2 Input Bias Current, +IN tle 125C | +150V | V,=0 10 nA 2 Input Bias Current, -IN ~ls 125C | +150V | Vy, =0 10 nA 2 Input Offset Current los 125C | +150V | V, =0 10 nA 4 Output Voltage, Ip = 40mA Vo 25C | +47V R, = 1K 40 Vv 4 Output Voltage, Ip = 28.6mMA Vo 25C | +150V | R, =5K 143 Vv 4 Output Voltage, I, = 15mA Vo 25C | +80V | RL=5K 75 v 4 Current Limits ley 25C | +20V | R, = 10002 36 70 mA 4 Stabitity/Noise Ey 25C | +150V | R,=5K, A, = 1, C, = 10nF 1 mV 4 Slew Rate SR 25C | +150V | R_ = 5K, C, = 50pF 100 600 Vis 4 Open Loop Gain Aoi 25C | +150V | R, = 5k, F = 10Hz 100 dB 4 Common Mode Rejection CMR 25C | +32.5V | R, = 5k, F = DC, Vey = +22.5V 90 dB 6 Output Voltage, |, = 40mA Vo -55C | +47V R, = 1K 40 Vv 6 Output Voltage, |p = 28.6mA Vo -55C | 150V | R, = 5K 143 v 6 Output Voltage, Ip = 15mA Vo -55C | +80V | AR, =5K 75 Vv 6 Stability/Noise Ey -55C | +150V | R, = 5K, A,=1, 0, = 10nF 1 mv 6 Slew Rate SR -55C | +150V | R, = 5K, C, = 50pF 100 600 Vius 6 Open Loop Gain Aa -55C | +150V | R, = 5K, F = 10Hz 100 dB 6 Common Mode Rejection CMR -55C | +32.5V | A, = 5k. F=DC, Voy = +22.5V 90 dB 5 Output Voltage, |, = 30mA Vo 125C | +37V | RL =1K 30 v 5 Output Voltage, |, = 28.6mA Vo 126C | +t50V | R,=5K 143 v 5 Output Voltage, |, = 15mA Vo 125C | +80V R, = 5K 76 v 5 Stability/Noise Ex 125C | +150V | R,=5,A,=1,C, = 10nF 1 mv 5 Siew Rate SR 125C | +150V | R, = 5K, C, = 50pF 100 600 Vus 5 Open Loop Gain Ag 125C | +150V | R, = 5K, F = 10Hz 100 dB 5 Common Mode Rejection CMR 125C | +32.5V | R, = 5k, F= DC, Voy = +22.5V 90 dB BURN IN CIRCUIT = These components are used to stabilize device due to poor high frequency characteristics of burn in board. ** Input signals are calculated to result in internal power dissipation of approximately 2.1W at case temperature = 125C, PAS4MU REV F JUNE 1996) 1996 Apex Mictotechnoingy Corp C161