SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I - JANUARY 1991 - REVISED JUNE 2002 D D D D SN54ABT240 . . . J OR W PACKAGE SN74ABT240A . . . DB, DW, N, NS, OR PW PACKAGE (TOP VIEW) Typical VOLP (Output Ground Bounce) <1 V at VCC = 5 V, TA = 25C High-Drive Outputs (-32-mA IOH, 64-mA IOL) Ioff Supports Partial-Power-Down Mode Operation Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND description These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Together with the SN54ABT241, SN74ABT241A, SN54ABT244, and SN74ABT244A, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical active-low output-enable (OE) inputs, and complementary OE and OE inputs. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 2Y4 1A1 1OE VCC SN54ABT240 . . . FK PACKAGE (TOP VIEW) 1A2 2Y3 1A3 2Y2 1A4 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 1Y1 2A4 1Y2 2A3 1Y3 2Y1 GND 2A1 1Y4 2A2 The SN54ABT240 and SN74ABT240A are organized as two 4-bit buffers/line drivers with separate OE inputs. When OE is low, the devices pass inverted data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. 2OE D ORDERING INFORMATION PDIP - N -55C to 125C TOP-SIDE MARKING Tube SN74ABT240AN Tube SN74ABT240ADW Tape and reel SN74ABT240ADWR SOP - NS Tape and reel SN74ABT240ANSR ABT240A SSOP - DB Tape and reel SN74ABT240ADBR AB240A TSSOP - PW Tape and reel SN74ABT240APWR AB240A CDIP - J Tube SNJ54ABT240J SNJ54ABT240J CFP - W Tube SNJ54ABT240W SNJ54ABT240W LCCC - FK Tube SNJ54ABT240FK SOIC - DW -40C 40C to 85C ORDERABLE PART NUMBER PACKAGE TA SN74ABT240AN ABT240A SNJ54ABT240FK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I - JANUARY 1991 - REVISED JUNE 2002 description (continued) This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each buffer) INPUTS OUTPUT Y OE A L H L L L H H X Z logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO . . . . . . . . . -0.5 V to 5.5 V Current into any output in the low state, IO: SN54ABT240 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74ABT240A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -18 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Package thermal impedance, JA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-7. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I - JANUARY 1991 - REVISED JUNE 2002 recommended operating conditions (see Note 3) SN54ABT240 VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current t/v Input transition rise or fall rate High-level input voltage SN74ABT240A MIN MAX MIN MAX 4.5 5.5 4.5 5.5 2 2 0.8 Input voltage 0 Low-level output current Outputs enabled 0 V V 0.8 VCC -24 UNIT VCC -32 V V mA 48 64 mA 5 5 ns/V TA Operating free-air temperature -55 125 -40 85 C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VOH TEST CONDITIONS VCC = 4.5 V, VCC = 4.5 V, II = -18 mA IOH = -3 mA VCC = 5 V, VCC = 4 4.5 5V VOL VCC = 4 4.5 5V Vhys II Ioff ICEX IO Data inputs Control inputs Co MIN -1.2 MAX SN74ABT240A MIN -1.2 MAX -1.2 2.5 2.5 2.5 IOH = -3 mA IOH = -24 mA 3 3 3 2 2 IOH = -32 mA IOL = 48 mA 2* VI = VCC or GND VO = 2.7 V VCC = 5.5 V, VCC = 0, VO = 0.5 V VI or VO 4.5 V VCC = 5.5 V, VO = 5.5 V VCC = 5.5 V, Outputs high VO = 2.5 V Outputs high V V 0.55 0.55* 0.55 V mV 1 1 1 A 10 10 10 A -10 -10 -10 A 100 A 100 50 -50 UNIT 2 0.55 IOL = 64 mA VCC = 5.5 V, VCC = 5.5 V, 5 5 V, V IO = 0, 0 VCC = 5.5 VI = VCC or GND ICC Ci SN54ABT240 100 IOZH IOZL ICC TA = 25C MIN TYP MAX -100 -180 1 250 50 -50 -180 -50 250 50 A -180 mA 250 A Outputs low 24 30 30 30 mA Outputs disabled 0.5 250 250 250 A 1.5 1.5 1.5 0.05 0.05 0.05 1.5 1.5 1.5 VCC = 5.5 V, Outputs enabled One input at 3.4 V,, Other inputs at Outputs disabled VCC or GND VCC = 5.5 V, One input at 3.4 V, Other inputs at VCC or GND VI = 2.5 V or 0.5 V VO = 2.5 V or 0.5 V mA 4 pF 7.5 pF * On products compliant to MIL-PRF-38535, this parameter does not apply. All typical values are at VCC = 5 V. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I - JANUARY 1991 - REVISED JUNE 2002 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) SN54ABT240 PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y VCC = 5 V, TA = 25C MIN TYP MAX MIN MAX 1 2.9 4.3 0.8 5.5 1.6 3.1 4.5 1 5.5 1.1 3.1 5.8 0.8 7.5 1.1 2.7 6.2 0.8 7.7 1.8 4.6 5.9 1.7 7 1.6 4 5.9 1.3 7.2 UNIT ns ns ns switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) SN74ABT240A PARAMETER 4 FROM (INPUT) TO (OUTPUT) tPLH tPHL A Y tPZH tPZL OE Y tPHZ tPLZ OE Y POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 VCC = 5 V, TA = 25C MIN MAX MIN TYP MAX 1 2.9 4.1 1 4.8 1.6 3.1 4.6 1.6 4.8 1.1 3.1 4.7 1.1 5.2 1.1 2.7 5.8 1.1 6.2 1.8 4.6 5.7 1.8 6.4 1.6 4 5.4 1.6 5.8 UNIT ns ns ns SN54ABT240, SN74ABT240A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCBS098I - JANUARY 1991 - REVISED JUNE 2002 PARAMETER MEASUREMENT INFORMATION 500 From Output Under Test S1 7V Open GND CL = 50 pF (see Note A) 500 TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V Open 3V LOAD CIRCUIT Timing Input 1.5 V 0V tw tsu 3V th 3V 1.5 V Input 1.5 V Data Input 0V 1.5 V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 3V 3V 1.5 V Input Output Control 1.5 V 0V 1.5 V 1.5 V VOL tPLH tPHL VOH Output 1.5 V 1.5 V VOL 1.5 V 0V tPLZ Output Waveform 1 S1 at 7 V (see Note B) VOH Output 1.5 V tPZL tPHL tPLH 1.5 V Output Waveform 2 S1 at Open (see Note B) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS 1.5 V 3.5 V VOL + 0.3 V VOL tPHZ tPZH 1.5 V VOH - 0.3 V VOH 0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 , tr 2.5 ns, tf 2.5 ns. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 PACKAGE OPTION ADDENDUM www.ti.com 5-Sep-2011 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/ Ball Finish MSL Peak Temp Samples (Requires Login) 5962-9318801M2A ACTIVE LCCC FK 20 1 TBD Call TI Call TI 5962-9318801MRA ACTIVE CDIP J 20 1 TBD Call TI Call TI 1 TBD Call TI Call TI TBD Call TI Call TI 5962-9318801MSA ACTIVE CFP W 20 SN74ABT240ADBLE OBSOLETE SSOP DB 20 SN74ABT240ADBR ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADBRG4 ACTIVE SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240AN ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type CU NIPDAU N / A for Pkg Type SN74ABT240ANE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) SN74ABT240ANSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ANSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240ANSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240APW ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240APWE4 ACTIVE TSSOP PW 20 70 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 (3) PACKAGE OPTION ADDENDUM www.ti.com Orderable Device 5-Sep-2011 Status (1) Package Type Package Drawing Pins Package Qty 70 Eco Plan (2) Green (RoHS & no Sb/Br) Lead/ Ball Finish MSL Peak Temp Samples (Requires Login) SN74ABT240APWG4 ACTIVE TSSOP PW 20 SN74ABT240APWLE OBSOLETE TSSOP PW 20 SN74ABT240APWR ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240APWRE4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74ABT240APWRG4 ACTIVE TSSOP PW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SNJ54ABT240FK ACTIVE LCCC FK 20 1 TBD SNJ54ABT240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type SNJ54ABT240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type TBD (3) CU NIPDAU Level-1-260C-UNLIM Call TI Call TI POST-PLATE N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE OPTION ADDENDUM www.ti.com 5-Sep-2011 OTHER QUALIFIED VERSIONS OF SN54ABT240 : * Catalog: SN74ABT240 NOTE: Qualified Version Definitions: * Catalog - TI's standard catalog product Addendum-Page 3 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74ABT240ADBR SSOP DB 20 2000 330.0 16.4 8.2 7.5 2.5 12.0 16.0 Q1 SN74ABT240ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.0 2.7 12.0 24.0 Q1 SN74ABT240ANSR SO NS 20 2000 330.0 24.4 8.2 13.0 2.5 12.0 24.0 Q1 SN74ABT240APWR TSSOP PW 20 2000 330.0 16.4 6.95 7.1 1.6 8.0 16.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 14-Jul-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74ABT240ADBR SN74ABT240ADWR SSOP DB 20 2000 367.0 367.0 38.0 SOIC DW 20 2000 367.0 367.0 45.0 SN74ABT240ANSR SO NS 20 2000 367.0 367.0 45.0 SN74ABT240APWR TSSOP PW 20 2000 367.0 367.0 38.0 Pack Materials-Page 2 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 28 PINS SHOWN 0,38 0,22 0,65 28 0,15 M 15 0,25 0,09 8,20 7,40 5,60 5,00 Gage Plane 1 14 0,25 A 0-8 0,95 0,55 Seating Plane 2,00 MAX 0,10 0,05 MIN PINS ** 14 16 20 24 28 30 38 A MAX 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 DIM 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46C and to discontinue any product or service per JESD48B. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as "components") are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. 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