LOW SKEW, 1:6 CRYSTAL-TO-
LVCMOS/LVTTL FANOUT BUFFER
ICS83905
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 1 ICS83905AM REV. B JULY 9, 2007
GENERAL DESCRIPTION
The ICS83905 is a low skew, 1-to-6 LVCMOS / LVTTL
Fanout Buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions from IDT.
The low impedance LVCMOS/LVTTL outputs are de-
signed to drive 50Ω series or parallel terminated
transmission lines. The effective fanout can be increased from 6
to 12 by utilizing the ability of the outputs to drive two series
terminated lines.
The ICS83905 is characterized at full 3.3V, 2.5V, and 1.8V,
mixed 3.3V/2.5V, 3.3V/1.8V and 2.5V/1.8V output operating
supply mode. Guaranteed output and part-to-part skew char-
acteristics along with the 1.8V output capabilities makes the
ICS83905 ideal for high performance, single ended applica-
tions that also require a limited output voltage.
FEATURES
•Six LVCMOS / LVTTL outputs
•Outputs able to drive 12 series terminated lines
•Crystal oscillator interface
•Crystal input frequency range: 10MHz to 40MHz
•Output skew: 80ps (maximum)
•RMS phase jitter @ 25MHz, (100Hz - 1MHz):
0.26ps (typical) (VDD = VDDO = 2.5V)
Phase noise:
Offset Noise Power
100Hz ............. -129.7 dBc/Hz
1kHz ............. -144.4 dBc/Hz
10kHz ............. -147.3 dBc/Hz
100kHz ............. -157.3 dBc/Hz
•5V tolerant enable inputs
•Synchronous output enables
•Operating power supply modes:
Full 3.3V, 2.5V and 1.8V,
mixed 3.3V core/2.5V output operating supply,
mixed 3.3V core/1.8V output operating supply,
mixed 2.5V core/1.8V output operating supply
•0°C to 70°C ambient operating temperature
•Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
HiPerClockS™
ICS
XTAL_OUT
ENABLE 2
GND
BCLK0
VDDo
BCLK1
GND
BCLK2
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
XTAL_IN
ENABLE 1
BCLK5
VDDO
BCLK4
GND
BCLK3
VDD
ICS83905
16-Lead SOIC
3.9mm x 9.9mm x 1.38mm body
package
M Pacakge
Top View
16-Lead TSSOP
4.4mm x 5.0mm x 0.92mm body
package
G Pacakge
Top View
20 19 18 17 16
6 7 8 9 10
1
2
3
4
5
15
14
13
12
11
ENABLE 2
XTAL_OUT
XTAL_IN
ENABLE 1
nc
BCLK5
VDDO
BCLK4
GND
GND
GND
GND
BCLK0
VDDO
BCLK1
GND
GND
BCLK2
VDD
BCLK3
ICS83905
20-Lead VFQFN
4mm x 4mm x 0.9mm
body package
K Package
Top View
PIN ASSIGNMENTS
BLOCK DIAGRAM
SYNCHRONIZE
SYNCHRONIZE
BCLK0
BCLK1
BCLK2
BCLK3
BCLK4
BCLK5
ENABLE 1
ENABLE 2
XTAL_IN
XTAL_OUT
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 2 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
TABLE 3. CLOCK ENABLE FUNCTION TABLE
emaNepyTnoitpircseD
TUO_LATXtuptuO.tuptuoehtsiTUO_LATX.ecafretnirotallicsolatsyrC
NI_LATXtupnI.tupniehtsiNI_L
ATX.ecafretnirotallicsolatsyrC
2ELBANE,1ELBANEtupnI .3elbaTeeS.slevelecafretniLTTVL/SOMCVL.elbanekcolC
,2
KLCB,1KLCB,0KLCB
5KLCB,4KLCB,3KLCB tuptuO.slevelecafretniLTTVL/SOMCVL.stuptuokcolC
DNGrewoP.dnuorgylppusrew
oP
V
DD
rewoP.nipylppuseroC
V
ODD
rewoP.nipylppustuptuO
c/ndesunU.tcennocoN
stupnIlortnoCstuptuO
1ELBANE2ELBANE4KLCB:0KLCB5KLCB
00 WOLWOL
01 WOLgnilggoT
10 gnilggoTWOL
11 gnilggoTgnilggoT
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
C
NI
ecnaticapaCtupnI 4Fp
C
DP
ecnaticapaCnoitapissiDrewoP
)tuptuorep(
V
ODD
V564.3=91Fp
V
ODD
V526.2=81Fp
V
ODD
V2=61Fp
R
TUO
ecnadepmItuptuO
V
ODD
%5±V3.3=7
Ω
V
ODD
%5±V5.2=7
Ω
V
ODD
V2.0±V8.1=01Ω
BCLK5
BCLK0:4
ENABLE2
ENABLE1
FIGURE 1. ENABLE TIMING DIAGRAM
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 3 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 531.33.3564.3V
I
DD
tnerruCylppuSrewoP00=2:1ELBANE01Am
I
ODD
tnerruCylppuStuptuO00=2:1ELBANE5Am
TABLE 4B. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 2.5V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 573.25.2526.2V
V
ODD
egatloVylppuStuptuO 573.25.2526.2V
I
DD
tnerruCylppuSrewoP00=2:1ELBANE8Am
I
ODD
tnerruCylppuStuptuO00=2:1ELBANE4Am
TABLE 4C. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 1.8V±0.2V, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 6.18.10.2V
V
ODD
egatloVylppuStuptuO 6.18.10.2V
I
DD
tnerruCylppuSrewoP00=2:1ELBANE5Am
I
ODD
tnerruCylppuStuptuO00=2:1ELBANE3Am
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
DD 4.6V
Inputs, VI-0.5V to VDD + 0.5 V
Outputs, V
O-0.5V to VDDO + 0.5V
Package Thermal Impedance, θ
JA
16 Lead SOIC package 78.8°C/W (0 mps)
16 Lead TSSOP package 89°C/W (0 lfpm)
20 Lead VFQFN package 60.4°C/W (0 mps)
Storage Temperature, T
STG -65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional op-
eration of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not
implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect product reliability.
TABLE 4D. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 573.25.2526.2V
I
DD
tnerruCylppuSrewoP00=2:1ELBANE01Am
I
ODD
tnerruCylppuStuptuO00=2:1ELBANE4Am
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 4 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 4G. LVCMOS/LVTTL DC CHARACTERISTICS, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
HI
egatloVhgiHtupnI ,1ELBANE
2ELBANE
V
DD
%5±V3.3=2V
DD
3.0+V
V
DD
%5±V5.2=7.1V
DD
3.0+V
V
DD
V2.0±V8.1=V*56.0
DD
V
DD
3.0+V
V
LI
egatloVwoLtupnI ,1ELBANE
2ELBANE
V
DD
%5±V3.3=3.0-8.0V
V
DD
%5±V5.2=3.0-7.0V
V
DD
V2.0±V8.1=3.0-V*53.0
DD
V
V
HO
hgiHtuptuOegatloV
V
ODD
1ETON;%5±V3.3=6.2V
V
ODD
I;%5±V5.2=
HO
Am1-=2 V
V
ODD
1ETON;%5±V5.2=8.1V
V
ODD
1ETON;V2.0±V8.1=V
ODD
3.0-V
V
LO
egatloVwoLtuptuO
V
ODD
1ETON;%5±V3.3=5.0V
V
ODD
I;%5±V5.2=
LO
Am1=4.0V
V
ODD
1ETON;%5±V5.2=54.0V
V
ODD
1ETON;V2.0±V8.1=53.0V
05htiwdetanimretstuptuO:1ETON ΩVot
ODD
.smargaid"tiucriCtseTdaoL",noitcestnemerusaeMretemaraPeeS.2/
TABLE 4E. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 531.33.3564.3V
V
ODD
egatloVylppuStuptuO 6.18.10.2V
I
DD
tnerruCylppuSrewoP00=2:1ELBANE01Am
I
ODD
tnerruCylppuStuptuO00=2:1ELBANE3Am
TABLE 4F. POWER SUPPLY DC CHARACTERISTICS, VDD = 2.5V±5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
V
DD
egatloVylppuSeroC 573.25.2526.2V
V
ODD
egatloVylppuStuptuO 6.18.10.2V
I
DD
tnerruCylppuSrewoP00=2:1ELBANE8Am
I
ODD
tnerruCylppuStuptuO00=2:1ELBANE3Am
TABLE 5. CRYSTAL CHARACTERISTICS
retemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
noitallicsOfoedoM latnemadnuF
ycneuqerF 0104zHM
)RSE(ecnatsiseR
seireStnelaviuqE 05 Ω
ecnaticapaCtnuhS 7Fp
leveLevirD 1Wm
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 5 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 6A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C
TABLE 6B. AC CHARACTERISTICS, VDD = VDDO = 2.5V±5%, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO
latsyrClanretxEgnisU0104zHM
kcolClanretxEgnisU
;ecruoS1ETON CD001zHM
cdoelcyCytuDtuptuO 8425%
t)o(ks4,
2ETON;wekStuptuO 08sp
t)Ø(tij)modnaR(rettiJesahPSMR noitargetnI(@zHM52
)zHM1-zH001:egnaR 31.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02002008sp
t
NE
;emiTelbanEtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
t
SID
;emiTelbasiDtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
ƒtaderusaemsretemarapllA ≤f
XAM
.esiwrehtodetonsselnutupnilatsyrcagnisu
05tadetanimreT ΩVot
ODD
.2/
.edivorpdluowlatsyrcalangisaotevitalernevirdrevoebnacNI_LATX:1ETON
VtaderusaeM.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:3ETON
.56dradnatSCEDEJhtiwecn
adroccanidenifedsiretemarapsihT:4ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO
latsyrClanretxEgnisU0104zHM
kcolClanretxEgnisU
;ecruoS1ETON CD001zHM
cdoelcyCytuDtuptuO 7435%
t)o(ks5,
2ETON;wekStuptuO 08sp
t)Ø(tij3ETON;)modnaR(rettiJesahPSMR noitargetnI(@zHM52
)zHM1-zH001:egnaR 62.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02002008sp
t
NE
;emiTelbanEtuptuO
4ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
t
SID
;emiTelbasiDtuptuO
4ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
ƒtaderusaemsretemarapllA ≤f
XAM
.esiwrehtodetonsselnutupnilatsyrcagnisu
05tadetanimreT ΩVot
ODD
.2/
.edivorpdluowlatsyrcalangisaotevitalernevirdrevoebnacNI_LATX:1ETON
VtaderusaeM.snoitidnocdaollauqeh
tiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
ODD
.2/
.tolpesionesahpotreferesaelP:3ETON
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarap
esehT:4ETON
.56dradnatSCEDEJhtiwecnadroccanidenifedsiretemarapsihT:5ETON
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 6 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 6D. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C
TABLE 6C. AC CHARACTERISTICS, VDD = VDDO = 1.8V±0.2V, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO
latsyrClanretxEgnisU0104zHM
kcolClanretxEgnisU
;ecruoS1ETON CD001zHM
cdoelcyCytuDtuptuO 7435%
t)o(ks4,
2ETON;wekStuptuO 08sp
t)Ø(tij)modnaR(rettiJesahPSMR noitargetnI(@zHM52
)zHM1-zH001:egnaR 72.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02002009sp
t
NE
;emiTelbanEtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
t
SID
;emiTelbasiDtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
ƒtaderusaemsretemarapllA ≤f
XAM
.esiwrehtodetonsselnutupnilatsyrcagnisu
05tadetanimreT ΩVot
ODD
.2/
.edivorpdluowlatsyrcalangisaotevitalernevirdrevoebnacNI_LATX:1ETON
VtaderusaeM.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:3ETON
.56dradnatSCEDEJhtiwecn
adroccanidenifedsiretemarapsihT:4ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO
latsyrClanretxEgnisU0104zHM
kcolClanretxEgnisU
;ecruoS1ETON CD001zHM
cdoelcyCytuDtuptuO 8425%
t)o(ks4,
2ETON;wekStuptuO 08sp
t)Ø(tij)modnaR(rettiJesahPSMR noitargetnI(@zHM52
)zHM1-zH001:egnaR 41.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02002008sp
t
NE
;emiTelbanEtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
t
SID
;emiTelbasiDtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
ƒtaderusaemsretemarapllA ≤f
XAM
.esiwrehtodetonsselnutupnilatsyrcagnisu
05tadetanimreT ΩVot
ODD
.2/
.edivorpdluowlatsyrcalangisaotevitalernevirdrevoebnacNI_LATX:1ETON
VtaderusaeM.snoitidnocdaollauqeh
tiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:3ETON
.56dradnatSCEDEJhtiwecn
adroccanidenifedsiretemarapsihT:4ETON
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 7 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 6E. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C
TABLE 6F. AC CHARACTERISTICS, VDD = 2.5V±5%, VDDO = 1.8V±0.2V, TA = 0°C TO 70°C
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO
latsyrClanretxEgnisU0104zHM
kcolClanretxEgnisU
;ecruoS1ETON CD001zHM
cdoelcyCytuDtuptuO 8425%
t)o(ks4,
2ETON;wekStuptuO 08sp
t)Ø(tij)modnaR(rettiJesahPSMR noitargetnI(@zHM52
)zHM1-zH001:egnaR 81.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02002009sp
t
NE
;emiTelbanEtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
t
SID
;emiTelbasiDtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
ƒtaderusaemsretemarapllA ≤f
XAM
.esiwrehtodetonsselnutupnilatsyrcagnisu
05tadetanimreT ΩVot
ODD
.2/
.edivorpdluowlatsyrcalangisaotevitalernevirdrevoebnacNI_LATX:1ETON
VtaderusaeM.snoitidnocdaollauqehtiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:3ETON
.56dradnatSCEDEJhtiwecn
adroccanidenifedsiretemarapsihT:4ETON
lobmySretemaraPsnoitidnoCtseTmuminiMlacipyTmumixaMstinU
f
XAM
ycneuqerFtuptuO
latsyrClanretxEgnisU0104zHM
kcolClanretxEgnisU
;ecruoS1ETON CD001zHM
cdoelcyCytuDtuptuO 7435%
t)o(ks4,
2ETON;wekStuptuO 08sp
t)Ø(tij)modnaR(rettiJesahPSMR noitargetnI(@zHM52
)zHM1-zH001:egnaR 91.0sp
t
R
/t
F
emiTllaF/esiRtuptuO%08ot%02002009sp
t
NE
;emiTelbanEtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
t
SID
;emiTelbasiDtuptuO
3ETON
1ELBANE 4selcyc
2ELBANE 4selcyc
ƒtaderusaemsretemarapllA ≤f
XAM
.esiwrehtodetonsselnutupnilatsyrcagnisu
05tadetanimreT ΩVot
ODD
.2/
.edivorpdluowlatsyrcalangisaotevitalernevirdrevoebnacNI_LATX:1ETON
VtaderusaeM.snoitidnocdaollauqeh
tiwdnaegatlovylppusemasehttastuptuoneewtebwekssadenifeD:2ETON
ODD
.2/
.noitcudorpnidetsettoN.noitaziretcarahcybdeetnaraugerasretemarapesehT:3ETON
.56dradnatSCEDEJhtiwecn
adroccanidenifedsiretemarapsihT:4ETON
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 8 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TYPICAL PHASE NOISE AT 25MHZ (2.5V CORE/ 2.5V OUTPUT)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
10 100 1k 10k 100k 1M
25MHz
RMS Phase Jitter (Random)
100Hz to 1MHz = 0.26ps (typical)
OFFSET FREQUENCY (HZ)
NOISE POWER dBc
Hz
Raw Phase Noise Data
➤
TYPICAL PHASE NOISE AT 25MHZ (3.3V CORE/ 3.3V OUTPUT)
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
10 100 1k 10k 100k 1M
25MHz
RMS Phase Jitter (Random)
100Hz to 1MHz = 0.13ps (typical)
OFFSET FREQUENCY (HZ)
NOISE POWER dBc
Hz
Raw Phase Noise Data
➤
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 9 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
PARAMETER MEASUREMENT INFORMATION
SCOPE
Qx
LVCMOS
GND
1.8V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT
2.4±0.9V
VDDO
-0.9V±0.1V
VDD
0.9V±0.1V
SCOPE
Qx
LVCMOS
GND
2.5V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
2.05V±5%
VDDO
-1.25V±5%
VDD
1.25V±5%
3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
GND
1.65V±5%
-1.65V±5%
3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT
3.3V CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT 2.5 CORE/1.8V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
LVCMOS
GND
1.25V±5%
-1.25V±5%
SCOPE
Qx
LVCMOS
GND
0.9V±0.1V
-0.9V ± 0.1V
SCOPE
Qx
LVCMOS
GND
1.6V±0.025%
VDDO
-0.9V±0.1V
VDD
0.9V±0.1V
VDD,
VDDO
VDD,
VDDO
VDD,
VDDO
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 10 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Clock
Outputs
20%
80% 80%
20%
t
R
t
F
tPERIOD
tPW
tPERIOD
odc =
V
DD
2
x 100%
tPW
BCLKx
OUTPUT RISE/FALL TIME
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIODOUTPUT SKEW
tsk(o)
V
DDO
2
V
DDO
2
Qy
Qx
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 11 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
APPLICATION INFORMATION
CRYSTAL INPUT INTERFACE
Figure 2 shows an example of ICS83905 crystal interface with a
parallel resonant crystal. The frequency accuracy can be fine
tuned by adjusting the C1 and C2 values. For a parallel crystal
with loading capacitance CL = 18pF, we suggest C1 = 15pF and
C2 = 15pF to start with. These values may be slightly fine tuned
further to optimize the frequency accuracy for different board
layouts. Slightly increasing the C1 and C2 values will slightly reduce
the frequency. Slightly decreasing the C1 and C2 values will slightly
increase the frequency. For the oscillator circuit below, R1 can be
used, but is not required. For new designs, it is recommended
that R1 not be used.
FIGURE 2. CRYSTAL OSCILLATOR INTERFACE
C1
15p
R1 (optional)
0
X1
18pF Parallel Cry stal
C2
15p
XTAL_IN
XTAL_OUT
LVCMOS TO XTAL INTERFACE
The XTAL_IN input can accept a single-ended LVCMOS
signal through an AC couple capacitor. A general interface
diagram is shown in Figure 3. The XTAL_OUT pin can be left
floating. The input edge rate can be as slow as 10ns. For
LVCMOS inputs, it is recommended that the amplitude be
reduced from full swing to half swing in order to prevent signal
interference with the power rail and to reduce noise. This
configuration requires that the output impedance of the driver
(Ro) plus the series resistance (Rs) equals the transmission
line impedance. In addition, matched termination at the crystal
input will attenuate the signal in half. This can be done in one
of two ways. First, R1 and R2 in parallel should equal the
transmission line impedance. For most 50Ω applications, R1
and R2 can be 100Ω. This can also be accomplished by
removing R1 and making R2 50Ω.
FIGURE 3. GENERAL DIAGRAM FOR LVCMOS DRIVER TO XTAL INPUT INTERFACE
XTA L _ I N
XTA L _ O U T
VCC
R2
Ro
R1
Zo = 50
Rs
VCC
.1uf
VDD VDD
Zo = Ro + Rs
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 12 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
INPUTS:
LVCMOS CONTROL PINS
All control pins have internal pull-ups or pull-downs; additional
resistance is not required but can be added for additional
protection. A 1kΩ resistor can be used.
RECOMMENDATIONS FOR UNUSED INPUT AND OUTPUT PINS
OUTPUTS:
LVCMOS OUTPUTS
All unused LVCMOS output can be left floating. There should be
no trace attached.
EXPOSED PAD
Expose Metal Pad
(GROUND PAD)
GROUND PLANE
SOLDER
SIGNAL
TRACE
SIGNAL
TRACE
THERM AL VIA
SOLDER M ASK
FIGURE 4. P.C. BOARD FOR EXPOSED PAD THERMAL RELEASE PATH EXAMPLE
THERMAL RELEASE PATH
The expose metal pad provides heat transfer from the device to
the P.C. board. The expose metal pad is ground pad connected
to ground plane through thermal via. The exposed pad on the
device to the exposed metal pad on the PCB is contacted through
solder as shown in Figure 4. For further information, please refer
to the Application Note on Surface Mount Assembly of Amkor’s
Thermally /Electrically Enhance Leadframe Base Package, Amkor
Technology.
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 13 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
LAYOUT GUIDELINE
Figure 5 shows an example of ICS83905 application schematic.
In this example, the device is operated at VDD = 3.3V and VDDO =
3.3V. The decoupling capacitors should be located as close as
possible to the power pins. The input is driven by an 18pF load
resonant quartz crystal. The tuning capacitors (C1, C2) are fairly
VDD
R2
31
C6
.1uF
VDDO
ENABLE 2
R4
100
Zo = 50 OhmVDD = 3.3V
C2
15pf
VDD
C1
15pF
LVCMOS
ENABLE 1
CL = 18 pf
Optional Termination
R3
100
C4
.1uF
LVCMOS
Zo = 50 Ohm
VDDO
U1
ICS83905
1
2
3
4
5
6
7
8 9
10
11
12
13
14
15
16
XTA L _ O U T
ENABLE 2
GND
BCLK0
VDDO
BCLK1
GND
BCLK2 VDD
BCLK3
GND
BCLK4
VDDO
BCLK5
ENABLE 1
XTA L _ I N
C3
10uF
VDDO = 3.3V
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
C5
.1uF
accurate, but minor adjustments might be required. For the
LVCMOS output drivers, two termination examples are shown in
the schematic. For additional termination, examples are shown
in the LVCMOS Termination Application Note.
FIGURE 5. SCHEMATIC OF RECOMMENDED LAYOUT
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 14 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
RELIABILITY INFORMATION
TRANSISTOR COUNT
The transistor count for ICS83905 is: 339
Pin compatible to MPC905
TABLE 7B. θ
JAVS. AIR FLOW TABLE FOR 16 LEAD TSSOP
θθ
θθ
θJA by Velocity (Linear Feet per Minute)
0 200 500
Single-Layer PCB, JEDEC Standard Test Boards 137.1°C/W 118.2°C/W 106.8°C/W
Multi-Layer PCB, JEDEC Standard Test Boards 89.0°C/W 81.8°C/W 78.1°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TABLE 7A. θ
JAVS. AIR FLOW TABLE FOR 16 LEAD SOIC
θθ
θθ
θJA by Velocity (Meters per Second)
012
Multi-Layer PCB, JEDEC Standard Test Boards 78.8°C/W 71.1°C/W 66.2°C/W
TABLE 7C. θ
JAVS. AIR FLOW TABLE FOR 20 LEAD VFQFN
θθ
θθ
θJA by Velocity (Meters per Second)
013
Multi-Layer PCB, JEDEC Standard Test Boards 60.4°C/W 52.8°C/W 46.0°C/W
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 15 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
PACKAGE OUTLINE - G SUFFIX FOR 16 LEAD TSSOP
LOBMYS sretemilliM
muminiMmumixaM
N61
A--02.1
1A50.051.0
2A08.050.1
b91.003.0
c90.002.0
D09.401.5
ECISAB04.6
1E03.405.4
eCISAB56.0
L5
4.057.0
α°0°8
aaa--01.0
PACKAGE OUTLINE - M SUFFIX FOR 16 LEAD SOIC
TABLE 8A. PACKAGE DIMENSIONS FOR 16 LEAD SOIC
Reference Document: JEDEC Publication 95, MS-012
LOBMYS sretemilliM
MUMINIMMUMIXAM
N61
A53.157.1
1A01.052.0
B33.015.0
C91.052.0
D08.900.01
E08.300.4
eCISAB72.1
H08.502.6
h52.005.0
L04
.072.1
α°0°8
TABLE 8B. PACKAGE DIMENSIONS FOR TSSOP
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 16 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TABLE 8C. PACKAGE DIMENSIONS FOR 20 LEAD VFQFN
PACKAGE OUTLINE - K SUFFIX FOR 20 LEAD VFQFN
NOITAIRAVCEDEJ
SRETEMILLIMNISNOISNEMIDLLA
LOBMYSMUMINIMMUMIXAM
N02
A08.00.1
1A 050.0
3A ecnerefeR52.0
b81.003.0
eCIS
AB05.0
N
D
5
N
E
5
D0.4
2D 57.008.2
E0.4
2E 57.008.2
L53.057.0
Reference Document: JEDEC Publication 95, MO-220
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 17 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology, Incorporated (IDT) assumes no responsibility for either its use or for
infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring high reliability or other extraordinary environmental requirements are not recommended without additional processing by IDT. IDT reserves
the right to change any circuitry or specifications without notice. IDT does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
TABLE 9. ORDERING INFORMATION
rebmuNredrO/traPgnikraMegakcaPgnigakcaPgnippihSerutarepmeT
MA50938SCIMA50938CIOSdaeL61ebutC°07otC°0
TMA50938SCIMA50938CIOSdaeL61leer&epat0052C°07otC°0
FLMA50938SCILMA50938CIOS"eerF-daeL"daeL61ebutC°07otC°0
TFLMA50938SCILMA5
0938CIOS"eerF-daeL"daeL61leer&epat0052C°07otC°0
GA50938SCIGA50938POSSTdaeL61ebutC°07otC°0
TGA50938SCIGA50938POSSTdaeL61leer&epat0052C°07otC°0
FLGA50938SCILGA50938POSST"eerF-daeL"daeL61ebutC°07otC°0
TFLGA50938SCILGA50938POSS
T"eerF-daeL"daeL61leer&epat0052C°07otC°0
KA50938SCIA50938NFQFVdaeL02ebutC°07otC°0
TKA50938SCIA50938NFQFVdaeL02leer&epat0052C°07otC°0
FLKA50938SCILA5093NFQFV"eerF-daeL"daeL02ebutC°07otC°0
TFLKA50938SCILA5093NFQFV"eerF-daeL"daeL02leer&epat0052C°07otC°0
NOTE: Parts that are ordered with an “LF” suffix to the part number are the Pb-Free configuration and are RoHS compliant.
IDT™ / ICS™ LVCMOS/LVTTL FANOUT BUFFER 18 ICS83905AM REV. B JULY 9, 2007
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
TEEHSYROTSIHNOISIVER
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© 2007 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT, the IDT logo, ICS and HiPerClockS are trademarks
of Integrated Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be
trademarks or registered trademarks used to identify products or services of their respective owners.
Printed in USA
ICS83905
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
