0.8–6 GHz 3V Downconverter
Technical Data
Features
• +0 dBm Input IP3 at 1.9 GHz
• Single +3V Supply
• 8.5 dB SSB Noise Figure at
1.9 GHz
• 9.0 dB Conversion Gain at
1.9 GHz
• Ultra-miniature Package
Applications
• Downconverter for PCS,
PHS, ISM, WLL, and other
Wireless Applications
IAM-91563
Description
Agilent’s IAM-91563 is an eco-
nomical 3V GaAs MMIC mixer
used for frequency down-conver-
sion. RF frequency coverage is
from 0.8 to 6 GHz and IF coverage
is from 50 to 700 MHz. Packaged
in the SOT-363 package, this
4.0 sq. mm. package requires half
the board space of a SOT-143 and
only 15% the board space of an
SO-8 package.
At 1.9 GHz, the IAM-91563
provides 9 dB of conversion gain,
thus eliminating an RF or IF gain
stage normally needed with a
lossy mixer. LO drive power is
nominally only -5 dBm, eliminat-
ing an LO buffer amplifier. The
8.5 dB noise figure is low enough
to allow the system to use a low
cost LNA. The -6 dBm Input IP3
provides adequate system linearity
for most commercial applications,
but is adjustable to 0 dBm.
The circuit uses GaAs PHEMT
technology with proven reliability,
and uniformity. The MMIC
consists of a cascode FET struc-
ture that provides unbalanced gm
modulation type mixing. An on-
chip LO buffer amp drives the
mixer while bias circuitry allows a
single +3V supply (through a
choked IF port). The LO port is
internally matched to 50 Ω. The
RF and IF ports are high imped-
ance and require external match-
ing networks.
Surface Mount Package
SOT-363 (SC-70)
Pin Connections and
Package Marking
IF and V
d
GND
91
LO
GND
RF
1
2
3
6
5
4 SOURCE
BYPASS
Note:
1. Package marking provides orienta-
tion and identification.
LO
1
SOURCE
BYPASS
4
RF
3
GROUND
2, 5
IF and V
d
6
Simplified Schematic
2
IAM-91563 Absolute Maximum Ratings Absolute
Symbol Parameter Units Maximum[1]
VdDevice Voltage, RF output to ground V 6.0
VRF, VLO RF voltage or LO voltage to ground V +0.5, -1.0
Pin CW RF Input Power dBm +13
Tch Channel Temperature °C 150
TSTG Storage Temperature °C -65 to 150
Thermal Resistance[2]:
θch-c = 310°C/W
Notes:
1. Permanent damage may occur if
any of these limits are exceeded.
2. TC = 25°C (TC is defined to be the
temperature at the package pins
where contact is made to the
circuit board).
IAM-91563 Electrical Specifications, TC = 25°C, Vd = 3V
Symbol Parameters and Test Conditions Units Min. Typ. Max. Std Dev[2]
Gtest Gain in test circuit[1] RF=1890 GHz, IF=250 MHz dB 4.0 9.0
NFtest Noise Figure in test circuit[1] RF=1890 GHz, IF=250 MHz dB 8.5 11.0
IdDevice Current mA 6.0 9.0 12.0
NF Noise Figure (RF & IF with external matching, f = 0.9 GHz dB 7.0
IF=250 MHz, LO power=-5 dBm) f = 1.9 GHz 8.5 0.5
f = 2.4 GHz 11.0
f = 4.0 GHz 16.5
f = 6.0 GHz 18.0
GcConversion gain (RF and IF with external matching, f = 0.9 GHz dB 11.0
IF=250 MHz, LO power=-5 dBm) f = 1.9 GHz 9.0 1.5
f = 2.4 GHz 7.7
f = 4.0 GHz 4.6
f = 6.0 GHz 1.7
P1 dB Output power @ 1 dB compression (RF and IF with f = 0.9 GHz dBm -6.7
external matching, IF=250 MHz, LO power =-5 dBm) f = 1.9 GHz -8.0 1.3
f = 2.4 GHz -8.7
f = 4.0 GHz -15.0
f = 6.0 GHz -17.8
RLRF RF port return loss f = 0.5 - 6.0 GHz dB -1.7 0.2
RLLO LO port return loss f = 0.5 - 6.0 GHz dB -9.4 0.3
RLIF IF port return loss f = 50 - 700 MHz dB -3.7 0.2
IP3Input Third Order Intercept Point RF = 1.9 GHz, IF = 250 MHz dBm -6.0 1.3
Id = 9.0 mA, LO power = -5 dBm
IP3Input Third Order Intercept Point RF = 1.9 GHz, IF = 250 MHz dBm 0 1.1
Id = 15 mA, LO power = -2 dBm
ISOLL-R LO-RF Isolation RF = 1.9 GHz dB 18
ISOLR-I RF-IF Isolation (No Match) dB 2
ISOLL-I LO-IF Isolation (No Match) dB 4
Notes:
1. Guaranteed specifications are 100% tested in the circuit in Figure 18 in the Applications Information section.
2. Standard deviation number is based on measurement of at least 500 parts from three non-consecutive wafer lots during
the initial characterization of this product, and is intended to be used as an estimate for distribution of the typical
specification.
3
IAM-91563 Typical Performance, TC=25°C, Vd =3.0 V, RF=1890 MHz, LO=-5 dBm, IF=250 MHz,
unless otherwise stated.
034512 6 0 34512 6 0 34512 6
FREQUENCY (GHz) FREQUENCY (GHz)
Figure 1. Available Conversion Gain
vs. Frequency and Temperature. Figure 2. Noise Figure (into 50 Ω)
vs. Frequency and Temperature.
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
0
2
4
6
8
12
10
GAIN
(dB)
6
8
10
12
14
20
18
16
NOISE FIGURE
(dB)
FREQUENCY (GHz)
Figure 3. Output Power (@ 1 dB
Compression) vs. Frequency and
Temperature.
-20
-18
-16
-14
-12
-4
-6
-8
-10
P
1 dB
(dBm)
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
T
A
= +85°C
T
A
= +25°C
T
A
= –40°C
034512 6 034512 6 0 34512 6
0
2
4
6
8
12
10
GAIN
(dB)
6
8
10
12
14
20
18
16
NOISE FIGURE
(dB)
FREQUENCY (GHz) FREQUENCY (GHz)
Figure 4. Available Conversion Gain
vs. Frequency and Voltage. Figure 5. Noise Figure (into 50 Ω) vs.
Frequency and Supply Voltage.
FREQUENCY (GHz)
Figure 6. Output Power (@ 1 dB
Compression) vs. Frequency and
Voltage.
-20
-18
-16
-14
-12
-4
-6
-8
-10
P
1 dB
(dBm)
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
034512 6 03451 2 0 300 400 500100 200 600 700
-10
-9
-8
-7
-6
-5
-4
-3
0
-1
-2
RETURN LOSS (dB)
0
2
4
8
6
12
10
DEVICE CURRENT
(mA)
FREQUENCY (GHz) SUPPLY VOLTAGE (V)
Figure 7. RF, LO, and IF Return Loss
vs. Frequency. Figure 8. Device Current vs. Supply
Voltage and Temperature.
IF FREQUENCY (MHz)
Figure 9. SSB Noise Figure vs.
Frequency and Supply Voltage.
2
4
6
8
12
10
SSB NOISE FIGURE
(dB)
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
V
d
= 3.3V
V
d
= 3.0V
V
d
= 2.7V
LO
RF
IF
4
IAM-91563 Typical Performance, TC=25°C, Vd =3.0 V, RF=1890 MHz, LO=-5 dBm, IF=250 MHz,
unless otherwise stated.
0 300 400 500100 200 600 700
IF FREQUENCY (MHz)
Figure 12. Conversion Gain vs.
Frequency and Temperature.
2
4
6
8
12
10
CONVERSION GAIN
(dB)
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
0 300 400 500100 200 600 700
IF FREQUENCY (MHz)
Figure 10. SSB Noise Figure vs.
Frequency and Temperature.
-10 -7 -6 -5-9 -8 -4 -3 -2 -1
LO POWER (dBm)
Figure 13. Available Conversion Gain
and Noise Figure vs. LO Drive Power.
2
4
6
8
12
10
SSB NOISE FIGURE
(dB)
4
6
8
10
14
12
CONVERSION GAIN and
NOISE FIGURE
(dB)
T
A
= +85°C
T
A
= +25°C
T
A
= -40°C
0 300 400 500100 200 600 700
IF FREQUENCY (MHz)
Figure 11. Conversion Gain vs.
Frequency and Supply Voltage.
2
4
6
8
12
10
CONVERSION GAIN
(dB)
T
A
= 3.3V
T
A
= 3.0V
T
A
= 2.7V
-10 -7 -6 -5-9 -8 -4 -3 -2 -1
LO POWER (dBm)
Figure 14. One dB Compression and
Input Third Order Intercept vs. LO
Drive Power.
-10
-8
-6
-4
0
-2
P
1 dB
and INPUT IP
3
(dBm)
034512 6
-20
-18
-16
-14
-12
-10
-8
-6
0
-2
-4
ISOLATION (dB, No Match)
RF FREQUENCY (GHz)
Figure 15. Isolation (LO-RF, RF-IF,
LO-IF) vs. Frequency with no RF and
IF Matching Networks.
034512 6
-40
-36
-32
-28
-24
-20
-16
-12
0
-4
-8
ISOLATION (dB)
RF FREQUENCY (GHz)
Figure 16. Isolation (RF-LO, RF-IF,
LO-IF) vs. Frequency with RF and IF
Matching Networks.
GAIN
NF
IP
3
P
1 dB
RF-IF
LO-IF
LO-RF
RF-LO
RF-IF
LO-IF
5
IAM-91563 Typical Reflection Coefficients, TC=25°C, ZO = 50 Ω, Vd =3 V
Frequency (GHz) RF (Mag) RF (Ang) LO (Mag) LO (Ang) IF (Mag) IF (Ang)
0.1 0.43 -1 0.64 -8
0.2 0.39 -6 0.63 -9
0.3 0.39 -8 0.63 -10
0.4 0.39 -9 0.63 -10
0.5 0.39 -10 0.62 -11
0.6 0.39 -11 0.62 -12
0.7 0.40 -14 0.62 -13
0.8 0.91 -18 0.39 -14
0.9 0.91 -21 0.39 -16
1 0.91 -23 0.38 -17
1.1 0.92 -25 0.39 -17
1.2 0.91 -28 0.39 -19
1.3 0.88 -29 0.40 -22
1.4 0.87 -32 0.39 -22
1.5 0.85 -33 0.39 -24
1.6 0.84 -34 0.39 -25
1.7 0.83 -35 0.39 -26
1.8 0.82 -37 0.39 -27
1.9 0.82 -37 0.38 -29
2 0.81 -39 0.39 -29
2.1 0.81 -40 0.38 -31
2.2 0.81 -41 0.38 -31
2.3 0.81 -42 0.37 -32
2.4 0.81 -44 0.37 -33
2.5 0.80 -45 0.36 -34
2.6 0.80 -45 0.36 -35
2.7 0.81 -46 0.35 -36
2.8 0.81 -48 0.35 -36
2.9 0.81 -50 0.34 -37
3 0.82 -51 0.34 -37
3.1 0.83 -53 0.33 -38
3.2 0.83 -55 0.33 -39
3.3 0.83 -56 0.32 -39
3.4 0.85 -59 0.32 -40
3.5 0.86 -61 0.31 -40
3.6 0.87 -64 0.32 -42
3.7 0.85 -67 0.31 -42
3.8 0.83 -71 0.30 -45
3.9 0.83 -71 0.30 -43
4 0.82 -73 0.29 -46
4.1 0.83 -76 0.29 -45
4.2 0.83 -79 0.28 -47
4.3 0.84 -82 0.29 -48
4.4 0.84 -85 0.27 -49
4.5 0.84 -87 0.28 -50
4.6 0.85 -91 0.26 -51
4.7 0.84 -95 0.28 -52
4.8 0.85 -97 0.25 -52
4.9 0.85 -100 0.27 -54
5 0.85 -103 0.25 -54
5.1 0.86 -106 0.27 -57
5.2 0.85 -108 0.25 -56
5.3 0.84 -113 0.27 -58
5.4 0.84 -115 0.25 -58
5.5 0.84 -117 0.27 -61
5.6 0.83 -121 0.25 -61
5.7 0.83 -123 0.27 -64
5.8 0.81 -125 0.25 -65
5.9 0.81 -128 0.26 -67
6 0.80 -130 0.24 -65
6
IAM-91563 Applications
Information
Introduction
The IAM-91563 is a miniature
downconverter developed for use
in superheterodyne receivers for
commercial wireless applications
with RF bands from 800 MHz to
6 GHz. Operating from only
3 volts, the IAM-91563 is an
excellent choice for use in low
current applications such as:
1.9 GHz Personal Communication
Systems (PCS) & Personal Handy
System (PHS), 2 GHz Digital
European Cordless Telephone
(DECT), and 800 MHz cellular
telephones (e.g., GSM, NADC,
JDC). Combined with Agilent’s
other RFICs and discrete compo-
nents housed in the same ultra-
miniature SOT-363 package, the
IAM-91563 also provides flexible,
building-block solutions for
WLAN’s and wireless datacomm
such as PCMCIA RF modems as
well as many Industrial, Scientific
and Medical (ISM) systems
operating at 900 MHz, 2.5 GHz, and
5.8 GHz.
The IAM-91563 is a 3-port,
downconverting RFIC mixer of the
cascode (common source -
common gate) type that uses a low
level (-5 dBm) local oscillator (LO)
to convert an RF signal in the
800 MHz to 6 GHz range to an IF
between 50 and 700 MHz. The
basic mixing function takes place
in a cascode connected pair of
FETs as shown in Figure 17.
IF
FET 2
LO
RF FET 1
Figure 17. Cascode FET Mixer.
The received RF signal is con-
nected to the gate of FET1 and the
LO is applied to the gate of FET2.
The purpose of FET2 is to vary the
transconductance of FET1 over a
highly nonlinear region at the rate
of the LO frequency. This pro-
duces the nonlinearity required
for frequency mixing to take
place. This type of mixer is also
known as a “transconductance
mixer.” The IF is taken from the
drain of FET2.
An advantage of the cascode type
of design is the inherent isolation
between the gates of the two
FETs which results in very good
LO-to-RF isolation. An integrated
buffer amplifier between the LO
input and the gate of FET2 not
only increases the LO-RF isolation
but also reduces the amount of LO
input power required by the
mixer.
The IAM-91563 uses an innovative
bias regulation circuit that realizes
several benefits to the designer.
First, the IAM-91563 operates with
a single, positive device voltage
from 1.5 to 5 volts with stable
performance over a wide tempera-
ture range. Second, a unique
feature of the IAM-91563 allows
the device current to be easily
increased by adding an external
resistor to boost device current
and increase linearity.
Using a minimum of external
components with a standard bias
of 3 volts/9 mA and LO power of
-5 dBm, the IAM-91563 mixer
achieves an RF to IF conversion
gain of 9 dB at 1.9 GHz with a
noise figure of 8.5 dB and an input
third order intercept point of
-6 dBm. LO-to-IF isolation is
greater than 35 dB. Setting the
bias for the higher linearity/higher
current mode (approximately
16 mA) along with an LO drive
level of -2 dBm will boost the
input IP3 to approximately 0 dBm.
Test Circuit
The circuit shown in Figure 18 is
used for 100% RF and DC testing.
The test circuit is impedance
matched for an RF of 1890 MHz
and an IF of 250 MHz. The LO is
set at 1640 MHz and -5 dBm for
low side conversion. (High side
conversion with an LO of
2240 MHz would produce similar
performance.) The RF choke at
the IF port is used to provide DC
bias. Tests in this circuit are used
to guarantee the Gtest, NFtest, and
Device Current (Id) parameters
shown in the table of Electrical
Specifications.
V
d
IF
250 MHz 500 pF 4.7 pF
68 nH
Z = 50 Z = 50
Z = 110
I=10.4 mm
0.5 pF
220 nH
100 pF
(2)
LO
1640 MHz
RF
1890 MHz
91
Figure 18. Test Circuit.
Specifications and
Statistical Parameters
Several categories of parameters
appear within this data sheet.
Parameters may be described with
values that are either “minimum
or maximum,” “typical,” or
“standard deviations.”
The values for parameters are
based on comprehensive product
characterization data, in which
automated measurements are
made on of a minimum of
500 parts taken from 3 non-
consecutive process lots of
semiconductor wafers. The data
derived from product character-
ization tends to be normally
distributed, e.g., fits the standard
“bell curve.”
Parameters considered to be the
most important to system perfor-
mance are bounded by minimum
7
or maximum values. For the
IAM-91563, these parameters are:
Conversion Gain (Gtest), Noise
Figure (NFtest), and Device
Current (Id). Each of these
guaranteed parameters is 100%
tested.
Values for most of the parameters
in the table of Electrical Specifica-
tions that are described by typical
data are the mathematical mean
(µ), of the normal distribution
taken from the characterization
data. For parameters where
measurements or mathematical
averaging may not be practical,
such as the Typical Reflection
Coefficients table or performance
curves, the data represents a
nominal part taken from the
“center” of the characterization
distribution. Typical values are
intended to be used as a basis for
electrical design.
To assist designers in optimizing
not only the immediate circuit
using the IAM-91563, but to also
optimize and evaluate trade-offs
that affect a complete wireless
system, the standard deviation
(σ) is provided for many of the
Electrical Specifications param-
eters (at 25°) in addition to the
mean. The standard deviation is a
measure of the variability about
the mean. It will be recalled that a
normal distribution is completely
described by the mean and
standard deviation.
Standard statistics tables or
calculations provide the probabil-
ity of a parameter falling between
any two values, usually symmetri-
cally located about the mean.
Referring to Figure 12 for ex-
ample, the probability of a param-
eter being between ±1σ is 68.3%;
between ±2σ is 95.4%; and be-
tween ±3σ is 99.7%.
68%
95%
99%
Parameter Value
Mean (µ)
(typical)
-3σ-2σ-1σ+1σ+2σ+3σ
Figure 19. Normal Distribution.
Phase Reference Planes
The positions of the reference
planes used to specify Reflection
Coefficients for this device are
shown in Figure 20. As seen in the
illustration, the reference planes
are located at the point where the
package leads contact the test
circuit.
TEST CIRCUIT
REFERENCE
PLANES
Figure 20. Phase Reference Planes.
RF Layout
An RF layout similar to the one in
Figure 21 is suggested as a
starting point for microstripline
designs using the IAM-91563
mixer. This layout shows the
capacitor for the Source Bypass
pin and the optional resistor used
to increase bias current. Adequate
grounding is important to obtain
maximum performance and to
maintain stability. Both of the
ground pins of the MMIC should
be connected to the RF
groundplane on the backside of
the PCB by means of plated
through holes (vias) that are
placed near the package termi-
nals. As a minimum, one via
should be located next to each of
the ground pins to ensure good RF
grounding. It is a good practice to
use multiple vias to further
minimize ground path inductance.
C
R
Figure 21. RF Layout.
It is recommended that the PCB
pads for the ground pins not be
connected together underneath
the body of the package. PCB
traces hidden under the package
cannot be adequately inspected
for SMT solder quality.
PCB Material
FR-4 or G-10 printed circuit board
materials are a good choice for
most low cost wireless applica-
tions. Typical board thickness is
0.020 to 0.031 inches. Thicknesses
greater than 0.031 inch began to
introduce excessive inductance in
the ground vias. The width of the
50 Ω microstriplines on PC boards
in this thickness range is also very
convenient for mounting chip
components such as the series
inductor at the input or DC
blocking and bypass capacitors.
For applications using higher
frequencies such as the 5.8 GHz
ISM band, the additional cost of
PTFE/glass dielectric materials
may be warranted to minimize
transmission line loss at the
mixer’s RF input. An additional
consideration of using lower cost
8
materials at higher frequencies is
the degradation in the Q’s of
transmission lines used for
impedance matching.
Biasing
The IAM-91563 is a voltage-biased
device and is designed to operate
in the “normal mode” from a
single, +3 volt power supply with
a typical current drain of only
9 mA. The internal current regula-
tion circuit allows the mixer to be
operated with voltages as high as
+5 volts or as low as +1.5 volt.
The device current can be in-
creased up to 20 mA by adding an
external resistor from the Source
Bypass pin to ground. This feature
makes it possible to operate the
IAM-91563 in the “high power
mode” to achieve greater linearity.
Refer to the section titled “High
Linearity Mode” for information
on applications and performance
when using this feature.
Application Guidelines
Several design considerations
should be taken into account to
ensure that maximum perfor-
mance is obtained from the
IAM-91563 downconverter. The
RF and IF ports must be imped-
ance matched at their respective
frequencies to the circuits to
which they are connected. This is
typically 50 ohms when the mixer
is used as a building block compo-
nent in a 50-ohm system. These
ports have been left untuned on
the MMIC to allow the mixer to be
used over a wide range of RF and
IF bands. The LO port is already
sufficiently well matched (less
than 1 dB of mismatch loss) for
most applications.
As with most mixers, appropriate
filters must be placed at the RF
port and IF port such as in
Figure 22. The filter in front of the
RF port eliminates interference
from the image frequency and the
IF filter prevents RF and LO signal
leakage into the IF signal process-
ing circuitry.
HP Filter
RF IF
LO LP Filter
Figure 22. Image and IF Filters.
Additional design considerations
relate to the use of higher bias
current where greater linearity is
required, bypassing of the Source
Bypass pin, bias injection, and DC
blocking and bypassing.
Each of these design factors will
be discussed in greater detail in
the following sections.
RF Port
A well matched RF port is espe-
cially important to maximize the
conversion gain of the IAM-91563
mixer. Matching is also necessary
to realize the specified noise
figure and RF-to-LO isolation. The
amount the conversion gain can
be increased by impedance
matching is equal to the mismatch
loss at the RF port. The imped-
ance of the RF port is character-
ized by the measured reflection
coefficients shown in Typical
Reflection Coefficients Table. The
maximum “mismatch gain” that
results from eliminating the
mismatch loss is expressed in dB
as a function of the reflection
coefficient as:
For wireless bands in the 800 MHz
to 6 GHz range, the magnitude of
the reflection coefficient of the RF
port varies from 0.91 to 0.80,
which corresponds to a mismatch
gain of 7.6 to 4.4 dB.
The impedance of the RF port is
capacitive, and for frequencies
from 800 MHz to 2.4 GHz, falls
very near the R=1 circle of a Smith
chart. While these impedances
could be easily matched to
50 ohms with a simple series
inductor, it is advantageous to use
a 2-element matching network of
the series C, shunt L type as
shown in Figure 23 instead. There
are two main reasons for this
choice. The first is to incorporate
a high pass filter characteristic
into the matching circuit. Second,
the series C, shunt L combination
will match the entire range of RF
port impedances to 50 Ω. Most
wireless communication bands
are sufficiently narrow that a
single (mid-band) frequency
approach to impedance matching
is adequate.
RF
RF
Input C
L
IF
LO
Figure 23. RF Input HPF Matching.
Impedance matching can be
accomplished with lumped
element components, transmis-
sion lines, or a combination of
both. The use of surface mount
inductors and capacitors is
convenient for lower frequencies
to minimize printed circuit board
space. The use of high impedance
transmission lines works well for
higher frequencies where lumped
element inductors may have
excessive parasitics and/or self-
resonances.
If other types of matching net-
works are used, it should be noted
that while the RF input terminal of
the IAM-91563 is at ground
potential, it should not be used as
a current sink. If the input is
G
RF, mm
= 10 log
10
1
1– Γ
RF
2
(1)
9
RF IF
LO
RFC
Bypass
Capacitor V
d
IF
Output
Figure 25. Bias Connection.
LO Port
The LO input port is internally
matched to 50 Ω within a 2.2:1
VSWR over the entire operating
frequency range. Additional
matching will normally not be
needed. However, if desired, a
small series inductor can be used
to provide some improvement in
the LO match and thus reduce the
LO drive level requirement by up
to 0.7 dB. Reflection coefficients
for the LO port are shown in the
table of Typical Reflection
Coefficients.
Source Bypass Pin
The Source Bypass pin should be
RF bypassed to ground at both the
RF and LO frequencies as well as
the IF. Many capacitors with
values large enough to adequately
bypass lower intermediate fre-
quencies contain parasitics that
may have resonances in the RF
band. It is often practical to use
two capacitors in parallel for this
purpose instead of one. A small
value, high quality capacitor is
used to bypass the RF/LO frequen-
cies and a large value capacitor
for the IF. When biased in the high
linearity mode, a resistor is added
from the Source Bypass pin to
ground.
High Linearity Mode
The IAM-91563 has a feature that
allows the user to place an
external resistor from the Source
Bypass pin to ground and increase
the device current from a nominal
9 mA to as high as 20 mA. The
additional current increases mixer
linearity (IP3) and output
power(P1dB). Mixer performance
at higher device current is shown
in Figures 26 and 27.
7131517911 19
4
6
8
10
14
12
CONVERSION GAIN and NF (dB)
DEVICE CURRENT (mA)
1000 9 5 356 21
Approximate Resistor Value (Ω)
NF
GAIN
Figure 26. Available Conversion Gain
and SSB Noise Figure vs. Device
Current (Source Resistor).
7131517911 19
1000 9 5 356 21
-10
-8
-6
-4
0
-2
P
1 dB
and INPUT IP
3
(dBm)
DEVICE CURRENT (mA)
Approximate Resistor Value (Ω)
IP
3
P
1 dB
Figure 27. One dB Compression and
Input Third Order Intercept Point vs.
Device Current (Resistor).
As an example of improved
linearity, the use of a 15 Ω resistor
at the Source Bypass pin increases
the device current to 14 mA. At
1.9 GHz, the input IP3 is increased
from -6.5 dBm to -3 dBm. Increas-
ing the LO drive level from -5 dBm
to -1 dBm further increases the
input IP3 to 0 dBm.
connected directly to a preceding
stage that has a voltage present, a
DC blocking capacitor should be
used.
IF port
The IAM-91563 can be used for
downconvesion to intermediate
frequencies in the 50 to 700 MHz
range. Similar to the RF port, the
reflection coefficient at the IF is
fairly high and Equation 1 can be
used to predict a mismatch gain of
up to 2.2 dB by impedance match-
ing. A well matched IF port will
also provide the optimum output
power and LO-to-IF isolation.
Reflection coefficients for the IF
port are shown in the Typical
Reflection Coefficients Table.
The IF port impedance matching
network should be of the low pass
filter type to reflect RF and LO
power back into the mixer while
allowing the IF to pass through.
The shunt C, series L type of
network in Figure 24 is a very
practical choice that will meet the
low pass filter requirement while
matching any IF impedances over
the 50 - 700 MHz range to 50 ohms.
RF
IF
Output
IF
LO
Figure 24. IF Output LPF Matching.
The DC bias is also applied to the
mixer through the IF port. Figure
25 shows how an inductor (RFC)
is used to isolate the IF from the
DC supply. The bias line is by-
passed to ground with a capacitor
to keep RF off of the DC supply
lines and to prevent dips or peaks
in the response of the mixer.
10
IF
Output
RFC
C4
C6
C5
C7
C1 L3
LO
Input
RF
Input
C2
L2
V
d
C3
91
L1 = 0
MLIN
Figure 29. Schematic of Example
Application Circuit.
At the RF input port, series
capacitor C1 and transmission line
MLIN form the input matching
network and high pass filter.
(Note: The PCB layout above has
provision for an inductor, L1, in
series with MLIN. Inductor L1 is
not used in this design.)
Referring to the table of Reflec-
tion Coefficients, the RF input
port ΓRF = 0.82 ∠−37° at 1.9 GHz.
This point is plotted as Point A on
the Smith chart in Figure 30. For
reasons previously discussed in
the “RF Port” section above, a
series C - shunt L network (from
the 50 Ω source to ΓRF) will be
used to match ΓRF to 50 Ω.
Addition of a 6.5 nH shunt induc-
tance moves the impedance
trajectory from Point A to Point B.
The match to 50 Ω is completed
with a 0.6 pF series capacitance,
C1, that moves the match to
Point C, the center of the Smith
chart.
A
1
C
CB A
2
1
-2
B
0.5
0.5
0.2
-0.2
0.2 2
-0.5
-1
RF
InputC1 L
Figure 30. RF Input Impedance
Match.
For this example, the shunt
inductor was realized with the
transmission line, MLIN in Fig-
ure 29 (ZO = 90 Ω, length =
0.35 in.). A high quality capacitor
should be selected for C1 to
minimize the effects of the
capacitor’s parasitic inductance
and resistance. Series capacitor
C1 also serves to block any DC
that may be present at the output
of the stage preceding the mixer.
At the IF output, the low pass
filter and impedance match is
formed by shunt capacitor C2 and
series inductor L2. Referring again
to the table of Reflection Coeffi-
cients, the IF output port ΓIF =
0.64 ∠ -8° at 100 MHz, which is the
frequency point closest to the
desired IF of 110 MHz. ΓIF is
plotted as Point A in Figure 31.
A
1
C
CBA
2
1
-2
B
0.5
0.5
0.2
-0.2
0.2 2
-0.5
-1
IF
Output
C2 L2
Figure 31. IF Input Impedance Match.
Adding a shunt capacitance (C2)
of 11.3 pF brings the impedance to
Point B. The match to Point C at
the center of the chart is com-
pleted with a series inductance
(L2) of 150 nH.
Although not necessary for many
applications, the match at the LO
port can be improved by the
addition of series inductor L3 with
a value of approximately 8 nH.
Design information (ΓLO) for
matching the LO port is obtained
Application Example
The printed circuit layout in
Figure 28 is a general purpose
layout that will accommodate
components for using the
IAM-91563 for RF inputs from
800 MHz to 6 GHz. This layout is a
microstripline design (solid
groundplane on the backside of
the circuit board) with 50 Ω
interfaces for the RF input, IF
output, and LO input. The circuit
is fabricated on 0.031-inch thick
FR-4 dielectric material. Plated
through holes (vias) are used to
bring the ground to the top side of
the circuit where needed. Multiple
vias are used to reduce the
inductance of the paths to ground.
RF
IF
+V
LO
H
IAM-91
Figure 28. PCB Layout.
1.9 GHz Design Example
To illustrate a design approach for
using the IAM-91563, a PCS band
downconverter with an RF of
1.9 GHz and IF of 110 MHz is
presented. The PCB layout above
was used to assemble the mixer
and verify performance.
A schematic diagram of the
1.9 GHz circuit is shown in
Figure 29.
11
from the table of Reflection
Coefficients. Capacitor C7 is a DC
block for the LO port.
DC bias is applied to the
IAM-91563 through the RFC at the
IF Output pin. The power supply
is bypassed to ground with
capacitor C5 to keep RF, IF, and
LO signals off of the DC bias lines
and to prevent gain dips or peaks
in the response of the mixer. C4 is
a DC blocking capacitor for the
output.
The values of the RF bypass
capacitors and DC blocking
capacitors that are not part of a
impedance matching structure
(i.e., C3 - C7) should be chosen to
provide a small reactance (typi-
cally < 5 ohms) at the lowest
frequency at the port for which
they are used. The reactance of
the RF choke (RFC) should be
high (e.g., several hundred ohms)
at the lowest IF.
The completed 1.9 GHz mixer
from the design example above
with all components and SMA
connectors in place is shown in
Figure 32. Again, L1 is not used
and is replaced by a metal tab.
The length of the shunt transmis-
sion line, MLIN, is adjustable by
moving the position of the short-
ing tab between the line and the
ground pad. Provision is made for
an additional bypass capacitor,
C6, to be added to the bias line
near the Vd connection to elimi-
nate unwanted RF feedback
through bias lines.
When multiple bypass capacitors
are used, consideration should be
given to potential resonances. It is
important to ensure that the
capacitors, when combined with
additional parasitic L’s and C’s on
the circuit board, do not form
resonant circuits. The addition of
a small value resistor in the bias
supply line between bypass
capacitors will often “de-Q” the
bias circuit and eliminate reso-
nance effects.
Table 1 below summarizes the
component values for the 1.9 GHz
design.
Component Value
C1 0.5 pF
C2 9 pF
C3, C5, C7 100 pF
C4 500 pF
L1 (not used)
L2 100 nH
L3 8.2 nH
MLIN Zo=90 Ω
l = 0.41 in.
RFC 320 nH
Table 1. Component Values for
1.9 GHz Downconverter.
The values shown in Table 1 may
vary from those used above to
describe the basic impedance
matching approach. The final
component values take into
consideration additional effects
such as, the various line lengths
between components, parasitics
in components (e.g., the series
inductance in C1), as well as
other circuit parasitics. A CAD
program such as Agilent Touch-
stone® may be used to fully
analyze and account for these
circuit variables.
RF
IF
+V
C6
C5
C4
C2
C3
MUN 1
L 1
C 1
C 7
L3 L2
RFC
LO
IAM-91
Figure 32. Complete 1.9 GHz Mixer.
The following performance was measured for a 1.9 GHz circuit:
Measured results:
Conversion Gain = 9.0 dB LO-RF Isolation = 17 dB
SSB Noise Figure = 8.5 dB LO-IF Isolation = 34 dB
P1dB (output) = -8.1 dB RF-IF Isolation = 23 dB
IP3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 1.89 GHz LO Drive Level = -5 dBm
LO Frequency = 1.78 GHz DC Power = 3.0V @ 9 mA
IF Frequency = 110 MHz
12
Designs for Other Frequencies
The same design methodology described above can be applied to other wireless frequency bands. Design
examples and measurement results for the 900 MHz and 2.4 GHz bands are shown in Figures 33 and 34.
220 nH
100 pF 0.9 pF
220 pF
1000 pF 15 pF
10 nH
180 nH
GC
GN
IF
RF
91
GND
LO
Vd
LO
2200
MHz
RF
2450
MHz
IF
250
MHz 50 Ω
50 Ω
50 Ω
Measured results:
Conversion Gain = 10.6 dB LO-RF Isolation = 21 dB
SSB Noise Figure = 7.1 dB LO-IF Isolation = 33 dB
1 dB Compression = -7.0 dB RF-IF Isolation = 17 dB
P3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 900 MHz LO Drive Level = -5 dBm
IF Frequency = 80 MHz DC Power = 3.0V @ 9 mA
LO Frequency = 980 MHz
Figure 33. 800-900 MHz Cellular and ISM Band Mixer.
220 nH
100 pF 0.5 pF
100 pF
500 pF 4.7 pF
110 Ω, 3 mm
68 nH
GC
GN
IF
RF
91
GND
LO
Vd
LO
2200
MHz
RF
2450
MHz
IF
250
MHz 3.3 nH
50 Ω
50 Ω
50 Ω
Measured results:
Conversion Gain = 7.7 dB LO-RF Isolation = 16 dB
SSB Noise Figure = 11 dB LO-IF Isolation = 35 dB
1 dB Compression = -8.7 dB RF-IF Isolation = 27 dB
IP3 (Input) = -7 dBm
Operating conditions:
RF Frequency = 2.45 GHz LO Drive Level = -5 dBm
IF Frequency = 250 MHz DC Power = 3.0V @ 9 mA
LO Frequency = 2.2 GHz
Figure 34. 2.4 GHz ISM Band Mixer.
13
SOT-363 PCB Footprint
A recommended PCB pad layout
for the miniature SOT-363 (SC-70)
package used by the IAM-91563 is
shown in Figure 35 (dimensions
are in inches). This layout pro-
vides ample allowance for pack-
age placement by automated
assembly equipment without
adding parasitics that could
impair the high frequency RF
performance of the IAM-91563.
The layout is shown with a
nominal SOT-363 package foot-
print superimposed on the PCB
pads.
0.026
0.035
0.075
0.016
Figure 35. PCB Pad Layout
(dimensions in inches).
SMT Assembly
Reliable assembly of surface
mount components is a complex
process that involves many
material, process, and equipment
factors, including: method of
heating (e.g., IR or vapor phase
reflow, wave soldering, etc.)
circuit board material, conductor
thickness and pattern, type of
solder alloy, and the thermal
conductivity and thermal mass of
components. Components with a
low mass, such as the SOT-363
package, will reach solder reflow
temperatures faster than those
with a greater mass.
The IAM-91563 is has been
qualified to the time-temperature
profile shown in Figure 36. This
profile is representative of an IR
reflow type of surface mount
assembly process.
After ramping up from room
temperature, the circuit board
with components attached to it
(held in place with solder paste)
passes through one or more
preheat zones. The preheat zones
increase the temperature of the
board and components to prevent
thermal shock and begin evaporat-
ing solvents from the solder paste.
The reflow zone briefly elevates
the temperature sufficiently to
produce a reflow of the solder.
The rates of change of tempera-
ture for the ramp-up and cool-
down zones are chosen to be low
enough to not cause deformation
of the board or damage to compo-
nents due to thermal shock. The
maximum temperature in the
reflow zone (TMAX) should not
exceed 235°C.
These parameters are typical for a
surface mount assembly process
for the IAM-91563. As a general
guideline, the circuit board and
components should be exposed
only to the minimum tempera-
tures and times necessary to
achieve a uniform reflow of
solder.
TIME (seconds)
T
MAX
TEMPERATURE (°C)
0
0
50
100
150
200
250
60
Preheat
Zone Cool Down
Zone
Reflow
Zone
120 180 240 300
Figure 36. Surface Mount Assembly Profile.
14
Electrostatic Sensitivity
GaAs MMICs are
electrostatic discharge
(ESD) sensitive
devices. Although the
IAM-91563 is robust in design,
permanent damage may occur to
these devices if they are subjected
to high energy electrostatic
discharges. Electrostatic charges
as high as several thousand volts
(which readily accumulate on the
human body and on test equip-
ment) can discharge without
detection and may result in
degradation in performance or
failure. The IAM-91563 is a ESD
Class 1 device. Therefore, proper
ESD precautions are recom-
mended when handling, inspect-
ing, and assembling these devices
to avoid damage.
15
Package Dimensions
Outline 63 (SOT-363/SC-70)
2.20 (0.087)
2.00 (0.079) 1.35 (0.053)
1.15 (0.045)
1.30 (0.051)
REF.
0.650 BSC (0.025)
2.20 (0.087)
1.80 (0.071)
0.10 (0.004)
0.00 (0.00)
0.25 (0.010)
0.15 (0.006)
1.00 (0.039)
0.80 (0.031) 0.20 (0.008)
0.10 (0.004)
0.30 (0.012)
0.10 (0.004)
0.30 REF.
10°
0.425 (0.017)
TYP.
DIMENSIONS ARE IN MILLIMETERS (INCHES)
Part Number Ordering Information
Part Number No. of Devices Container
IAM-91563-TR1 3000 7" Reel
IAM-91563-BLK 100 antistatic bag
www.semiconductor.agilent.com
Data subject to change.
Copyright © 1999 Agilent Technologies
Obsoletes 5965-1330E
5965-9973E (11/99)
Tape Dimensions and Product Orientation
For Outline 63
Device Orientation
P
P
0
P
2
FW
C
D
1
D
E
A
0
8° MAX.
t
1
(CARRIER TAPE THICKNESS) T
t
(COVER TAPE THICKNESS)
5° MAX.
B
0
K
0
DESCRIPTION SYMBOL SIZE (mm) SIZE (INCHES)
LENGTH
WIDTH
DEPTH
PITCH
BOTTOM HOLE DIAMETER
A
0
B
0
K
0
P
D
1
2.24 ± 0.10
2.34 ± 0.10
1.22 ± 0.10
4.00 ± 0.10
1.00 + 0.25
0.088 ± 0.004
0.092 ± 0.004
0.048 ± 0.004
0.157 ± 0.004
0.039 + 0.010
CAVITY
DIAMETER
PITCH
POSITION
D
P
0
E
1.55 ± 0.05
4.00 ± 0.10
1.75 ± 0.10
0.061 ± 0.002
0.157 ± 0.004
0.069 ± 0.004
PERFORATION
WIDTH
THICKNESS W
t
1
8.00 ± 0.30
0.255 ± 0.013 0.315 ± 0.012
0.010 ± 0.0005
CARRIER TAPE
CAVITY TO PERFORATION
(WIDTH DIRECTION)
CAVITY TO PERFORATION
(LENGTH DIRECTION)
F
P
2
3.50 ± 0.05
2.00 ± 0.05
0.138 ± 0.002
0.079 ± 0.002
DISTANCE
WIDTH
TAPE THICKNESS C
T
t
5.4 ± 0.10
0.062 ± 0.001 0.205 ± 0.004
0.0025 ± 0.00004
COVER TAPE
USER
FEED
DIRECTION COVER TAPE
CARRIER
TAPE
REEL END VIEW
8 mm
4 mm
TOP VIEW
91 91 91 91
