REV. 0
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Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
ADD8701
12-Channel Gamma Buffers
with VCOM Buffer
PA N E L
TIMING
CONTROLLER
TIMING AND CONTROL
SCAN DRIVER CONTROL
GAMMA
REFERENCE
VOLTAGES
V12
VCOM IN
VCOM OUT V1
GND
V
DD
V
DD
RESISTOR
LADDER
R
384
SOURCE DRIVER
NO. 1
768
SCAN
DRIVERS
TFT COLOR PANEL
1024 ⴛ 768
384
SOURCE DRIVER
NO. 2
384
SOURCE DRIVER
NO. 8
ADD8701
GB
Figure 1. Typical SVGA TFT-LCD Application
FUNCTIONAL BLOCK DIAGRAM
GND
V
DD
V6
V5
V
DD
VCOM
IN
VCOM
OUT
IN12
V4
V3
V2
V1
IN6
IN5
IN4
IN3
IN2
IN1
V
DD
GND
IN11
IN10
IN9
IN8
IN7
GND
V12
V11
V10
V9
V8
V7
910 11 12 13 14 15 16
32 31 30 26 28 27 26 25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
FEATURES
Single-Supply Operation: 7 V to 16 V
Dual-Supply Operation: 3.5 V to 8 V
Supply Current: 13 mA Max
Upper/Lower Buffers Swing to VDD/GND
Continuous Output Current: 10 mA
VCOM Peak Output Current: 250 mA
Offset Voltage: 15 mV Max
Slew Rate: 6 V/s
Fast Settling Time with Large C-Load
APPLICATIONS
TFT LCD Panels
GENERAL DESCRIPTION
The ADD8701 is a low cost, 12-channel buffer amplifier and
VCOM driver that operates from a single supply. The part is
designed for high resolution TFT LCD panels, and is built on
an advanced, high voltage, CBCMOS process.
The buffers have high slew rate, 10 mA continuous output current,
and high capacitive load drive capability. The VCOM buffer has
increased drive of 35 mA and can drive large capacitive loads. The
ADD8701 offers wide supply range and offset voltages below 15 mV.
The ADD8701 is specified over the –40ºC to +85ºC tempera-
ture range and is available in a 32-lead lead frame chip scale
package (LFCSP).
All inputs and outputs incorporate internal ESD protection
circuits.
REV. 0–2–
ADD8701–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
Parameter Symbol Condition Min Typ Max Unit
INPUT CHARACTERISTICS
Offset Voltage V
OS
415 mV
Offset Voltage Drift ∆V
OS
/∆T–40°C ≤ T
A
≤ +85°C 5 µV/°C
Input Bias Current I
B
0.5 1.1 µA
–40°C ≤ T
A
≤ +85°C 1.5 µA
Input Voltage Range –0.5 V
DD
+ 0.5 V
Input Impedance Z
IN
400 kΩ
Input Capacitance C
IN
1pF
OUTPUT CHARACTERISTICS
Output Voltage High (V11, V12) V
OUT
I
L
= 100 µA 15.995 V
V
DD
= 16 V, I
L
= 5 mA 15.85 15.9 V
–40°C ≤ T
A
≤ +85°C 15.75 V
V
DD
= 7 V, I
L
= 5 mA 6.75 6.85 V
–40°C ≤ T
A
≤ +85°C 6.65 V
Output Swing (V3 to V10) V
OUT
I
L
= 5 mA, V
DD
= 16 V 14.6 V
Output Swing (V3 to V10) V
OUT
I
L
= 5 mA, V
DD
= 7 V 5.6 V
Output Voltage Low (V1, V2) V
OUT
I
L
= 100 µA 5 mV
V
DD
= 16 V, I
L
= 5 mA 85 150 mV
–40°C ≤ T
A
≤ +85°C 250 mV
V
DD
= 7 V, I
L
= 5 mA 140 300 mV
–40°C ≤ T
A
≤ +85°C 400 mV
Continuous Output Current I
OUT
10 mA
Peak Output Current I
PK
V
DD
= 16 V 150 mA
VCOM CHARACTERISTICS
Continuous Output Current I
OUT
35 mA
Peak Output Current I
PK
V
DD
= 16 V 250 mA
TRANSFER CHARACTERISTICS
Gain A
VCL
R
L
= 2 kΩ0.995 0.9985 1.005 V/V
–40°C ≤ T
A
≤ +85°C 0.995 0.9980 1.005 V/V
Gain Linearity NL R
L
= 10 kΩ
V
O
= 0.5 to (V
DD
– 0.5 V) 0.01 %
SUPPLY CHARACTERISTICS
Supply Voltage V
DD
716V
Power Supply Rejection Ratio PSRR V
DD
= 6 V to 17 V
–40°C ≤ T
A
≤ +85°C 70 90 dB
Supply Current I
SYS
No Load 10 13 mA
–40°C ≤ T
A
≤ +85°C 15 mA
DYNAMIC PERFORMANCE
Slew Rate SR R
L
= 10 kΩ, C
L
= 200 pF 4 6 V/µs
Bandwidth BW –3 dB, R
L
= 10 kΩ, C
L
= 200 pF 4.5 MHz
Settling Time to 0.1% (Buffers) t
S
1 V, R
L
= 10 kΩ, C
L
= 200 pF 1.1 µs
Settling Time to 0.1% (VCOM) t
S
1 V, R
L
= 10 kΩ, C
L
= 200 pF 0.7 µs
Phase Margin fo R
L
= 10 kΩ, C
L
= 200 pF 55 Degrees
Channel Separation 75 dB
NOISE PERFORMANCE
Voltage Noise Density e
n
f = 1 kHz 26 nV/√Hz
e
n
f = 10 kHz 25 nV/√Hz
Current Noise Density i
n
f = 10 kHz 0.8 pA/√Hz
Specifications subject to change without notice.
(7 V ≤ VDD ≤ 16 V, TA = 25°C, unless otherwise specified.)
REV. 0
ADD8701
–3–
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
ADD8701 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
PIN CONFIGURATION
PIN 1
INDICATOR
TOP VIEW
24 GND
23 VDD
22 V6
21 V5
VDD 1
VCOM IN 2
IN12 3
32 VCOM OUT
20 V4
19 V3
18 V2
17 V1
IN6 9
IN5 10
IN4 11
IN3 12
IN2 13
IN1 14
VDD 15
GND 16
IN11 4
IN10 5
IN9 6
IN8 7
IN7 8
31 GND
30 V12
29 V11
28 V10
27 V9
26 V8
25 V7
ADD8701
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (V
DD
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
DD
+ 0.5 V
Storage Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
ESD Tolerance (HBM) . . . . . . . . . . . . . . . . . . . . . . . ±1,000 V
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
ORDERING GUIDE
Model Temperature Package Package
Range Description Option
ADD8701ACP –40°C to +85°C 32-Lead LFCSP CP-32
Package Type
JA1
JB2
Unit
32-Lead LFCSP (CP) 35 13 °C/W
NOTES
1
θ
JA
is specified for worst-case conditions, i.e., θ
JA
is specified for device soldered
in circuit board for surface-mount packages.
2
ψ
JB
is applied for calculating the junction temperature by reference to the board
temperature.
PIN FUNCTION DESCRIPTION
Pin No. Mnemonic Description
1, 15, 23 V
DD
Power (+)
2VCOM IN VCOM Buffer Input
3–14 IN12–IN1 Gamma Buffer Inputs
16, 24, 31 GND Power (–)
17–22, 25–30 V1–V12 Gamma Buffer Outputs
32 VCOM OUT VCOM Buffer Output
REV. 0–4–
ADD8701–Typical Performance Characteristics
INPUT OFFSET VOLTAGE – mV
NUMBER OF AMPLIFIERS
1,400
600
0
–7 9
–5 –3 –1 1 3 5
1,200
1,000
400
200
800
7
T
A
= 25C
7V < V
DD
< 16V
TPC 1. Input Offset Voltage Distribution
COMMON-MODE VOLTAGE – V
–8 –6 8
–4 –2 0 4 62
OFFSET VOLTAGE – mV
8
6
–10
–2
–4
–6
–8
4
0
2
V
DD
= 8V
BUFFERS 10 TO 12
TPC 4. Offset Voltage vs.
Common-Mode Voltage
TEMPERATURE – C
INPUT BIAS CURRENT – nA
350
0
–40 85
25
200
150
50
100
300
250
BUFFERS 10 TO 12
V
DD
= 16V
V
DD
= 7V
TPC 7. Input Bias Current vs.
Temperature
405101520253035
TCVOS – V/C
NUMBER OF AMPLIFIERS
7,000
0
6,000
4,000
3,000
2,000
1,000
5,000
7V < V
DD
< 16V
TPC 2. TCVOS Distribution
COMMON-MODE VOLTAGE – V
–8 –6 8
–4 –2 0 4 62
OFFSET VOLTAGE – mV
8
6
–10
–2
–4
–6
–8
4
0
2
V
DD
= 8V
VCOM, BUFFERS 1 TO 9
TPC 5. Offset Voltage vs.
Common-Mode Voltage
LOAD CURRENT – mA
∆OUTPUT VOLTAGE – V
100
0.001
0.01 0.1 100110
10
1
0.1
0.01
SOURCE
SINK
V
DD
= 16V
BUFFERS 1, 2
TPC 8. Output Voltage to
Supply Rail vs. Load Current
TEMPERATURE – C
INPUT OFFSET VOLTAGE – mV
20
15
–20
–40 85
25
0
–5
–15
–10
10
5
7V < VDD < 16V
BUFFER 1
BUFFER 12
VCOM
TPC 3. Input Offset Voltage
vs. Temperature
TEMPERATURE – C
INPUT BIAS CURRENT – nA
0
–200
–900
–40 85
25
–500
–600
–800
–700
–300
–400
VCOM AND BUFFERS 1 TO 9
–100
V
DD
= 16V
V
DD
= 7V
TPC 6. Input Bias Current vs.
Temperature
LOAD CURRENT – mA
∆OUTPUT VOLTAGE – V
100
0.001
0.01 0.1 100110
10
1
0.1
0.01
V
DD
= 16V
BUFFERS 3 TO 9
SOURCE
SINK
TPC 9. Output Voltage to
Supply Rail vs. Load Current
REV. 0
ADD8701
–5–
LOAD CURRENT – mA
∆OUTPUT VOLTAGE – V
100
0.001
0.01 0.1 100110
10
1
0.1
0.01
VDD = 16V
BUFFERS 11, 12
SOURCE
SINK
TPC 11. Output Voltage to
Supply Rail vs. Load Current
TEMPERATURE – C
SUPPLY CURRENT – mA
12
0
–40 85
25
8
6
2
4
10
V
DD
= 7V
V
DD
= 16V
TPC 14. Supply Current vs.
Temperature
FREQUENCY – Hz
POWER SUPPLY REJECTION RATIO – dB
100 1k 10M10k 100k 1M
80
60
–120
40
20
0
–20
–40
–60
–80
–100
PSRR
ALL CHANNELS
V
DD
= 8V
T
A
= +25C
TPC 17. Power Supply Rejection
Ratio vs. Frequency
LOAD CURRENT – mA
∆OUTPUT VOLTAGE – V
10
0.0001
0.01 0.1 100110
1
0.1
0.01
0.001
V
DD
= 16V
VCOM
SOURCE
SINK
TPC 12. Output Voltage to
Supply Rail vs. Load Current
FREQUENCY – Hz
GAIN – dB
20
10
–30
100k 1M 30M
10M
0
–10
–20
VDD = 16V
VCOM AND BUFFERS 1 TO 9
10k
2k
1k
560
150
TPC 15. Frequency Response
vs. Resistive Loading
FREQUENCY – Hz
GAIN – dB
20
10
–30
100k 1M 30M
10M
0
–10
–20
VDD = 16V
VCOM, BUFFERS 1 TO 9
50pF
1040pF
–40
–50
540pF
100pF
TPC 18. Frequency Response
vs. Capacitive Loading
LOAD CURRENT – mA
∆OUTPUT VOLTAGE – V
100
0.001
0.01 0.1 100110
10
1
0.1
0.01
V
DD
= 16V
BUFFER 10
SOURCE
SINK
TPC 10. Output Voltage to
Supply Rail vs. Load Current
SUPPLY VOLTAGE – V
SUPPLY CURRENT – mA
12
10
004 16
812
6
2
4
8
V
CM
= 1/2 V
DD
TPC 13. Supply Current vs.
Supply Voltage
FREQUENCY – Hz
GAIN – dB
20
10
–30
100k 1M 30M
10M
0
–10
–20
V
DD
= 16V
BUFFERS 10 TO 12
10k
2k
1k
560
150
TPC 16. Frequency Response
vs. Resistive Loading
REV. 0–6–
ADD8701
CAPACITIVE LOAD – pF
PHASE SHIFT – Degrees
180
40 0200 1,200
400 600 800 1,000
160
140
120
80
60
100
VCOM
CHANNELS 1 AND 2
CHANNELS 3 TO 9
CHANNELS 11 AND 12
VDD = 7V
RL = 2k
TPC 20. Input-Output Phase
Shift vs. Capacitive Load
TEMPERATURE – C
SLEW RATE – V/s
16
14
0
–40 85
25
8
6
2
4
12
10
V
DD
= 16V
R
NULL
= 33
C
L
= 100pF
VCOM SLEW RATE RISING
VCOM SLEW RATE FALLING
TPC 23. Slew Rate vs. Temperature
SETTLING TIME – ns
STEP SIZE – V
12
0
–12
400 1,400
600 800 1,000 1,200
8
4
–4
–8
+t
S
(0.1%)
VCOM
V
DD
= 8V
R
L
= 5k
C
L
= 100pF
R
NULL
= 33
T
A
= 25C
–t
S
(0.1%)
TPC 26. Settling Time vs. Step Size
CAPACITIVE LOAD – pF
PHASE SHIFT – Degrees
180
40 0200 1,200
400 600 800 1,000
160
140
120
80
60
100
VCOM
CHANNEL 1
CHANNEL 3
CHANNEL 11
VDD = 16V
RL = 2k
TPC 21. Input-Output Phase
Shift vs. Capacitive Load
7V < V
DD
< 16V
R
OUT
SERIES = 33
C
LOAD
= 0.1F
TIME – 20s/DIV
VOLTAGE – 20mV/DIV
TPC 24. Small Signal Transient
Response
TIME – 40s/DIV
VOLTAGE – 3V/DIV
TPC 27. No Phase Reversal
FREQUENCY – Hz
GAIN – dB
20
10
–30
100k 1M 30M
10M
0
–10
–20
50pF
1040pF
–40
–50
540pF
100pF
V
DD
= 16V
BUFFERS 10 TO 12
TPC 19. Frequency Response
vs. Capacitive Loading
TIME – 2s/DIV
VOLTAGE – 2V/DIV
V
DD
= 16V
TPC 22. Large-Signal Transient
Response
CAPACITIVE LOAD – pF
OVERSHOOT – %
10 100 10k1k
100
90
0
80
70
60
50
40
30
20
10
+OS
–OS
V
DD
= 8V
V
IN
= 50mV
R
L
= 2k
T
A
= 25C
TPC 25. Small-Signal Overshoot
vs. Capacitive Load
REV. 0
ADD8701
–7–
VOLTAG E NOISE DENSITY – nV/ Hz
VDD = 16V
BUFFERS 10 TO 12
MARKER SET @ 10kHz
MARKER READING = 36.6nV/ Hz
FREQUENCY – Hz
051015 20 25
–10
0
10
20
30
40
50
60
70
TPC 29. Voltage Noise Density
vs. Frequency
VOLTAG E NOISE DENSITY – nV/ Hz
VDD = 16V
VCOM AND BUFFERS 1 TO 9
MARKER SET @ 10kHz
MARKER READING = 25.7nV/ Hz
FREQUENCY – Hz
051015 20 25
–10
0
10
20
30
40
50
60
70
TPC 28. Voltage Noise Density
vs. Frequency
APPLICATIONS
LCD Gamma Reference Buffers
In high resolution TFT-LCD displays, gamma correction must
be performed to correct the nonlinearity in the LCD panel’s
transmission characteristics. A typical TFT-LCD panel consisting
of 256 grayscale levels takes an 8-bit digital word to select an
appropriate gamma reference voltage. An 8-bit source driver may
use 12 analog voltages that match the characteristic gamma curve
for optimum panel picture quality. The ADD8701 is specifically
designed to generate analog reference voltages to meet the gamma
characteristics of an LCD panel used by the source driver. The
gamma reference buffers offer 10 mA drive capability.
The ADD8701 is designed to meet the rail-to-rail capability
needed by the application and yet offers a low cost-per-channel
solution. The design maximizes the die area by offering channels
to swing to the positive and negative rails. It is imperative that
the channels swinging close to the supply rail be used for the
positive gamma references and that the channels swinging close
to GND be used for the negative gamma references. See Figure 2
for an example of the application circuit.
LCD VCOM Buffer
The output of the VCOM buffer is designed to control the voltage
on the back plate of the LCD display. The buffer must be capable
of sinking and sourcing capacitive pulse current. The amplifier
stability is designed for high load capacitance. A high quality
ceramic capacitor is recommended to supply short duration current
pulses at the output. The VCOM buffer of the ADD8701 can
handle up to 35 mA of continuous output current and can drive
up to 1,000 nF of pure capacitive load.
Unused Buffers
Inputs of any unused buffer should be tied to the ground plane.
POSITIVE GAMMA REFERENCES
GMA
A12
GMA
A11
GMA
A10
GMA
A9
GMA
A8
GMA
A7
GMA
A6
GMA
A5
GMA
A4
GMA
A3
GMA
A2
GMA
A1
ADD8701
LCD SOURCE DRIVER
NEGATIVE GAMMA REFERENCES
Figure 2. Application Circuit
REV. 0
C03599–0–4/03(0)
–8–
ADD8701
32-Lead Lead Frame Chip Scale Package [LFCSP]
(CP-32)
Dimensions shown in millimeters
COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2
0.30
0.23
0.18
0.20 REF
0.80 MAX
0.65 NOM
0.05 MAX
0.02 NOM
12MAX
1.00
0.90
0.80 SEATING
PLANE
COPLANARITY
0.08
1
32
8
9
25
24
16
17
BOTTOM
VIEW
0.50
0.40
0.30
3.50
REF
0.50
BSC
PIN 1
INDICATOR
TOP
VIEW
5.00
BSC SQ
4.75
BSC SQ SQ
3.25
3.10
2.95
PIN 1
INDICATOR
0.60 MAX
0.60 MAX
OUTLINE DIMENSIONS