RT8293AHZSP - Richtek - Datasheet.Live

RT8293A

DS8293A-03 March 2011 www.richtek.com

Ordering Information

Note :

Richtek products are :

` RoHS compliant and compatible with the current require-

ments of IPC/JEDEC J-STD-020.

` Suitable for use in SnPb or Pb-free soldering processes.

Applications

z Wireless AP/Router

z Set-Top-Box

z Industrial a nd Commerci al Low Power Systems

zLCD Monitors and TVs

zGreen Electronics/Applia nces

zPoint of Load Regulation of High-Performa nce DSPs

3A, 23V, 340kHz Synchronous Step-Down Converter

General Description

The RT8293A is a high efficiency , monolithic synchronous

step-down DC/DC converter that can deliver up to 3A

output current from a 4.5V to 23V input supply. The

RT8293A's current mode architecture and external

compensation allow the transient response to be

optimized over a wide range of loads and output capacitors.

Cycle-by-cycle current limit provides protection against

shorted outputs and soft-start eliminates input current

surge during start-up. The RT8293A also provides output

under voltage protection and thermal shutdown protection.

The low current (<3μA) shutdown mode provides output

disconnection, enabling easy power management in

battery-powered systems. The RT8293A is available in

a n SOP-8 (Exposed Pad) pa ckage.

Features

z ±±

±±

±1.5% High Accuracy Feedback Voltage

z 4.5V to 23V Input Voltage Range

z 3A Output Current

z Integrated N-MOSFET Switches

z Current Mode Control

z Fixed Frequency Operation : 340kHz

z Output Adjustable from 0.8V to 20V

z Up to 95% Efficiency

z Programmable Soft-Start

z Stable with Low-ESR Ceramic Output Capacitors

z Cycle-by-Cycle Over Current Protection

z Input Under Voltage Lockout

z Output Under Voltage Protection

z Thermal Shutdown Protection

z RoHS Compliant and Halogen Free

Pin Configurations

(TOP VIEW)

SOP-8 (Exposed Pad)

BOOT

VIN

GND

COMP

GND

Marking Information

RT8293AxGSP : Product Number

x : H or L

YMDNN : Date Code

RT8293AxZSP : Product Number

x : H or L

YMDNN : Date Code

RT8293Ax

GSPYMDNN

RT8293Ax

ZSPYMDNN

RT8293AxGSP RT8293AxZSP

Package Type

SP : SOP-8 (Exposed Pad-Option 1)

RT8293A

Lead Plating System

G : Green (Halogen Free and Pb Free)

Z : ECO (Ecological Element with

Halogen Free and Pb free)

H : UVP Hiccup

L : UVP Latch-Off

RT8293A

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Functional Pin Description

Pin No. Pin Name

Pin Function

1 BOOT Bootstrap for high side gate driver. Connect a 0.1µF or greater ceramic

capacitor from BOOT to SW pins.

2 VIN Input Supply Voltage, 4.5V to 23V. Must bypass with a suitably large ceramic

capacitor.

3 SW Phase Node. Connect to external L-C filter.

9 (Exposed Pad) GND Ground. The exposed pad must be soldered to a large PCB and connected to

GND for maximum power dissipation.

5 FB

Feedback Input pin. This pin is connected to the converter output. It is used to

set the output of the converter to regulate to the desired value via an internal

resistive voltage divider. For an adjustable output, an external resistive

voltage divider is connected to this pin.

6 COMP Compensation Node. COMP is used to compensate the regulation control

loop. Connect a series RC network from COMP to GND. In some cases, an

additional capacitor from COMP to GND is required.

7 EN Enable Input Pin. A logic high enables the converter; a logic low forces the

RT8293A into shutdown mode reducing the supply current to less than 3µA.

Attach this pin to VIN with a 100kΩ pull up resistor for automatic startup.

8 SS Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor

from SS to GND to set the soft-start period. A 0.1µF capacitor sets the

soft-start period to 13.5ms.

VOUT (V)

R1 (kΩ)

R2 (kΩ)

RC (kΩ)

CC (nF)

L (µH)

COUT (µF)

8 27 3 33 3.3 22 22 x 2

5 62 11.8 20 3.3 15 22 x 2

3.3 75 24 13 3.3 10 22 x 2

2.5 25.5 12 9.1 3.3 6.8 22 x 2

1.5 10.5 12 5.6 3.3 3.6 22 x 2

1.2 12 24 4.3 3.3 3.6 22 x 2

1 3 12 3.6 3.3 2 22 x 2

Table 1. Recommended Component Selection

Typical Application Circuit

VIN

GND

BOOT

10µH

100nF

22µF x 2

75k

24k

VOUT

3.3V/3A

10µF x 2

VIN

4.5V to 23V RT8293A

CSS 4, 9 (Exposed Pad)

CBOOT

CIN

0.1µF

COUT

REN 100k

COMP

3.3nF RC

13k

Open

FB 5

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Function Block Diagram

Comparator

Oscillator

Foldback

Control

0.4V

Internal

Regulator

2.7V

Shutdown

Comparator

Current Sense

Amplifier

BOOT

VIN

GND

COMP

VAVCC

6µA

Slope Comp

Current

Comparator

-EA

0.8V

1.2V

Lockout

Comparator

VCC

85m

Ω

85m

Ω

RT8293A

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Electrical Characteristics

(VIN = 12V, TA = 25°C, unless otherwise specified)

Absolute Maximum Ratings (Note 1)

lSupply Voltage, VIN ---------------------------------------------------------------------------------------- −0.3V to 25V

lInput Voltage, SW------------------------------------------------------------------------------------------ −0.3V to (VIN + 0.3V)

lVBOOT − VSW ------------------------------------------------------------------------------------------------- −0.3V to 6V

l Other Pins Voltage------------------------------------------------------------------------------------------ −0.3V to 6V

lPower Dissipation, PD @ TA = 25°C

SOP-8 (Exposed Pad)-------------------------------------------------------------------------------------1.333W

l Package Thermal Resistance (Note 2)

SOP-8 (Exposed Pad), θJA--------------------------------------------------------------------------------75°C/W

SOP-8 (Εxposed Pad), θJC -------------------------------------------------------------------------------15°C/W

lLead Temperature (Soldering, 10 sec.)-----------------------------------------------------------------260°C

lJunction Temperature--------------------------------------------------------------------------------------150°C

lStorage Temperature Range------------------------------------------------------------------------------ −65°C to 150°C

lESD Susceptibility (Note 3)

HBM (Human Body Mode)--------------------------------------------------------------------------------2kV

MM (Machine Mode)---------------------------------------------------------------------------------------200V

Recommended Operating Conditions (Note 4)

lSupply Voltage, VIN ----------------------------------------------------------------------------------------4.5V to 23V

lJunction Temperature Range----------------------------------------------------------------------------- −40°C to 125°C

lAmbient Temperature Range----------------------------------------------------------------------------- −40°C to 85°C

Parameter Symbol Test Conditions Min Typ Max

Unit

Shutdown Supply Current VEN = 0V -- 0.5 3 µA

Supply Current VEN = 3 V, VFB = 0.9V -- 0.8 1.2 mA

Feedback Voltage VFB 4.5V ≤ VIN ≤ 23V 0.788

0.8 0.812

Error Amplifier

Transconductance GEA ∆IC = ± 10µA -- 940 -- µA/V

High Side Switch

On-Resistance RDS(ON)1

-- 85 -- mΩ

Low Side Switch

On-Resistance RDS(ON)2

-- 85 -- mΩ

High Side Switch Leakage

Current VEN = 0V, VSW = 0V -- 0 10 µA

Upper Switch Current Limit

Min. Duty Cycle, VBOOT− VSW = 4.8V

-- 5.1 -- A

Lower Switch Current Limit

From Drain to Source -- 1.5 -- A

COMP to Current Sense

Transconductance GCS -- 5.4 -- A/V

Oscillation Frequency f

OSC1 300 340 380 kHz

Short Circuit Oscillation

Frequency fOSC2 VFB = 0V -- 100 -- kHz

Maximum Duty Cycle DMAX VFB = 0.7V -- 93 -- %

Minimum On Time t

ON -- 100 -- ns

To be continued

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Parameter Symbol Test Conditions Min Typ

Max Unit

Logic-High

VIH 2.7 -- 5.5

EN Input Threshold

Voltage Logic-Low V

IL -- -- 0.4 V

Input Under Voltage Lockout

Threshold VUVLO VIN Rising 3.8 4.2 4.5 V

Input Under Voltage Lockout

Threshold Hysteresis ∆VUVLO -- 320 -- mV

Soft-Start Current ISS VSS = 0V -- 6 -- µA

Soft-Start Period tSS CSS = 0.1µF -- 13.5

-- ms

Thermal Shutdown TSD -- 150

-- °C

Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for

stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the

operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended

periods may remain possibility to affect device reliability.

Note 2. θJA is measured in natural convection at TA = 25°C on a high effective thermal conductivity four-layer test board of

JEDEC 51-7 thermal measurement standard. The measurement case position of θJC is on the exposed pad of the

package.

Note 3. Devices are ESD sensitive. Handling precaution is recommended.

Note 4. The device is not guaranteed to function outside its operating conditions.

RT8293A

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Reference Voltage vs. Temperature

0.780

0.785

0.790

0.795

0.800

0.805

0.810

0.815

0.820

-50 -25 0 25 50 75 100 125

Temperature (°C)

Reference Voltage (V)

Output Voltage vs. Output Current

3.24

3.25

3.26

3.27

3.28

3.29

3.30

3.31

3.32

3.33

3.34

3.35

3.36

0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3

Output Current (A)

Output Voltage (V)

Typical Operating Characteristics

Frequency vs. Temperature

300

310

320

330

340

350

360

370

380

-50 -25 0 25 50 75 100 125

Temperature (°C)

Frequency (kHz) 1

VIN = 12V, VOUT = 3.3V, IOUT = 0A

Frequency vs. Input Voltage

300

310

320

330

340

350

360

370

380

4 6 8 10 12 14 16 18 20 22 24

Input Voltage (V)

Frequency (kHz) 1

Efficiency vs. Output Current

100

0 0.5 1 1.5 2 2.5 3

Output Current (A)

Efficiency (%)

VOUT = 3.3V

VIN = 4.5V

VIN = 12V

VIN = 23V

Reference Voltage vs. Input Voltage

0.780

0.785

0.790

0.795

0.800

0.805

0.810

0.815

0.820

4 6 8 10 12 14 16 18 20 22 24

Input Voltage (V)

Reference Voltage (V)

VOUT = 3.3V, IOUT = 0A

VOUT = 3.3V

VIN = 4.5V

VIN = 12V

VIN = 23V

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Current Lim it vs. Temperature

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

8.0

-50 -25 0 25 50 75 100 125

Tem pera tur e (°C)

Current Lim it (A)

Switching

Time (1μs/Div)

VOUT

(10mV/Div)

(2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A

VSW

(10V/Div)

Load Transient Response

Time (100μs/Div)

VOUT

(200mV/Div)

IOUT

(2A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 3A to 1.5A

Load Transient Response

Time (100μs/Div)

VOUT

(200mV/Div)

IOUT

(2A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 0A to 3A

Power On from VIN

Time (10ms/Div)

VOUT

(2V/Div)

(2A/Div) VIN = 12V, VOUT = 3.3V, I OUT = 3A

VIN

(5V/Div)

Power Off from VIN

Time (10ms/Div)

VOUT

(2V/Div)

(2A/Div) VIN = 12V, VOUT = 3.3V, IOUT = 3A

VIN

(5V/Div)

VIN = 12V, VOUT = 3.3V

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Power On from EN

Time (5ms/Div)

VOUT

(2V/Div)

(2A/Div)

VIN = 12V, VOUT = 3.3V, IOUT = 3A

VEN

(5V/Div)

Power Off from EN

Time (5ms/Div)

VOUT

(2V/Div)

(2A/Div)

VIN = 12V, VOUT = 3.3V, I OUT = 3A

VEN

(5V/Div)

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Application Information

The RT8293A is a synchronous high voltage buck converter

that can support the input voltage range from 4.5V to 23V

and the output current can be up to 3A.

Output Voltage Setting

The resistive divider allows the FB pin to sense the output

voltage as shown in Figure 1.

Figure 1. Output Voltage Setting

The output voltage is set by an external resistive voltage

divider according to the following equation :







OUTFB

V = V1

where VFB is the feedback reference voltage (0.8V typ.).

External Bootstrap Diode

Connect a 100nF low ESR ceramic capacitor between

the BOOT pin and SW pin. This capacitor provides the

gate driver voltage for the high side MOSFET.

It is recommended to add an external bootstrap diode

between an external 5V and BOOT pin for efficiency

improvement when input voltage is lower than 5.5V or duty

ratio is higher than 65% .The bootstrap diode can be a

low cost one such as IN4148 or BAT54. The external 5V

can be a 5V fixed input from system or a 5V output of the

RT8293A. Note that the external boot voltage must be

lower than 5.5V.

Figure 2. External Bootstrap Diode

Soft-Start

The RT8293A contains an external soft-start clamp that

gradually raises the output voltage. The soft-start timing

can be programmed by the external capacitor between

SS pin and GND. The chip provides a 6µA charge current

for the external capacitor. If 0.1µF capacitor is used to

set the soft-start, the period will be 13.5ms(typ.).

Chip Enable Operation

The EN pin is the chip enable input. Pulling the EN pin

low (<0.4V) will shut down the device. During shutdown

mode, the RT8293A quiescent current drops to lower than

3µA. Driving the EN pin high (>2.7V, < 5.5V) will turn on

the device again. For external timing control (e.g.RC),

the EN pin can also be externally pulled high by adding a

REN* resistor and CEN* capacitor from the VIN pin (see

Figure 5).

An external MOSFET can be added to implement digital

control on the EN pin when no system voltage above 2.5V

is available, as shown in Figure 3. In this case, a 100kΩ

pull-up resistor, REN, is connected between VIN and the

EN pin. MOSFET Q1 will be under logic control to pull

down the EN pin.

Figure 3. Enable Control Circuit for Logic Control with

Low Voltage

To prevent enabling circuit when VIN is smaller than the

VOUT target value, a resistive voltage divider can be placed

between the input voltage and ground and connected to

the EN pin to adjust IC lockout threshold, as shown in

Figure 4. For example, if an 8V output voltage is regulated

from a 12V input voltage, the resistor, REN2, can be

selected to set input lockout threshold larger than 8V.

RT8293A

GND

VOUT

BOOT

RT8293A 100nF

VIN

GND

BOOT

VOUT

Chip Enable

VIN RT8293A

CSS COMP CCRC

9 (Exposed Pad)

CBOOT

COUT

CIN

REN

100k

RT8293A

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OUT IN

RMSOUT(MAX) INOUT

V V

I = I1

−

This formula has a maximum at VIN = 2VOUT, where

IRMS = IOUT / 2. This simple worst-case condition is

commonly used for design because even significant

deviations do not offer much relief.

Choose a capacitor rated at a higher temperature than

required. Several capacitors may also be paralleled to

meet size or height requirements in the design.

For the input capacitor,two 10µF low ESR ceramic

capacitors are recommended. For the recommended

capacitor, please refer to table 3 for more detail.

The selection of COUT is determined by the required ESR

to minimize voltage ripple.

Moreover, the amount of bulk capacitance is also a key

for COUT selection to ensure that the control loop is stable.

Loop stability can be checked by viewing the load transient

response as described in a later section.

CIN and COUT Selection

The input capacitance, CIN, is needed to filter the

trapezoidal current at the source of the high side MOSFET.

To prevent large ripple current, a low ESR input capacitor

sized for the maximum RMS current should be used. The

RMS current is given by :

Table 2. Suggested Inductors for Typical

Application Circuit

Component

Supplier Series Dimensions

(mm)

TDK VLF10045

10 x 9.7 x 4.5

TDK SLF12565

12.5 x 12.5 x 6.5

TAIYO

YUDEN NR8040 8 x 8 x 4

Having a lower ripple current reduces not only the ESR

losses in the output capacitors but also the output voltage

ripple. High frequency with small ripple current can achieve

highest efficiency operation. However, it requires a large

inductor to achieve this goal.

For the ripple current selection, the value of ∆IL = 0.24(IMAX)

will be a reasonable starting point. The largest ripple

current occurs at the highest VIN. To guarantee that the

OUTOUT

L(MAX)IN(MAX)

L =1

fIV



×−



×∆



The inductor's current rating (caused a 40°C temperature

rising from 25°C ambient) should be greater than the

maximum load current and its saturation current should

be greater than the short circuit peak current limit. Please

see Table 2 for the inductor selection reference.

OUTOUT

LIN

I =1

fLV



∆×−





Under Voltage Protection

Hiccup Mode

For the RT8293AH, Hiccup Mode Under Voltage Protection

(UVP) is provided. When the FB voltage drops below half

of the feedback reference voltage, VFB, the UVP function

will be triggered and the RT8293AH will shut down for a

period of time and then recover automatically. The Hiccup

Mode UVP can reduce input current in short-circuit

conditions.

Latch-Off Mode

For the RT8293AL, Latch-Off Mode Under Voltage

Protection (UVP) is provided. When the FB voltage drops

below half of the feedback reference voltage, VFB, UVP

will be triggered and the RT8293AL will shutdown in Latch-

Off Mode. In shutdown condition, the RT8293AL can be

reset via the EN pin or power input VIN.

Inductor Selection

The inductor value and operating frequency determine the

ripple current according to a specific input and output

voltage. The ripple current ∆IL increases with higher VIN

and decreases with higher inductance.

Figure 4. The Resistors can be Selected to Set IC

Lockout Threshold

ripple current stays below the specified maximum, the

inductor value should be chosen according to the following

equation :

VIN

GND

BOOT

VOUT

VIN

RT8293A

CSS COMP CCRC

9 (Exposed Pad)

CBOOT

COUT

CIN

100k 8V

12V

REN2

REN1 10µF

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DS8293A-03 March 2011 www.richtek.com

OUTL

OUT

VIESR 8fC



∆≤∆+





The output ripple will be highest at the maximum input

voltage since ∆IL increases with input voltage. Multiple

capacitors placed in parallel may be needed to meet the

ESR and RMS current handling requirement. Dry tantalum,

special polymer, aluminum electrolytic and ceramic

capacitors are all available in surface mount packages.

Special polymer capacitors offer very low ESR value.

However, it provides lower capacitance density than other

types. Although Tantalum capacitors have the highest

capacitance density, it is important to only use types that

pass the surge test for use in switching power supplies.

Aluminum electrolytic capacitors have significantly higher

ESR. However, it can be used in cost-sensitive applications

for ripple current rating and long term reliability

considerations. Ceramic capacitors have excellent low

ESR characteristics but can have a high voltage coefficient

and audible piezoelectric effects. The high Q of ceramic

capacitors with trace inductance can also lead to significant

ringing.

Higher values, lower cost ceramic capacitors are now

becoming available in smaller case sizes. Their high ripple

current, high voltage rating and low ESR make them ideal

for switching regulator applications. However, care must

be taken when these capacitors are used at input and

output. When a ceramic capacitor is used at the input

and the power is supplied by a wall adapter through long

wires, a load step at the output can induce ringing at the

input, VIN. At best, this ringing can couple to the output

and be mistaken as loop instability. At worst, a sudden

The output ripple, ∆VOUT , is determined by : inrush of current through the long wires can potentially

cause a voltage spike at VIN large enough to damage the

part.

Checking Transient Response

The regulator loop response can be checked by looking

at the load transient response. Switching regulators take

several cycles to respond to a step in load current. When

a load step occurs, VOUT immediately shifts by an amount

equal to ∆ILOAD (ESR) and COUT also begins to be charged

or discharged to generate a feedback error signal for the

regulator to return VOUT to its steady-state value. During

this recovery time, VOUT can be monitored for overshoot or

ringing that would indicate a stability problem.

EMI Consideration

Since parasitic inductance and capacitance effects in PCB

circuitry would cause a spike voltage on SW pin when

high side MOSFET is turned-on/off, this spike voltage on

SW may impact on EMI performance in the system. In

order to enhance EMI performance, there are two methods

to suppress the spike voltage. One way is to by placing

an R-C snubber between SW and GND and locating them

as close as possible to the SW pin (see Figure 5). Another

method is by adding a resistor in series with the bootstrap

capacitor, CBOOT, but this method will decrease the driving

capability to the high side MOSFET. It is strongly

recommended to reserve the R-C snubber during PCB

layout for EMI improvement. Moreover, reducing the SW

trace area and keeping the main power in a small loop will

be helpful on EMI performance. For detailed PCB layout

guide, please refer to the section Layout Considerations.

Figure 5. Reference Circuit with Snubber and Enable Timing Control

VIN

GND

BOOT

10µH

100nF

22µFx2

75k

24k

VOUT

3.3V/3A

10µF x 2

Chip Enable

VIN

4.5V to 23V RT8293A

CSS

0.1µFCOMP

3.3nF RC

13k

9 (Exposed Pad)

CBOOT

COUT

CIN

RBOOT*

RS*

CS*

REN*

CEN*

* : Optional

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(a) Copper Area = (2.3 x 2.3) mm2, θJA = 75°C/W

(b) Copper Area = 10mm2, θJA = 64°C/W

Figure 7. Derating Curves for RT8293A Package

Thermal Considerations

For continuous operation, do not exceed the maximum

operation junction temperature 125°C. The maximum

power dissipation depends on the thermal resistance of

IC package, PCB layout, the rate of surroundings airflow

and temperature difference between junction to ambient.

The maximum power dissipation can be calculated by

following formula :

PD(MAX) = (TJ(MAX) − TA ) / θJA

where TJ(MAX) is the maximum operation junction

temperature , TA is the ambient temperature and the θJA is

the junction to ambient thermal resistance.

For recommended operating conditions specification of

RT8293A, the maximum junction temperature is 125°C.

The junction to ambient thermal resistance θJA is layout

dependent. For SOP-8 (Exposed Pad) package, the

thermal resistance θJA is 75°C/W on the standard JEDEC

51-7 four-layers thermal test board. The maximum power

dissipation at TA = 25°C can be calculated by following

formula :

PD(MAX) = (125°C − 25°C) / (75°C/W) = 1.333W

(min.copper area PCB layout)

PD(MAX) = (125°C − 25°C) / (49°C/W) = 2.04W

(70mm2copper area PCB layout)

The thermal resistance θJA of SOP-8 (Exposed Pad) is

determined by the package architecture design and the

PCB layout design. However, the package architecture

design had been designed. If possible, it's useful to

increase thermal performance by the PCB layout copper

design. The thermal resistance θJA can be decreased by

adding copper area under the exposed pad of SOP-8

(Exposed Pad) package.

As shown in Figure 6, the amount of copper area to which

the SOP-8 (Exposed Pad) is mounted affects thermal

performance. When mounted to the standard

SOP-8 (Exposed Pad) pad (Figure 6.a), θJA is 75°C/W.

Adding copper area of pad under the SOP-8 (Exposed

Pad) (Figure 6.b) reduces the θJA to 64°C/W. Even further

increasing the copper area of pad to 70mm2 (Figure 6.e)

reduces the θJA to 49°C/W.

The maximum power dissipation depends on operating

ambient temperature for fixed TJ(MAX) and thermal

resistance θJA. For RT8293A packages, the derating curves

in Figure 7 allow the designer to see the effect of rising

ambient temperature on the maximum power dissipation.

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

2.0

2.2

025 50 75 100 125

Ambient Temperature(°C)

Power Dissipation (W)

Copper Area

70mm2

50mm2

30mm2

10mm2

Min.Layout

Four Layer PCB

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(d) Copper Area = 50mm2 , θJA = 51°C/W

(e) Copper Area = 70mm2 , θJA = 49°C/W

Figure 6. Themal Resistance vs. Copper Area Layout

Design

Layout Consideration

Follow the PCB layout guidelines for optimal performance

of the RT8293A.

} Keep the traces of the main current paths as short and

wide as possible.

} Put the input capacitor as close as possible to the device

pins (VIN and GND).

} SW node is with high frequency voltage swing and should

be kept at small area. Keep analog components away

from the SW node to prevent stray capacitive noise pick-

up.

} Connect feedback network behind the output capacitors.

Keep the loop area small. Place the feedback

components near the RT8293A.

} Connect all analog grounds to a command node and

then connect the command node to the power ground

behind the output capacitors.

} An example of PCB layout guide is shown in Figure 8 for

reference.

Figure 8. PCB Layout Guide

VIN

VOUT

GND

CIN

GND

VOUT

COUT

Input capacitor must

be placed as close

to the IC as possible.

SW should be connected to inductor by

wide and short trace. Keep sensitive

components away from this trace.

The feedback components

must be connected as close

to the device as possible.

BOOT

VIN

GND

COMP

GND

RS*

CS*

GND VIN

REN

RT8293A

14 DS8293A-03 March 2011www.richtek.com

Table 3. Suggested Capacitors for CIN and COUT

Location

Component Supplier

Part No. Capacitance (µF)

Case Size

CIN MURATA GRM31CR61E106K 10 1206

CIN TDK C3225X5R1E106K 10 1206

CIN TAIYO YUDEN TMK316BJ106ML 10 1206

COUT MURATA GRM31CR60J476M 47 1206

COUT TDK C3225X5R0J476M 47 1210

COUT MURATA GRM32ER71C226M 22 1210

COUT TDK C3225X5R1C22M 22 1210

RT8293A

DS8293A-03 March 2011 www.richtek.com

Richtek Technology Corporation

Headquarter

5F, No. 20, Taiyuen Street, Chupei City

Hsinchu, Taiwan, R.O.C.

Tel: (8863)5526789 Fax: (8863)5526611

Information that is provided by Richtek Technology Corporation is believed to be accurate and reliable. Richtek reserves the right to make any change in circuit

design, specification or other related things if necessary without notice at any time. No third party intellectual property infringement of the applications should be

guaranteed by users when integrating Richtek products into any application. No legal responsibility for any said applications is assumed by Richtek.

Richtek Technology Corporation

Taipei Office (Marketing)

5F, No. 95, Minchiuan Road, Hsintien City

Taipei County, Taiwan, R.O.C.

Tel: (8862)86672399 Fax: (8862)86672377

Email: marketing@richtek.com

Outline Dimension

EXPOSED THERMAL PAD

(Bottom of Package)

8-Lead SOP (Exposed Pad) Plastic Package

Dimensions In Millimeters

Dimensions In Inches

Symbol Min Max Min Max

A 4.801 5.004 0.189 0.197

B 3.810 4.000 0.150 0.157

C 1.346 1.753 0.053 0.069

D 0.330 0.510 0.013 0.020

F 1.194 1.346 0.047 0.053

H 0.170 0.254 0.007 0.010

I 0.000 0.152 0.000 0.006

J 5.791 6.200 0.228 0.244

M 0.406 1.270 0.016 0.050

X 2.000 2.300 0.079 0.091

Option 1

Y 2.000 2.300 0.079 0.091

X 2.100 2.500 0.083 0.098

Option 2

Y 3.000 3.500 0.118 0.138