SY89854U
Precision Low Power 1:4 LVPECL Fanout
Buffer/Translator with Internal Termination
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
Precision Edge is a registered trademark of Micrel, Inc.
General Description
The SY89854U is a 2.5V/3.3V precision, high-
speed, fully differential 1:4 LVPECL fanout buffer.
Optimized to provide four identical output copies
with less than 20ps of skew and less than 10ps(pp)
total jitter, the SY89854U can process clock signals
as fast as 2GHz.
The diff erential in put inclu des Micrel’s un ique, p atent
pending 3-pin input termination architecture that
interfaces to any differential signal (AC or DC-
coupled) as sm all as 100m V (200m Vpp) without an y
level shifting or termination resistor networks in the
signal path. For AC-coupled input interface
applications, an on-board output reference voltage
(VREF-AC) is provided to bias the center-tap (VT)
pin. The outputs are 800mV LVPECL, with fast
rise/fall times guaranteed to be less than 180ps.
The SY89854U operates f rom a 2.5V ±5% supply or
a 3.3V ±10% supply and is guaranteed over the full
industrial temperature range of –40°C to +85°C.
The SY89854U is part of Micrel’s high-speed,
Precisio n Edge ® pro duc t line.
All support documentation can be found on Micrel’s
web site at: www.micrel.com.
Typical Application s
200MHz (Q - /Q)
TIME (600ps/div.)
Output Swing
(200mV/div.)
Precision Edge®
Features
•Precision 1:4, LVPECL fanout buffer
•Low power: 137mW (2.5V typ)
•Guarante ed AC perf ormance over temperature
and supply voltage:
–DC- to > 2GHz Clock fMAX
–<340ps tpd
–<180ps tr/tf time
–<20ps max. skew
•Ultra-low jitter design:
–<1ps(rms) random jitter
–<10ps(pp) deterministic jitter
–<10ps(pp) total jitter (clock)
•Unique patent pending input termination and VT
pin accepts DC-coupled and AC-coupl ed inp uts
(CML, PECL, LVDS)
•Typical 800mV (100k) LVPECL output swing
•Power supply 2.5V ±5% or 3.3V ±10%
•Industrial temperature range –40°C to +85 °C
•Available in ultra-small (3mm x 3mm) 16-pin QFN
package
Applications
•SONET and All GigE clock distribution
•Fibre Channel clock and data distribution
•Back plane distri but ion
United States Patent No. RE44,134
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
2
Ordering Information(1)
Part Number Package Type Operating
Range Package Marking Lead
Finish
SY89854UMG QFN-16 Industrial 854U with Pb-free bar-line indicator Pb-Free
NiPdAu
SY89854UMGTR(2) QFN-16 Industrial 854U with Pb-free bar-line indicator Pb-Free
NiPdAu
Notes:
1. Contact factory for die availability. Dice are guaranteed at TA = 25°C, DC Electricals Onl y.
2. Tape and Reel.
Pin Configuration
16-Pin QFN
Pin Description
Pin Number Pin Name Pin Function
1, 4 IN, /IN
Differential Input: This input pair is the signal to be buffered. These inputs accept
AC- or DC-coupled differential signals as small as 100mV (200mVPP). Each pin
of this pair internally terminates to a VT pin through 50Ω. Note that this input will
default to an indeterminate state if left open. Please refer to the “Input Interface
Applicat ion s” sect ion for more details.
2 VT
Input Termination Center-Tap: Each side of the differential input pair terminates
to this pin. The VT pin provides a center-tap to a termination network for
maximum interface flexibility. See “Input Interface Applications” section for more
details.
8,13 VCC Positive Power Supply. Bypass with 0.1µF||0.01µF low ESR capacitors as close
to the VCC pin as possible.
15, 14
12, 11
10, 9
7, 6
Q0, /Q0
Q1, /Q1
Q2, /Q2
Q3, /Q3
Differential 100K LVPECL Output: These LVPECL outputs are the precision, low
skew copies of the input signal. Terminate with 50Ω to VCC–2V. Unused output
pairs may be left floating with no impact on jitter. See “Output Interface
Applications” section.
5, 16 GND,
Exposed Pad
Ground. Ground pin and exposed pad must be connected to the same ground
plane.
3 VREF-AC
Reference Voltage: This output biases to VCC–1.2V. It is used when AC coupling
the inputs (IN, /IN). Connect VREF-AC to the VT pin. Bypass VREF-AF pin with a
0.01µF low ESR capacitor to VCC. Maximum sink/source capability is 1.5mA. See
“Input Interf ac e Applic ations” section for more details.
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
4
Absolute Maximum Ratings(1)
Supply Voltage (VCC) .......................... –0.5V to +4.0V
Input Voltage (VIN) .................................. –0.5V to VCC
LVPECL Output Current (IOUT)
Continuous ................................................. 50mA
Surge ........................................................ 100mA
Termination Current(3)
Source or sink current on VT .................... ±50mA
Input Current
Source or sink current on IN, /IN .............. ±50mA
VREF-AC Current(3)
Source or sink current ................................ ±2mA
Lead Temperature (soldering, 20sec.) ........... +260°C
Storage Temperature (Ts) .................. –65°C to 150°C
Operating Ratings(2)
Supply Voltage (VCC).................. +2.375V to +2.625V
......................................................+3.0V to +3.6V
Ambient Temperature (TA) ................ –40°C to +85°C
Package Thermal Resistance(4)
QFN (θJA)
Still-Air ..................................................... 60°C/W
QFN (ψJB)
Junction-to-Board .................................... 38°C/W
DC Electrical Characteristics (5)
TA = –40°C to +85°C, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VCC Power Supply 2.375 2.5 2.625 V
3.0 3.3 3.6 V
ICC Power Supply Current No load, max. VCC 55 78 mA
RDIFF_IN Differenti al Input Resistance
(IN, /IN) 90 100 110 Ω
RIN Input Resistance
(IN-to-VT) 45 50 55 Ω
VIH Input High Voltage
(IN, /IN) Note 6 VCC –1.6 VCC V
VIL Input Low Voltage
(IN, /IN) 0 VIH –0.1 V
VIN Input Voltage Swing
(IN, /IN) See Figure 1a. 0.1 1.7 V
VDIFF_IN Differential Input Voltage Swing
(IN, /IN) See Figure 1b. 0.2 V
VT_IN IN-to-VT 1.28 V
Notes:
1. Permanent device dam age may occur if the Absolute Maximum Ratings are exceeded. This is a stress rating only and functional operation
is not implied at conditions other than those detailed in the operational s ections of this dat a sheet. Exposure to Absolute Maximum Ratings
conditi ons for extended periods may aff ect device reli abili t y.
2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings.
3. Due to the limited drive capabi lit y use for input of the same package only.
4. Package thermal resist ance assumes exposed pad is sol dered (or equivalent) to the devices most negative potential on the PCB. θJA and
ψJB are calculated based on a 4-layer board in still air, unless otherwise st ated.
5. The ci rcuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been establis hed.\
6. VIH (min) not lower than 1.2V.
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
5
LVPECL Outputs DC Electrical Characteristics(7)
VCC = +2.5V ±5% or +3.3V ±10%; TA = –40°C to + 85°C; RL = 50Ω to VCC –2V, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
VOH Output HIGH Voltage
Q, /Q VCC–1.145 VCC–0.895 V
VOL Output LOW Voltage
Q, /Q VCC–1.945 VCC–1.695 V
VOUT Output Voltage Swing
Q, /Q See Figure 1a. 550 800 mV
VDIFF-OUT Differential Output Voltage Swing
Q,/Q See Figure 1b. 1100 1600 mV
Note:
7. The ci rcuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been establis hed.
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
6
AC Electrical Characteristics(8)
VCC = +2.5V ±5% or +3.3V ±10%; TA = –40°C to + 85°C, RL = 50Ω to VCC–2V, unless otherwise stated.
Symbol Parameter Condition Min Typ Max Units
fMAX Maximum Operating Frequency Clock, VOUT ≥ 400mV 2.0 3.5 GHz
NRZ Data 2.5 Gbps
tpd Propagation Delay (IN-to-Q) VIN ≥ 100mVpk 140 220 340 ps
tpd
Tempco Differential Propagation Delay Temperature
Coefficient 100 fs/oC
tSKEW Output-to-Output Skew Note 9 4 20 ps
Part-to-Part Skew Note 10 150 ps
tJitter
Random Jitter (RJ)
Deterministic Jitter (DJ) Note 11 1 psRMS
Note 12
10 psPP
Cycle-to-Cycle J itter
Total Jitter Note 13
Note 14
1
10 psRMS
psPP
tr, tf Output Rise/Fall Time (20% to 80%) At full output swing. 50 100 180 ps
Notes:
8. High-frequency AC-parameters are guaranteed by design and characterizati on.
9. Output-to-output skew is measured between outputs under identic al conditi ons.
10. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and with no skew of the edges at
the respective inputs. Part-to-part skew includes variation in tpd.
11. Random jitt er is measured with a K28.7 character pattern, meas ured at 2.5Gbps.
12. DJ is measured at 2.5Gbps, with both K28.5 and 223 – 1 PRBS pattern.
13. Cycle-to-cycle jitter definition: The variation of periods between adjacent cycles, Tn – Tn-1 where T is the time between rising edges of the
output signal.
14. Total jitt er def i niti on: with an ideal clock input of frequenc y <fMAX, no more than one output edge in 1012 output edges will deviate by more
than the specified peak -to-peak jitter value.
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
7
Typical Operating Characteristics
VCC = 2.5V, VIN = 100m Vpk, TA = 25°C, unless otherwise stated.
100
200
300
400
500
600
700
800
900
200 1200 2200 3200 4200 5200 6200
FRE QUENCY ( MHz)
Amplitude
vs. Frequency
212
214
216
218
220
222
224
226
228
-40 -20 020 40 60 80 100 120
TEMPERATURE (C)
Propagati on De lay
vs. Tem perature
206
208
210
212
214
216
218
220
222
INPUT VOLTAGE (mV)
Propagati on De lay
vs. Input V oltage
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
12
Output Interface Applications
Note:
For +2.5V systems, R1 = 250Ω, R2 = 82.5Ω
Figure 4a. Parallel Thevenin-Equivalent
Termination
Note:
For +2.5V systems, Rb = 19Ω
For +3.3V systems, Rb = 50Ω
Figure 4b. Parallel Termination
(3-Resistor)
Related Product and Support Documentation
Part Number Function Data Sheet Link
SY58021U 4GHz, 1:4 LVPECL Fanout
Buffer/Translator with Internal Termination www.micrel.com/product-info/products/sy58021u.shtml
HBW Solutions New Products and Applications www.micrel.com/product-info/products/solutions.shtml
Micrel, Inc. SY89854U
August 2007 M9999-082907-C
hbwhelp@micrel.com or (408) 955-1690
13
16-Pin QFN
Package Notes:
(1) Package meets Level 2 Moisture Sensitivi t y Classification.
(2) All parts are dry-packaged before shipment.
(3) Exposed pad must be soldered to a ground for proper thermal management.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-10 00 WEB http:/w ww .micrel.com
The information f urnished by Micrel in this data sheet is believed to be accurat e and reliable. However, no responsibil
ity is assumed by Micrel
for its use. Micrel reserves the right t o change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devic
es or systems where malfunction of a
product can reas onably be expected to res ult in personal injury. Lif e support devic es or syst ems are devices or s ystems that
(a) are intended
for surgical implant into the body or (b) support or sustain life, and whose
failure to perform can be reasonably expected to result in a
significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or s
ystems is a
Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.
