PD- 95532 SMPS MOSFET IRF740AS/LPbF HEXFET(R) Power MOSFET Applications Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching l Lead-Free l Benefits Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified ( See AN 1001) VDSS Rds(on) max ID 0.55 10A 400V l D 2 Pak TO-262 Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TA = 25C PD @TC = 25C VGS dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds 10 6.3 40 3.1 125 1.0 30 5.9 -55 to + 150 Units A W W/C V V/ns C 300 (1.6mm from case ) Typical SMPS Topologies: l l Single transistor Flyback Xfmr. Reset Single Transistor Forward Xfmr. Reset ( Both for US Line Input only ) Notes through are on page 10 www.irf.com 1 7/20/04 IRF740AS/LPbF Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 400 --- --- 2.0 --- --- --- --- Typ. --- 0.48 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 0.55 VGS = 10V, ID = 6.0A 4.0 V VDS = VGS, ID = 250A 25 VDS = 400V, VGS = 0V A 250 VDS = 320V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 4.9 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 10 35 24 22 1030 170 7.7 1490 52 61 Max. Units Conditions --- S VDS = 50V, ID = 6.0A 36 ID = 10A 9.9 nC VDS = 320V 16 VGS = 10V, See Fig. 6 and 13 --- VDD = 200V --- ID = 10A ns --- RG = 10 --- RD = 19.5,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 320V, = 1.0MHz --- VGS = 0V, VDS = 0V to 320V Avalanche Characteristics Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units --- --- --- 630 10 12.5 mJ A mJ Typ. Max. Units --- --- 1.0 40 C/W Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Diode Characteristics IS ISM VSD trr Qrr ton 2 Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions D MOSFET symbol 10 --- --- showing the A G integral reverse --- --- 40 S p-n junction diode. --- --- 2.0 V TJ = 25C, IS = 10A, VGS = 0V --- 240 360 ns TJ = 25C, IF = 10A --- 1.9 2.9 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.irf.com IRF740AS/LPbF 100 100 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 10 TOP I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 1 0.1 4.5V 20s PULSE WIDTH TJ = 25 C 0.01 0.1 1 10 10 1 4.5V 0.1 0.1 100 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 100 TJ = 150 C 1 TJ = 25 C V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics www.irf.com 10 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 0.1 4.0 1 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 10 20s PULSE WIDTH TJ = 150 C 10.0 ID = 10A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature 3 IRF740AS/LPbF 20 100000 C, Capacitance(pF) 10000 VGS , Gate-to-Source Voltage (V) VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd Ciss 1000 Coss 100 10 Crss 10 100 VDS = 320V VDS = 200V VDS = 80V 16 12 8 4 1 1 ID = 10A 0 1000 FOR TEST CIRCUIT SEE FIGURE 13 0 10 VDS , Drain-to-Source Voltage (V) 40 100 100 OPERATION IN THIS AREA LIMITED BY RDS(on) 10us ID , Drain Current (A) ISD , Reverse Drain Current (A) 30 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 10 TJ = 150 C TJ = 25 C 1 0.1 0.2 V GS = 0 V 0.4 0.6 0.8 1.0 1.2 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage 4 20 QG , Total Gate Charge (nC) 1.4 100us 10 1ms 1 TC = 25 C TJ = 150 C Single Pulse 10 10ms 100 1000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.irf.com IRF740AS/LPbF 10.0 VGS 8.0 ID , Drain Current (A) RD V DS RG 6.0 D.U.T. + -VDD 10V Pulse Width 1 s Duty Factor 0.1 % 4.0 Fig 10a. Switching Time Test Circuit 2.0 VDS 90% 0.0 25 50 75 100 125 TC , Case Temperature ( C) 150 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 1 D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 0.01 PDM SINGLE PULSE (THERMAL RESPONSE) t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.001 0.00001 0.0001 0.001 0.01 0.1 1 10 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case www.irf.com 5 IRF740AS/LPbF EAS , Single Pulse Avalanche Energy (mJ) 1400 15V TOP 1200 DRIVER L VDS 1000 D.U.T RG + V - DD IAS 20V BOTTOM ID 4.5A 6.3A 10A 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A 800 600 400 200 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) I AS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG 10 V QGS QGD 580 Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50K 12V .2F .3F D.U.T. + V - DS 560 540 520 500 480 VGS 1.0 3mA 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 IAV , Avalanche Current ( A) IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit 6 V DSav , Avalanche Voltage ( V ) VG Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.irf.com IRF740AS/LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * * * * Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS www.irf.com 7 IRF740AS/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 3 0 S W IT H L O T CO D E 8 0 2 4 AS S E M B L E D O N W W 0 2 , 2 0 0 0 IN T H E AS S E M B L Y L IN E "L " IN T E R N AT IO N AL R E CT IF IE R L O GO N ote: "P " in as s em bly lin e po s i tion in dicates "L ead-F r ee" P AR T N U M B E R F 53 0 S AS S E M B L Y L O T CO D E D AT E CO D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L OR IN T E R N AT IO N AL R E C T IF IE R L OG O AS S E M B L Y L OT CO D E 8 P AR T N U M B E R F 530 S D AT E C O D E P = D E S IGN AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 WE E K 02 A = AS S E M B L Y S IT E C O D E www.irf.com IRF740AS/LPbF TO-262 Package Outline TO-262 Part Marking Information E XAMPLE : T HIS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T HE AS S E MB LY LINE "C" Note: "P" in as s embly line pos ition indicates "L ead-F ree" INT ER NAT IONAL RE CT IF IE R LOGO AS S E MB LY L OT CODE PAR T NUMB ER DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR INT E R NAT IONAL R E CT IF IE R LOGO AS S E MBL Y L OT CODE www.irf.com PAR T NUMB ER DAT E CODE P = DE S IGNAT E S L EAD-F R E E PR ODUCT (OPT IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE 9 IRF740AS/LPbF D2Pak Tape & Reel Infomation TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 1.65 (.065) 0.368 (.0145) 0.342 (.0135) 24.30 (.957) 23.90 (.941) 15.42 (.609) 15.22 (.601) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Notes: Repetitive rating; pulse width limited by Pulse width 300s; duty cycle 2%. Starting TJ = 25C, L = 12.6mH Coss eff. is a fixed capacitance that gives the same charging time ISD 10A, di/dt 330A/s, VDD V(BR)DSS, Uses IRF740A data and test conditions max. junction temperature. ( See fig. 11 ) RG = 25, IAS = 10A. (See Figure 12) TJ 150C as Coss while VDS is rising from 0 to 80% VDSS * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.07/04 10 www.irf.com