54FCT374
Octal D-Type Flip-Flop with TRI-STATE®Outputs
General Description
The ’FCT374 is an octal D-type flip-flop featuring separate
D-type inputs for each flip-flop and TRI-STATE outputs for
bus-oriented applications. A buffered Clock (CP) and Output
Enable (OE) are common to all flip-flops.
Features
nEdge-triggered D-type inputs
nBuffered positive edge-triggered clock
nTRI-STATE outputs for bus-oriented applications
nTTL input and output level compatible
nLow CMOS power consumption
nOutput sink capability of 32 mA, source capability of
12 mA
nStandard Microcircuit Drawing (SMD) 5962-9314901
Ordering Code
Military Package Package Description
Number
54FCT374DMQB J20A 20-Lead Ceramic Dual-In-Line
54FCT374FMQB W20A 20-Lead Cerpack
54FCT374LMQB E20A 20-Lead Ceramic Leadless Chip Carrier, Type C
Connection Diagrams
TRI-STATE®is a registered trademark of National Semiconductor Corporation.
Pin Assignment for DIP
and Flatpak
DS100964-1
Pin Assignment
for LCC
DS100964-2
September 1998
54FCT374 Octal D-Type Flip-Flop with TRI-STATE Outputs
© 1999 National Semiconductor Corporation DS100964 www.national.com
Pin Descriptions
Pin Description
Names
D
0
–D
7
Data Inputs
CP Clock Pulse Input (Active
Rising Edge)
OE TRI-STATE Output Enable
Input (Active LOW)
O
0
–O
7
TRI-STATE Outputs
Functional Description
The ’FCT374 consists of eight edge-triggered flip-flops with
individual D-type inputs and TRI-STATE true outputs. The
buffered clock and buffered Output Enable are common to all
flip-flops. The eight flip-flops will store the state of their indi-
vidual D inputs that meet the setup and hold time require-
ments on the LOW-to-HIGH Clock (CP) transition. With the
Output Enable (OE) LOW, the contents of the eight flip-flops
are available at the outputs. When OE is HIGH, the outputs
are in a high impedance state. Operation of the OE input
does not affect the state of the flip-flops.
Function Table
Inputs Internal Outputs Function
OE CP D Q O
H H L NC Z Hold
H H H NC Z Hold
H N L L Z Load
H N H H Z Load
L N L L L Data Available
L N H H H Data Available
L H L NC NC No Change in Data
L H H NC NC No Change in Data
H=HIGH Voltage Level
L=LOW Voltage Level
X=Immaterial
Z=High Impedance
N=LOW-to-HIGH Transition
NC =No Change
Logic Diagram
DS100964-3
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
54FCT374
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Storage Temperature −65˚C to +150˚C
Ambient Temperature under Bias −55˚C to +125˚C
Junction Temperature under Bias
Ceramic −55˚C to +175˚C
V
CC
Pin Potential to
Ground Pin −0.5V to +7.0V
Input Voltage −0.5V to +7.0V
Input Current −30 mA to +5.0 mA
Voltage Applied to Any Output
in the Disabled or
Power-Off State −0.5V to +5.5V
in the HIGH State −0.5V to V
CC
Current Applied to Output
in LOW State (Max) twice the rated I
OL
(mA)
Recommended Operating
Conditions
Free Air Ambient Temperature
Military −55˚C to +125˚C
Supply Voltage
Military +4.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under these
conditions is not implied.
DC Electrical Characteristics
Symbol Parameter FCT374 Units V
CC
Conditions
Min Max
V
IH
Input HIGH Voltage 2.0 V Recognized HIGH Signal
V
IL
Input LOW Voltage 0.8 V Recognized LOW Signal
V
CD
Input Clamp Diode Voltage −1.2 V Min I
IN
=−18 mA
V
OH
Output HIGH
Voltage 54FCT 4.3 V Min I
OH
=−300 µA
54FCT 2.4 V Min I
OH
=−12 mA
V
OL
Output LOW Voltage 54FCT 0.2 V Min I
OL
=300 µA
54FCT 0.5 V Min I
OL
= 32mA
I
IH
Input HIGH Current 5 µA Max V
IN
=2.7V (Note 3)
5V
IN
=V
CC
I
IL
Input LOW Current −5 µA Max V
IN
=0.5V (Note 3)
−5 V
IN
=0.0V
I
OZH
Output Leakage Current 10 µA 0 5.5V V
OUT
=2.7V; OE =2.0V
I
OZL
Output Leakage Current −10 µA 0 5.5V V
OUT
=0.5V; OE =2.0V
I
OS
Output Short-Circuit Current −60 mA Max V
OUT
=0.0V
I
CCQ
Power Supply Current 1.5 mA Max V
IN
= 0.2V or V
IN
= 5.3V, f
I
=
0MHz
I
CC
Power Supply Current 2.0 mA Max V
IN
= 3.4V
I
CCT
Additional
I
CC
/Input 6.0 mA Max V
I
=V
CC
2.1V or V
IN
= GND, f
CP
= 10MHz, Outputs open, OE =
GND, one bit toggling at f
I
= 5MHz,
50%duty cycle
5.5 mA Max V
I
=5.3V or V
CC
= 0.2V, f
CP
=
10MHz, Outputs open, OE = GND,
one bit toggling at f
I
= 5MHz, 50%
duty cycle
I
CCD
Dynamic I
CC
No Load 0.4 mA/
MHz Max Outputs Open, OE = GND, One bit
toggling, 50%duty cycle, V
IN
=
5.3V or V
IN
= 0.2V
Note 2: For 8-bit toggling, ICCD <0.8 mA/MHz.
Note 3: Guaranteed, but not tested.
54FCT374
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AC Electrical Characteristics
Symbol Parameter 54FCT Units
T
A
=−55˚C to +125˚C
V
CC
=4.5V to 5.5V
C
L
=50 pF
Min Max
t
PLH
Propagation Delay 2.0 11.0 ns
t
PHL
CP to O
n
2.0 11.0
t
PZH
Output Enable Time 1.5 14.0 ns
t
PZL
1.5 14.0
t
PHZ
Output Disable Time 1.5 8.0 ns
t
PLZ
1.5 8.0
AC Operating Requirements
54FCT
T
A
=−55˚C to +125˚C
Symbol Parameter V
CC
=4.5V to 5.5V Units
C
L
=50 pF
Min Max
t
s
(H) Setup Time, HIGH 2.5 ns
t
s
(L) or LOW D
n
to CP 2.5
t
h
(H) Hold Time, HIGH 2.5 ns
t
h
(L) or LOW D
n
to CP 2.5
t
w
(H) Pulse Width, CP 7.0 ns
t
w
(L) HIGH or LOW 7.0
Capacitance
Symbol Parameter Typ Units Conditions (T
A
=25˚C)
C
IN
Input Capacitance 5.0 pF V
CC
=0V
C
OUT
(Note 4) Output Capacitance 9.0 pF V
CC
=5.0V
Note 4: COUT is measured at frequency f =1 MHz, per MIL-STD-883B, Method 3012.
54FCT374
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Capacitance (Continued)
AC Loading
DS100964-4
*Includes jig and probe capacitance
FIGURE 1. Standard AC Test Load
DS100964-6
FIGURE 2. V
M
=1.5V
Input Pulse Requirements
Amplitude Rep. Rate t
w
t
r
t
f
3.0V 1 MHz 500 ns 2.5 ns 2.5 ns
FIGURE 3. Test Input Signal Requirements
DS100964-8
FIGURE 4. Propagation Delay Waveforms for
Inverting and Non-Inverting Functions
DS100964-5
FIGURE 5. Propagation Delay,
Pulse Width Waveforms
DS100964-7
FIGURE 6. TRI-STATE Output HIGH
and LOW Enable and Disable Times
DS100964-9
FIGURE 7. Setup Time, Hold Time
and Recovery Time Waveforms
54FCT374
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Physical Dimensions inches (millimeters) unless otherwise noted
20-Terminal Ceramic Chip Carrier (L)
NS Package Number E20A
20-Lead Ceramic Dual-In-Line (D)
NS Package Number J20A
54FCT374
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
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COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein:
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whose failure to perform when properly used in
accordance with instructions for use provided in the
labeling, can be reasonably expected to result in a
significant injury to the user.
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support device or system whose failure to perform
can be reasonably expected to cause the failure of
the life support device or system, or to affect its
safety or effectiveness.
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www.national.com
20-Lead Ceramic Flatpak (F)
NS Package Number W20A
54FCT374 Octal D-Type Flip-Flop with TRI-STATE Outputs
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.