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THCV235 / THCV236 Evaluation Kit
SerDes Single Link Evaluation Board
Parts Number: THEVA235, THEVA236
1. General Description
THEVA235 and THEVA236 boards are designed to
evaluate THCV235 and THCV236 for transmission
of Video data between the host and display.
One high-speed lane can carry up to 32bit data and
3bits of synchronizing signals at a pixel clock
frequency from 6MHz to 160MHz with converting
RGB444 to YCbCr422.
The chipset, which has one high-speed data lane,
can transmit video data up to 1080p/60Hz.
The maximum serial data rate is 4.00Gbps/lane.
2. Features
Color depth selectable:24/32bit
RGB YCbCr422 color space conversion
function
Wide frequency range
AC coupling for high-speed lanes
CDR requires no external frequency reference
Wide Range Supply Voltage from 1.7V to 3.6V
Additional SSCG on data stream
2-wire serial I/F bridge function(400kbps)
Remote side GPIO control and monitoring
Low Speed Data Bridge function
3. Overview
(a) THEVA235 (Top Side)
(b) THEVA236 (Top Side)
(c) THEVA235 (Bottom Side)
(d) THEVA236 (Bottom Side)
Figure 1 THEVA235 and THEVA236 View
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4. Power Supply Set Up
This chapter shows power supply condition.
Caution: Check if there is no power-GND short on below red trace before supplying any power.
VCC Power Supply to Each Board
Each evaluation board requires VCC power supply. Use CON1 and CON4 connector typically.
(a) THEVA235 (b) THEVA236
Figure 2 Power Supply for Evaluation Board
Power Supply from / to Connector
VCC power supply can be connected to each connector by using solder jumper.
THEVA235
W1: Connect the VCC power supply with pin#13 and 14 of CON2.
W2: Connect the VCC power supply with pin#1, 2 and 3 of Header1.
W3: Connect the VCC power supply with pin#18 and 19 of CON3.
(a)THEVA235 (Top Side) (b) THEVA235 (Bottom Side)
Figure 3 THEVA235 Power Supply from / to Each Connector
THEVA236
W4: Connect the VCC power supply with pin#1, 2 and 3 of Header17.
W5: Connect the VCC power supply with pin#13 and 14 of CON5
W6: Connect the VCC power supply with pin#18 and 19 of CON6.
(a)THEVA236 (Top Side) (b) THEVA236 (Bottom Side)
Figure 4 THEVA236 Power Supply from / to Each Connector
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5. CML Line Input / Output Connector Select
CML line input / output connector can be selected by using 0Ω resistors.
1mm Pitch Connector
Mount / unmount following 0Ω resistors to use 1mm pitch connector.
Table 1 Mount / unmount resistors for using 1mm pitch connector
Mount
Unmount
THEVA235
R9, R10, R11, R12,
R13, R14
R15, R16, R17, R18, R20, R21, R23, R24, R25,
R28, R31, R32
THEVA236
R74, R78, R81, R83,
R89, R91
R86, R94, R104, R105, R106, R107, R108, R109,
R114, R121, R124, R127
(a)THEVA235 (Top Side) (b)THEVA236 (Top Side)
Figure 5 Resistors Mounting for 1mm Pitch Connector
0.5mm Pitch Connector
Mount / unmount following 0Ω resistors to use 0.5mm pitch connector.
Table 2 Mount / unmount resistors for using 0.5mm pitch connector
Mount
THEVA235
R20, R21, R23, R24,
R28, R32
THEVA236
R105, R106, R108,
R109, R121, R124
(a)THEVA235 (Bottom Side) (b)THEVA236 (Bottom Side)
Figure 6 Resistors Mounting for 0.5mm Pitch Connector
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SMA connector
Mount / unmount following 0Ω resistors to use SMA connector.
*HTPDN and LOCKN signals dont have SMA connector input / output connection.
Table 3 Mount / unmount resistors for using SMA connector
Mount
Unmount
THEVA235
R17, R18, R23, R24, R25, R28,
R31, R32
R9, R10, R11, R12, R13, R14,
R15, R16, R20, R21
THEVA236
R104, R107, R108, R109, R114,
R121, R124, R127
R74, R78, R81, R83, R86, R89,
R91, R94, R105, R106
(a)THEVA235 (Bottom Side) (b)THEVA236 (Bottom Side)
Figure 7 Resistors Mounting for SMA Connector
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6. Function setting
Pin#2 of each 3HEADER is connected to ICs setting pin. Each setting pins high or low setting can set by
connecting pin#2 of 3HEADER and VCC or GND level. Setting pin is yellow area in Figure 9.
P3 and P6 of control pin use to control 2-wire serial I/F. P2 and P5 of control pin can select Pull-up or Open.
Control pin is red area in Figure 9.
(a)3HEADER Description (b)High Level Setting (c)Low Level Setting
Figure 8 High / Low Setting Description with 3HEADER
(a) THEVA235 (Top Side) (b) THEVA236 (Top Side)
Figure 9 Position of Function Setting pin and Control pin
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Header setting description
Table 4 THEVA235 Function Setting Description
Silk
Pin Name
Function
PDN1
PDN1
Sub-Link power down control
H: Normal Operation, L: Power Down
PDN0
PDN0
Main-Link power down control
H: Normal Operation, L: Power Down
COL1
COL1/SD0
Color Space Converter and Data Width Setting(*1)(*2)
When PDN1=H, this pin must be Open.
COL0
COL0/INT/GPIO2
Data Width Setting(*1)(*2)
When PDN1=H, this pin must be Open.
HFSEL
HFSEL/TCMN
High Frequency mode select(*1)
H: Enable, L: Disable
When PDN1=H, this pin must be Open.
LFSEL
LFSEL
Low Frequency mode select
H: Enable, L: Disable
MAINMODE
MAINMODE/TCMP
Main-Link Mode Setting(*1)
H: Sync Free Mode, L: V-by-One®HS Mode
When PDN1=H, this pin must be Open.
SUBMODE
HTPDN/SUBMODE
Sub-Link Mode Setting(*1)
H: Low Speed Data Bridge Mode, L: 2-wire serial I/F Mode
When PDN1=L, this pin must be Open. (*3)
MSSEL
LOCKN/MSSEL
Sub-Link Master/Slave Setting(*1)
H: Sub-Link Master side, L: Sub-Link Slave side
When PDN1=L, this pin must be Open.
SSEN
SSEN/GPIO0
Spread Spectrum Clock Setting(*1)
H: Enable, L: Disable
When PDN1=H, this pin must be Open.
PRE
PRE/SD1
Pre-Emphasis Level Select(*1)
H: Enable, L: Disable
When PDN1=H, this pin must be Open.
LAT/AIN1
LATEN/SD3/AIN1/GPIO4
Field BET Latch Select and Address Setting(*1) (*4)
When Sub-Link Field BET Mode and MSSEL=H, this pin must be
H.
When PDN1=H and MSSEL=H (Sub-Link Slave side), this pin
must be Open.
CML/AIN0
CMLDRV/SD2/AIN0/GPIO3
CML Output Drive Strength Select and Address Setting(*1) (*4)
H: Normal, L: Weak
When PDN1=H and MSSEL=H (Sub-Link Slave side), this pin
must be Open.
BET
BET/GPIO1
Field BET Entry(*1)
H: Field BET Entry, L: Normal Operation
When PDN1=H, this pin must be Open.
RF
RF/BETOUT
Input clock triggering edge select(*1)
H: Rising Edge, L: Falling Edge
When Sub-Link Field BET Mode, this pin must be Open.
(*1)A pin function changes by operation mode. Carry out appropriate transact. (THCV235_THCV236_Rev.1.00_E.pdf and up)
(*2)Data Width Setting refers to data sheet for details.
(*3)HTPDN connection is option. Refer to data sheet for details.
(*4)Address Setting for 2-wire serial I/F
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Table 5 THEVA236 Function Setting Description
Silk
Pin Name
Function
PDN1
PDN1
Sub-Link power down control
H: Normal Operation, L: Power Down
PDN0
PDN0
Main-Link power down control
H: Normal Operation, L: Power Down
COL1
COL1/SD0
Color Space Converter and Data Width Setting(*1)(*2)
When PDN1=H, this pin must be Open.
COL0
COL0/INT/GPIO2
Data Width Setting(*1)(*2)
When PDN1=H, this pin must be Open.
HFSEL
HFSEL/RCMN
High Frequency mode select(*1)
H: Enable, L: Disable
When PDN1=H, this pin must be Open.
LFSEL
LFSEL
Low Frequency mode select
H: Enable, L: Disable
MAINMODE
MAINMODE/RCMP
Main-Link Mode Setting(*1)
H: Sync Free Mode, L: V-by-One®HS Mode
When PDN1=H, this pin must be Open.
SUBMODE
HTPDN/SUBMODE
Sub-Link Mode Setting(*1)
H: Low Speed Data Bridge Mode, L: 2-wire serial I/F Mode
When PDN1=L, this pin must be Open.(*3)
MSSEL
LOCKN/MSSEL
Sub-Link Master/Slave Setting(*1)
H: Sub-Link Master side, L: Sub-Link Slave side
When PDN1=L, this pin must be Open.
OE
OE
Output Enable Control
H: LVCMOS output enable, L: LVCMOS output disable
LAT/AIN1
LATEN/SD3/AIN1/GPIO0
Field BET Latch Select and Address Setting(*1) (*4)
When Sub-Link Field BET Mode and MSSEL=H, this pin must be
H.
When PDN1=H and MSSEL=H (Sub-Link Slave side), this pin
must be Open.
TTL/AIN0
TTLDRV/SD2/AIN0/GPIO1
CML Output Drive Strength Select and Address Setting(*1) (*4)
H: Normal, L: Weak
When PDN1=H and MSSEL=H (Sub-Link Slave side), this pin
must be Open.
RXDEFSEL
RXDEFSEL
Internal Register Default Setting Select.
H: For THCV235, L: For THCV231
OUTSEL
OUTSEL/SD1
Permanent Clock Output Control(*1)
H: Enable, L: Disable
When PDN1=H, this pin must be Open.
BET
BET
Field BET Entry
H: Field BET Entry, L: Normal Operation
RF
RF/BETOUT
Input clock triggering edge select(*1)
H: Rising Edge, L: Falling Edge
When Sub-Link Field BET Mode, this pin must be Open.
(*1)A pin function changes by operation mode. Carry out appropriate control. (THCV235_THCV236_Rev.1.00_E.pdf and up)
(*2)Data Width Setting refers to data sheet for details.
(*3)HTPDN connection is option. Refer to data sheet for details.
(*4)Address Setting for 2-wire serial I/F
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Main-Link and Sub-Link are active
Mount(red line) / unmount(yellow line) following 0Ω resistors and capacitors to use Main-Link and Sub-Link.
Mount
Unmount
THEVA235
C9, C10, C13, C14
R5(*1), R6(*1), R15, R16
THEVA236
C30, C31, C33, C34, R68(*1), R69(*1)
R86, R94
(*1) For control MSSEL and SUBMODE
(a) THEVA235 (Top Side) (b) THEVA236 (Top Side)
Figure 10 Mounting resistors and capacitors when Main-Link and Sub-Link are active
If ICs pins are used as open-drain output, connect with pull-up resistors (e.g. 10kΩ) and connect P2 and P5 of
header.
Mount
Unmount
THEVA235
R27, R30, R34, R36, R38, R39, R41
R47, R48, R49, R50, R51, R52, R53
THEVA236
R111, R113, R116, R118, R120,
R123, R126
R128, R129, R130, R131, R132,
R133, R134
Furthermore, operational (yellow area) / disconnect (red area) following header.
(a) THEVA235 (Top Side) (b) THEVA236 (Top Side)
Figure 11 Operational / disconnect header when Main-Link and Sub-Link are active
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Only Main-Link is active
Mount(red line) / unmount(yellow line) following 0Ω resistors and capacitors to use only Main-Link.
Mount
Unmount
THEVA235
C9, C10, R5(*1), R6(*1), R15(*2), R16(*2)
C13, C14
THEVA236
C30, C31, R86(*2), R94(*2)
C33, C34, R68(*1), R69(*1)
(*1) For connect HTPDN and LOCKN.
(*2) Connect IC pin side, refer in below.
(a) THEVA235 (Top Side) (b) THEVA236 (Top Side) (c) THEVA236 (Bottom Side)
Figure 12 Mounting resistors and capacitors when only Main-Link is active
Furthermore, operational (yellow area) / disconnect (red area) following header.
(a) THEVA235 (Top Side) (b) THEVA236 (Top Side)
Figure 13 Operational / disconnect header when only Main-Link is active
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7. Clock Input from SMA Connector
THEVA235 can also choose the clock input from SMA connector by using 0Ω resistors. If you want to use SMA
connector for clock input, Mount the 0Ω resistors on R22 and unmount on R19. This input function is to use Field
BET operation in mainly.
THEVA235 (Top side)
Figure 14 Clock input from SMA connector
8. Status Indicate LED
The following show indicating status of each LED. (*1)
D1: VCC Power Supply Indicator for THEVA235
D2: LOCKN Status Indicator (*2)
D3: VCC Power Supply Indicator for THEVA236
(*1) When VCC is over 2.0V, LED indicator will be valid.
(*2) When only Main-Link is active, LOCKN indicator will be valid.
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9. LOCKN Sharing and HTPDN Omission
LOCKN Sharing
LOCKN connection can be shared with CML trace when only Main-Link is active. Mount 1kΩ resistors to share
the LOCKN signal, and unmount the 0Ω resistors shown in Figure 15.
(a) THEVA235 (Top Side) (b) THEVA236 (Top Side)
(c) THEVA235 (Bottom Side) (d) THEVA236 (Bottom Side)
Figure 15 LOCKN Sharing
HTPDN Signal Omission
HTPDN signal can be omitted by using 1kΩ resistor when only Main-Link is active. Mount 1kΩ resistor to pull
down the HTPDN signal at transmitter side, and unmount the 0Ω resistors shown in Figure 16. When the HTPDN
omission using, HTPDN output from receiver side is open connection.
(a)THEVA235 (Top Side) (b)THEVA236 (Top Side)
(c)THEVA235 (Bottom Side) (d)THEVA236 (Bottom Side)
Figure 16 HTPDN Omission
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10. Schematic
Figure 17 THEVA235 Schematic
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
Title
Number RevisionSize
A3
Date: 2015/06/18 Sheet of
File: X:\THCV235\THCV235.SchDoc Drawn By:
THEVA235
1.00
1 1
0.1uFC9
0.1uFC10
1
2
3
3HEAD(NC)
Header5
1
2
3
3HEAD(NC)
Header7
1
2
3
3HEAD(NC)
Header8
1
2
3
3HEAD(NC)
Header9
1
2
3
3HEAD(NC)
Header10
1
2
3
3HEAD(NC)
Header11
1
2
3
3HEAD(NC)
Header12
GND
SUBMODE MSSEL BETHFSEL
10kΩ
R2
1kΩ(NC)
R8
TXN_C
TXP_C
GND
52271-1469(NC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14 CON2
R12
GND
SMA103-T16(NC)
1
2
SMA1
SMA103-T16(NC)
1
2
SMA2
0.1uFC13
0.1uFC14
R2
R3
R4
R5
R6
R7
R8
R9
G2
G3
G4
G5
1
2
3
3HEAD(NC)
Header13
R13
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CN-FFC(0.5)19PD(NC)
CON3
0Ω(NC)R20
0Ω(NC)R21
0Ω(NC)R23
0Ω(NC)R24
TXN_C
TXP_C
0Ω(NC)R28
0Ω(NC)R32
TCMN_C
TCMP_C
SMA103-T16(NC)
1
2
SMA4
SMA103-T16(NC)
1
2
SMA5
TXN_A
TXP_A
TCMN_A
TCMP_A
TXN_A
TXP_A
TCMN_A
TCMP_A
Bottom Side
1
2
3
3HEAD(NC)
Header14
1
2
3
3HEAD(NC)
Header15
U1
SSM3K16FS
GND
150Ω
R4
GND
0Ω(NC)
R7
GND
0Ω(NC)
R17
0Ω(NC)
R18
0Ω(NC)
R25
0Ω(NC)
R31
Solder Jumper
W1
Solder Jumper
W3
VDD
PDN0 1
PDN1 2
LFSEL 3
TEST1 4
TEST2 5
RF/BETOUT 6
COL0/INT/GPIO2 7
COL1/SD0 8
PRE/SD1 9
CMLDRV/SD2/AIN0/GPIO3 10
LATEN/SD3/AIN1/GPIO4 11
D0 12
D1 13
D2 14
D3 15
VDD 16
D4
17
D5
18
D6
19
D7
20
D8
21
D9
22
D10
23
D11
24
VDD
25
CLKIN
26
D12
27
D13
28
D14
29
D15
30
D16
31
VDD
32
D17
33
D18
34
D19
35
D20
36
D21
37
D22
38
D23
39
AVDD
40
VDD
41
D24
42
D25
43
D26
44
D27
45
D28
46
D29
47
VSYNC
48
VDD 49
HSYNC 50
DE 51
D30 52
D31 53
SSEN/GPIO0 54
BET/GPIO1 55
CAPOUT 56
MAINMODE/TCMP 57
HFSEL/TCMN 58
TXP 59
TXN 60
CAPINA 61
CAPINP 62
LOCKN/MSSEL 63
HTPDN/SUBMODE 64
EXP GND 65
IC1
THCV235
B3
B4
B5
B6
B7
B8
B9
CONT1
CONT2
B0
B1
G0
G6
G7
G8
G9
B2
CLKIN
G1
R0
R1
VSYNC
DE
HSYNC
TXP
TXN
TCMN
TCMP
CAPINP
CAPINA
CAPOUT
0.1uFC15
0.1uFC11
GND
0.1uF C18
AVDD
0.1uF C17
VDD
1
2
SMA103-T16(NC)
SMA3
0Ω(NC)R22
CLKIN_CON R19 CLKIN
CLKIN_SMA
GND
1
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
30
29
28
27
26
25
24
23
22
21
40
39
38
37
36
35
34
33
32
31
48
47
46
45
44
43
42
41
PCN10-48P-2.54DSA(NC)
Header1
GND
R0
R1
R2
R3
G2
G3
B4
B5
B6
B7
B8
B9
HSYNC
VSYNC
DE
G9
R4
R5
R6
R7
R8
R9
G4
G5
G6
G7
G8
G0
G1
B0
B1
B2
B3
CONT1
CONT2
Solder Jumper
W2
LATEN/AIN1
CMLDRV/AIN0
PRE
COL0
COL1
RF/BETOUT
TEST2
TEST1
LFSEL
PDN1
PDN0
GND
0.1uFC7
0.1uFC8
HTPDN/SUBMODE
LOCKN/MSSEL
0.1uF
C6
LOCKN
HTPDN
TCMN_C
TCMP_C
R9
R10
R11
R14
LOCKN
HTPDN
TXN_C
TXP_C
TCMN_C
TCMP_C
VDD VDD
0Ω(NC)R15
0Ω(NC)R16 GND
HFSEL
MAINMODE
0Ω(NC)
R5
SUBMODE
HTPDN
0Ω(NC)
R6
MSSEL
VDD
10kΩ
R3
LOCKN
MAINMODE
1
2
3
3HEAD(NC)
Header6
BET
SSEN
SSEN
RF/BETOUT
RF
BETOUT
TP1
COL1 COL0 CMLDRV/AIN0LATEN/AIN1 PRE
1
2
3
3HEAD(NC)
Header16
RF
1
2
3
3HEAD(NC)
Header2
GND
PDN1 PDN0
VDD
1
2
3
3HEAD(NC)
Header3
1
2
3
3HEAD(NC)
Header4
LFSEL
TEST2
TEST1
0Ω(NC)
R45
R46
0Ω(NC)
R43
R44
GND
VDD
GND
CMLDRV/AIN0
COL0
R35
R42
R37
R40
10kΩ(NC)R41
10kΩ(NC)R39
10kΩ(NC)R38
10kΩ(NC)R36
10kΩ(NC)R49
10kΩ(NC)R50
CMN_PULLUP
GND
SD2/GPIO3_H
INT/GPIO2_H
COL1
PRE
R33
SSEN
BET
LATEN/AIN1
GPIO0_H
GPIO1_H
SD3/GPIO4_H
SD2/GPIO3_S
INT/GPIO2_S
GPIO0_S
GPIO1_S
SD3/GPIO4_S
10kΩ(NC)R51
10kΩ(NC)R34
10kΩ(NC)R52
10kΩ(NC)R53
SD0_H
SD1_H
R26
R29 1
2
3
4
5
6
7
8
9
10
11
12
13
14
P2
Header 7X2A(NC)
10kΩ(NC)R30
10kΩ(NC)R27
SD0_S
SD1_S
I2C_PULLUP
10kΩ(NC)R48
10kΩ(NC)R47
282836-2(NC)
1
2GND
VCC
CON1
10uF
C4
GND
VCC
SML-310MT
D1
150Ω
R1
GND
VDD
MPZ1608R471A
L4
Inductor
MPZ1608R471A
L1 Inductor
10uF
C1
GND
AVDD
CMN_PULLUP
10uF
C5
GND
MPZ1608R471A
L2 Inductor
I2C_PULLUP
10uF
C2
GND
MPZ1608R471A
L3 Inductor
10uF
C3
GND
1
2
P1
Header 2(NC)
GND
CLKIN_CON
VCC VCC VCC
VCC
VCC
VCC
VCC
SML-310MT
D2
0.1uFC16
10uFC12
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
P3
Header 7X2A(NC)
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Figure 18 THEVA236 Schematic
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
D D
C C
B B
A A
Title
Number RevisionSize
A3
Date: 2015/06/18 Sheet of
File: X:\THCV235\THCV236.SchDoc Drawn By:
THEVA236
1.00
1 1
0.1uF
C26
1
2
3
3HEAD(NC)
Header22
1
2
3
3HEAD(NC)
Header23
1
2
3
3HEAD(NC)
Header24
1
2
3
3HEAD(NC)
Header25
1
2
3
3HEAD(NC)
Header26
1
2
3
3HEAD(NC)
Header27
1
2
3
3HEAD(NC)
Header28
1
2
3
3HEAD(NC)
Header29
GND
MAINMODE HFSEL LFSEL RF COL1 COL0 OUTSEL TTLDRV/AIN0
0Ω(NC)R74
GND
52271-1469(NC)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
CON5
0Ω(NC)R78
R81
R83
GND
SMA103-T16(NC)
1
2
SMA6
GND
SMA103-T16(NC)
1
2
SMA7
1
2
3
3HEAD(NC)
Header30
LATEN/AIN1
RXN_C
RXP_C
R89
R91
RCMN_C
RCMP_C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
CN-FFC(0.5)19PD(NC)
CON6
HTPDN
LOCKN
0Ω(NC)R105
0Ω(NC)R106
0Ω(NC)R108
0Ω(NC)R109
RXN_C
RXP_C
0Ω(NC)R121
0Ω(NC)R124
RCMN_C
RCMP_C
HTPDN
LOCKN
SMA103-T16(NC)
1
2
SMA8
SMA103-T16(NC)
1
2
SMA9
RCMN_A
RCMP_A
RXN_A
RXP_A
RCMN_A
RCMP_A
1
2
3
3HEAD(NC)
Header31
SUBMODE
1
2
3
3HEAD(NC)
Header32
MSSEL
0Ω(NC)R104
0Ω(NC)R107
0Ω(NC)R114
0Ω(NC)R127
Solder Jumper
W5
Solder Jumper
W6
RXN_A
RXP_A
PCN10-48P-2.54DSA(NC)
1
20
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
30
29
28
27
26
25
24
23
22
21
40
39
38
37
36
35
34
33
32
31
48
47
46
45
44
43
42
41
Header17
R0_C
R1_C
R2_C
R3_C
G2_C
G3_C
VSYNC_C
DE_C
G9_C
R4_C
R5_C
R6_C
R7_C
R8_C
R9_C
G4_C
G5_C
G6_C
G7_C
G8_C
CLKOUT_C
G0_C
G1_C
CONT2_C
B4_C
B5_C
B6_C
B7_C
B8_C
B9_C
HSYNC_C
B0_C
B1_C
B2_C
B3_C
CONT1_C
GND
Solder Jumper
W4
PDN0
1
PDN1
2
LFSEL
3
TEST1
4
TEST2
5
RF/BETOUT
6
COL0/INT/GPIO2
7
COL1/SD0
8
OUTSEL/SD1
9
TTLDRV/SD2/AIN0/GPIO1
10
LATEN/SD3/AIN1/GPIO0
11
D31
12
D30
13
D29
14
D28
15
VDD
16
D27 17
D26 18
D25/GPIO4 19
D24/GPIO3 20
D23 21
D22 22
D21 23
D20 24
VDD 25
CLKOUT 26
D19 27
D18 28
D17 29
D16 30
D15 31
VDD 32
D14 33
D13 34
D12 35
D11 36
D10 37
D9 38
D8 39
AVDD 40
VDD 41
D7 42
D6 43
D5 44
D4 45
D3 46
D2 47
VSYNC 48
VDD
49
HSYNC
50
DE
51
D1
52
D0
53
HTPDN/SUBMODE
54
LOCKN/MSSEL
55
CAPOUT
56
RXN
57
RXP
58
CAPINA
59
MAINMODE/RCMN
60
HFSEL/RCMP
61
RXDEFSEL
62
OE
63
BET
64
EXP GND
65
IC2
THCV236
R6
R7
R8
R9
CLKOUT
Bottom Side
R2
R3
R4
R5
LATEN/AIN1
TTLDRV/AIN0
COL0
COL1
RF/BETOUT
TEST2
TEST1
LFSEL
PDN1
PDN0
B3
B4
B5
B6
B7
B8
B9
CONT1
CONT2
B0
B1
G0
G1
VSYNC
G2
G3
G4
G5
G6
G7
G8
G9
B2
R0
R1
DE
HSYNC
VDD
0.1uF
C24
AVDD
OUTSEL
0.1uF
C35
VDD
0.1uF
C32
GND
0.1uF
C27
0.1uF
C28
GND
0.1uF
C30
0.1uF
C31
0.1uF
C33
0.1uF
C34
0Ω(NC)R86 MAINMODE
0Ω(NC)R94 HFSEL
RXDEFSEL
OE
BET
GND
RXN_C
RXP_C
RCMN_C
RCMP_C
RXN
RXP
R68
HTPDN
LOCKN
R69
SUBMODE
MSSEL
1kΩ(NC)
R75
GND
R0
R2
G2
VSYNC
R4
R6
R8
G4
G6
G8
G0
CONT2
B4
B5
B6
B7
B8
B9
HSYNC
B0
B1
B2
B3
CONT1
R1
R3
R5
R7
R9
G3
G9
G7
G1
10ΩR55
10ΩR56
10ΩR57
10ΩR58
10ΩR59
10ΩR60
10ΩR61
10ΩR62
10ΩR63
10ΩR64
10ΩR65
10ΩR66
10ΩR67
10ΩR70
10ΩR71
10ΩR76
10ΩR79
10ΩR80
10ΩR82
10ΩR84
10ΩR85
10ΩR87
10ΩR88
10ΩR90
10ΩR92
10ΩR93
10ΩR95
10ΩR96
10ΩR97
10ΩR98
10ΩR99
10ΩR101
10ΩR102
CLKOUT 10ΩR103
R0_C
R2_C
G2_C
VSYNC_C
R4_C
R6_C
R8_C
G4_C
G6_C
G8_C
G0_C
CONT2_C
B4_C
B5_C
B6_C
B7_C
B8_C
B9_C
HSYNC_C
B0_C
B1_C
B2_C
B3_C
CONT1_C
R1_C
R3_C
R5_C
R7_C
R9_C
G3_C
G9_C
G7_C
G1_C
CLKOUT_C
RF/BETOUT
RF
BETOUT
TP2
1
2
3
3HEAD(NC)
Header18
1
2
3
3HEAD(NC)
Header19
GND
PDN0
COL0
R117
R119
10kΩ(NC)R120
10kΩ(NC)R118
10kΩ(NC)R130
10kΩ(NC)R131
CMN_PULLUP
GND
INT/GPIO2_H
R115
LATEN/AIN1
TTLDRV/AIN0
GPIO0_H
GPIO1_H
INT/GPIO2_S
GPIO0_S
GPIO1_S
10kΩ(NC)R132
10kΩ(NC)R116
TEST2
TEST1
0Ω(NC)
R137
R138
0Ω(NC)
R135
R136
GND
VDD
R110
R112
R125
R122
1
2
3
4
5
6
7
8
9
10
11
12
13
14
P5
Header 7X2A(NC)
OUTSEL SD1_H
COL1 SD0_H
SD1_S
SD0_S
10kΩ(NC)R111
10kΩ(NC)R113
10kΩ(NC)R123
10kΩ(NC)R126
10kΩ(NC)R129
10kΩ(NC)R128
CONT2
CONT1
GPIO4_H
GPIO3_H
GPIO4_S
GPIO3_S
I2C_PULLUP
10kΩ(NC)R133
10kΩ(NC)R134
282836-2(NC)
1
2GND
VCC
CON4
10uF
C22
GND
SML-310MT
D3
150Ω
R54
GND
VDD
MPZ1608R471A
L5 Inductor
10uF
C19
GND
AVDD
CMN_PULLUP
10uF
C23
GND
MPZ1608R471A
L6 Inductor
I2C_PULLUP
10uF
C20
GND
MPZ1608R471A
L7 Inductor
10uF
C21
GND
1
2
P4
Header 2(NC)
GND
1
2
3
3HEAD(NC)
Header33
RXDEFSEL
1
2
3
3HEAD(NC)
Header20
1
2
3
3HEAD(NC)
Header21
BET
OE
PDN1
VCC VCC
VCC VCC
VCC
VCC
VCC
VCC
VCC
VCC
10uF
C29
L8
Inductor1005
0.1uF
C25
R200
10ΩR72
10ΩR100
10Ω(NC)R231A 0Ω(NC)R231B
G5
DE
G5_C
DE_C
1
2
3
4
5
6
7
8
9
10
11
12
13
14
P6
Header 7X2A(NC)
GND
THEVA235_THEVA236_UsersGuide_Rev.1.10_E
14/16
Copyright(C) 2018 THine Electronics, Inc.
THine Electronics, Inc.
Security E
11. Bills of Materials Table 6 THEVA235 BOM
Table 7 THEVA236 BOM
Type Value / Part No. Package Spec
Reference No. Quantity Note
Capacitor 10uF 2012 16V
C1, C2, C3, C4, C5, C12 6 -
Capacitor 0.1uF 1005 16V
C6, C7, C8, C9, C10, C11, C13, C14, C15, C16, C17, C18 12 -
Connector 282836-2(NC) 5mm pitch 2pin
CON1 1 -
Connector 52271-1469(NC) 1mm pitch 14pin
CON2 1 -
Connector CN-FFC(0.5)19PD(NC) 0.5mm pitch 12pin
CON3 1 -
Connector PCN10-48P-2.54DSA(NC) 2.54mm pitch 48pin
Header1 1 -
Connector SMA103-T16(NC) 1.6mm PCB End Jack
SMA1, SMA2, SMA3, SMA4, SMA5 5 -
Header Header, 3X1 2.54mm pitch -
Header2, Header3, Header4, Header5, Header6, Header7, Header8,
Header9, Header10, Header11, Header12, Header13, Header14,
Header15, Header16
15 -
Header Header, 2X1 2.54mm pitch -
P1 1-
Header Header, 7X2 2.54mm pitch -
P2, P3 2 -
IC THCV235 QFN64 -
IC1 1 -
IC SSM3K16FS SSM RON15Ω
U1 1-
Inductor MPZ1608R471A 1608 1.2A
L1, L2, L3, L4 4 -
LED SML-310MT 1608 Green
D1, D2 2 -
Resistor 150Ω 1005 0.1W
R1, R4 2 -
Resistor 10kΩ 1005 0.1W
R2, R3 2 -
Resistor 0Ω(NC) 1005 1A
R5, R6, R7, R15, R16, R17, R18, R20, R21, R22, R23, R24, R25,
R28, R31, R32, R43, R45
18 -
Resistor 1kΩ(NC) 1005 0.1W
R8 1-
Resistor 1005 1A
R9, R10, R11, R12, R13, R14, R19, R26, R29, R33, R35, R37, R40,
R42, R44, R46
16 -
Resistor 10kΩ(NC) 1005 0.1W
R27, R30, R34, R36, R38, R39, R41, R47, R48, R49, R50, R51, R52,
R53
14 -
Type Value / Part No. Package Spec Reference No. Quantity Note
Capacitor 10uF 2012 16V
C19, C20, C21, C22, C23, C29 6 -
Capacitor 0.1uF 1005 16V
C24, C25, C26, C27, C28, C30, C31, C32, C33, C34, C35 11 -
Connector 282836-2(NC) 5mm pitch 2pin
CON4 1 -
Connector 52271-1469(NC) 1mm pitch 14pin
CON5 1 -
Connector CN-FFC(0.5)19PD(NC) 0.5mm pitch 12pin
CON6 1 -
Connector PCN10-48P-2.54DSA(NC) 2.54mm pitch 48pin
Header17 1 -
Connector SMA103-T16(NC) 1.6mm PCB End Jack
SMA6, SMA7, SMA8, SMA9 4 -
Header Header, 3X1 2.54mm pitch -
Header18, Header19, Header20, Header21, Header22, Header23,
Header24, Header25, Header26, Header27, Header28, Header29,
Header30, Header31, Header32, Header33
16 -
Header Header, 2X1 2.54mm pitch -
P4 1-
Header Header, 7X2 2.54mm pitch -
P5, P6 2 -
IC THCV236 QFN64 -
IC2 1 -
Inductor MPZ1608R471A 1608 1.2A
L5, L6, L7 3 -
Inductor MPZ1005S331ET000 1005 700mA
L8 1-
LED SML-310MT 1608 Green
D3 1-
Resistor 150Ω 1005 0.1W
R54 1 -
Resistor 10Ω 1005 0.1W
R55, R56, R57, R58, R59, R60, R61, R62, R63, R64, R65, R66, R67,
R70, R71, R72, R76, R79, R80, R82, R84, R85, R87, R88, R90, R92,
R93, R95, R96, R97, R98, R99, R100, R101, R102, R103
36 -
Resistor 1005 1A
R68, R69, R81, R83, R89, R91, R110, R112, R115, R117, R119,
R122, R125, R136, R138
15 -
Resistor 0Ω(NC) 1005 1A
R74, R78, R86, R94, R104, R105, R106, R107, R108, R109, R114,
R121, R124, R127, R135, R137, R231B
17 -
Resistor 1kΩ(NC) 1005 0.1W
R75 1 -
Resistor 10kΩ(NC) 1005 1A
R111, R113, R116, R118, R120, R123, R126, R128, R129, R130,
R131, R132, R133, R134
14 -
Resistor 1608 0.1W
R200 1 -
Resistor 10Ω(NC) 1005 0.1W
R231A 1 -
THEVA235_THEVA236_UsersGuide_Rev.1.10_E
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Copyright(C) 2018 THine Electronics, Inc.
THine Electronics, Inc.
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12. Set Items
Table 8 Set Items
TYPE
Part No.
DC Connector
282836-2
FFC Connector for V-by-One®HS Link
52271-1469
FFC 14pin 1mm pitch for V-by-One®HS Link
98267-0299
Pin Header
-
Its possible to mount these parts on this board and use.
THEVA235_THEVA236_UsersGuide_Rev.1.10_E
16/16
Copyright(C) 2018 THine Electronics, Inc.
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13. Notices and Requests
Please kindly read, understand and accept this “Notices and Requests” before using this product.
For the Material:
1. The product specifications described in this material are subject to change without prior notice.
2. The circuit diagrams described in this material are examples of the application which may not always apply to
design of respective customers. THine Electronics, Inc. (“THine”) is not responsible for possible errors and
omissions in this material. Please note even if the errors or omissions should be found in this material, THine
may not be able to correct them immediately.
3. This material contains THine’s copyright, know-how or other proprietary. Copying or disclosing of the contents
of this material to any third party without THine’s prior permission is strictly prohibited.
For the Product:
1. This product is solely designed for evaluation purpose, and other purposes including mass production and
distribution are not intended.
2. This product has been solely manufactured for electric design engineers but not for end-users.
3. This product is not radiation-tolerant product.
4. This product is presumed to be used for general electric device, not for applications which require extremely
high-reliability/safety (including medical device concerned with critical care, aerospace device, or nuclear
power control device). Also, when using this product for any device concerned with control and/or safety of
transportation means, traffic signal device, or other various types of safety device, such use must be after
applying appropriate measures to the product.
5. This product has been designed with the utmost care to accomplish the purpose of evaluation of IC products
manufactured by THine Electronics, Inc. (“THine”); however, THine MAKES NO WARRANTIES OR
REPRESENTATIONS WITH REGARD TO ANY PERFORMANCE OR FUNCTION OF THIS PRODUCT
IN ANY CIRCUMSTANCES.
6. This product has been manufactured with the utmost care in quality control and product reliability; however,
there may be faults or defects with a low but fixed probability, as inevitable phenomenon concerned with
semiconductor manufacturing processes. Therefore, customers are encouraged to have sufficiently redundant or
error-preventive design applied to the use of the product so as not to have THine’s product cause any social or
public damage. Neither replacement nor failure analysis of the product is available in any case of defects with
the product and/or the product’s components.
7. Customers are asked, if required, to judge by themselves on whether this product falls under the category of
strategic goods under the Foreign Exchange and Foreign Trade Act.
8. Please Note that even if infringement of any third party’s industrial ownership should occur by using this
product, THine will be exempted from any responsibility unless it directly relates to the production process or
functions of the product.
9. Developing, designing and manufacturing of customers’ own products, equipment or system by using of this
product is strictly prohibited in any way.
THine Electronics, Inc.
sales@thine.co.jp
https://www.thine.co.jp