19-5131; Rev 2; 7/15
General Description
The MAX14840E/MAX14841E are +3.3V ESD-protected
transceivers intended for half-duplex RS-485 communica-
tion up to 40Mbps. These transceivers are optimized for
high speeds over extended cable runs while maximizing
tolerance to noise.
The MAX14840E features symmetrical fail-safe and larg-
er receiver hysteresis, providing improved noise rejection
and improved recovered signals in high-speed and long
cable applications. The MAX14841E has true fail-safe
receiver inputs guaranteeing a logic-high receiver output
when inputs are shorted or open.
The MAX14840E/MAX14841E are available in 8-pin SO
and small, 8-pin (3mm x 3mm) TDFN-EP packages. Both
devices operate over the -40NC to +125NC temperature
range.
Applications
●Motion Controllers
●Fieldbus Networks
●Industrial Control Systems
●Backplane Buses
●HVAC Networks
Benets and Features
●High ESD Protection Provides Increases Equipment
Uptime
• ±35kV Human Body Model (HBM) per JEDEC
JS-001-2012
• ±20kV Air Gap Discharge per IEC 61000-4-2
• ±12kV Contact Discharge per IEC 61000-4-2
●Integrated Features Increases Robustness
• Large 170mV Receiver Hysteresis (MAX14840) for
High Receiver Noise Tolerance
• True Fail Safe Receiver Input (MAX14841E) Keeps
Receiver Output Logic-High Upon Shorts and
Open On Receiver Input
• Thermal Self-Protection Shutdown at 160°C
Junction Temperature
• High Industrial -40°C to +125°C Ambient Operating
Temperature Range/-40°C to +150°C Junction
Temperature Range
• Hot Swap Capability Eliminates False Transition
During Power-Up or Hot Insertion
●Low Current Reduces Power Requirements
• 10µA (max) Shutdown Current
• 1.5mA (typ) Supply Current
• 3.3V Supply Voltage
●Available in Industry Standard 8-Pin SO or
Space-Saving 8-Pin TDFN-EP (3mm x 3mm) Packages
Functional Diagram
RO
DI
A
B
DE
GND
VCC
R
D
RE
SHUTDOWN
MAX14840E
MAX14841E
Ordering Information/Selector Guide appears at end of data
sheet.
MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
(Voltages referenced to GND.)
VCC ..................................................................... -0.3V to +6.0V
RE, RO .................................................. -0.3V to +(VCC + 0.3V)
DE, DI .................................................................. -0.3V to +6.0V
A, B .................................................................... -8.0V to +13.0V
Short-Circuit Duration (RO, A, B) to GND ............... Continuous
Continuous Power Dissipation (TA = +70NC)
8-Pin SO (derate 7.6mW/NC above +70NC) ............... 606mW
8-Pin TDFN (derate 24.4mW/NC above +70NC) ....... 1951mW
Junction-to-Case Thermal Resistance (BJC) (Note 1)
8-Pin SO .......................................................................38NC/W
8-Pin TDFN ....................................................................8NC/W
Junction-to-Ambient Thermal Resistance (BJA) (Note 1)
8-Pin SO .................................................................... 132NC/W
8-Pin TDFN ..................................................................41NC/W
Operating Temperature Range (Note 2) ........ -40NC to +125NC
Junction Temperature .................................................. +150NC
Storage Temperature Range ......................... -65NC to +150NC
Lead Temperature (soldering, 10s) ...............................+300NC
Soldering Temperature (reflow) ......................................+260NC
DC Electrical Characteristics
(VCC = +3.0V to +3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Notes 3, 4)
Absolute Maximum Ratings
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Note 2: Operation is specified with junction temperatures up to +150°C.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
POWER SUPPLY
Supply Voltage VCC 3.0 3.6 V
Supply Current ICC
DE = RE = VCC, or
DE = RE = GND, or
DE = VCC, RE = GND,
DI = VCC or GND, no load
1.5 4 mA
Shutdown Supply Current ISH DE = GND and RE = VCC 10 FA
DRIVER
Differential Driver Output VOD RL = 54I, Figure 1 1.5 V
Change in Magnitude of
Differential Output Voltage DVOD RL = 54I, Figure 1 (Note 5) -0.2 0 +0.2 V
Driver Common-Mode Output
Voltage VOC RL = 54I, Figure 1 VCC/2 3 V
Change in Common-Mode
Voltage DV
OC RL = 54I, Figure 1 (Note 5) -0.2 0.2 V
Single-Ended Driver Output High VOH A/B output, IOUT = -20mA 2.2 V
Single-Ended Driver Output Low VOL A/B output, IOUT = 20mA 0.8 V
Driver Short-Circuit Output
Current |IOSD|0V P VOUT P +12V, output low 250 mA
-7V P VOUT P VCC, output high 250
RECEIVER
Input Current (A and B) IA,B DE = GND,
VCC = GND or +3.6V
VIN = +12V 1000 FA
VIN = -7V -800
Differential Input Capacitance CA,B Between A and B, DE = GND, f = 2MHz 12 pF
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
DC Electrical Characteristics (continued)
(VCC = +3.0V to +3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Notes 3, 4)
Switching Characteristics
(VCC = +3.0V to +3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Notes 2, 3)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Receiver Differential Threshold
Voltage (MAX14840E Only)
VTHF -7V P VCM P 12V, VOD falling -200 -10 mV
VTHR -7V P VCM P 12V, VOD rising 10 200 mV
Receiver Input Hysteresis
(MAX14840E Only) VCM = 0V 20 170 mV
Receiver Differential Threshold
Voltage (MAX14841E Only) VTH -7V P VCM P 12V -200 -105 -10 mV
Receiver Input Hysteresis
(MAX14841E Only) DVTH VCM = 0V 10 mV
LOGIC INTERFACE
Input High Voltage VIH
DE, DI 2.0 5.5 V
RE 2.0
Input Low Voltage VIL DE, DI, RE 0.8 V
Input Hysteresis VHYS DE, DI, RE 50 mV
Input Current IIN DE, DI, RE -1 +1 FA
Input Impedance on First
Transition DE, RE 1 10 kI
Output High Voltage VOH RE = GND, IO = -1mA, VA - VB > 200mV VCC -
1.5 V
Output Low Voltage VOL RE = GND, IO = 1mA, VA - VB < -200mV 0.4 V
Three-State Output Current at
Receiver IOZR RE = VCC, 0V P VO P VCC -1 +1 FA
Receiver Output Short-Circuit
Current IOSR 0V P VRO P VCC -95 +95 mA
PROTECTION
Thermal-Shutdown Threshold TTS 160 NC
Thermal-Shutdown Hysteresis TTSH 15 NC
ESD Protection: A, B to GND
IEC 61000-4-2 Air Gap Discharge Q20
kVIEC 61000-4-2 Contact Discharge Q12
HBM Q35
ESD Protection: All Other Pins HBM Q2 kV
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DRIVER
Propagation Delay tDPLH RL = 54I, CL = 50pF, Figures 2 and 3
(Note 6)
5 12 20 ns
tDPHL 5 12 20
Differential Driver Output Skew
|tDPLH - tDPHL|tDSKEW RL = 54I, CL = 50pF, Figures 2 and 3
(Notes 6, 9) 2 ns
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Switching Characteristics (continued)
(VCC = +3.0V to +3.6V, TA = -40NC to +125NC, unless otherwise noted. Typical values are at VCC = +3.3V and TA = +25NC.) (Notes 3, 4)
Note 3: All devices are 100% production tested at TA = +25NC. Specifications for all temperature limits are guaranteed by design.
Note 4: All currents into the device are positive; all currents out of the device are negative. All voltages are referenced to device
ground, unless otherwise noted.
Note 5: DV
OD and DVOC are the changes in VOD and VOC, respectively, when the DI input changes state.
Note 6: Capacitive load includes test probe and fixture capacitance.
Note 7: The timing parameter refers to the driver or receiver enable delay when the device has exited the initial hot-swap protect
state and is in normal operating mode.
Note 8: Shutdown is enabled by driving RE high and DE low. The device is guaranteed to have entered shutdown after tSHDN has
elapsed.
Note 9: Parameter is guaranteed by characterization and not production tested.
Driver Differential Output Rise or
Fall Time tHL, tLH RL = 54I, CL = 50pF, Figures 2 and 3
(Notes 6, 9) 7.5 ns
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Maximum Data Rate DRMAX 40 Mbps
Driver Enable to Output High tDZH RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7) 30 ns
Driver Enable to Output Low tDZL RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7) 30 ns
Driver Disable Time from Low tDLZ RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7) 30 ns
Driver Disable Time from High tDHZ RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 5, 6) 30 ns
Driver Enable from Shutdown to
Output Low tDZL(SHDN) RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7) 4Fs
Driver Enable from Shutdown to
Output High tDZH(SHDN) RL = 110I, CL = 50pF, Figures 4 and 5
(Notes 6, 7) 4Fs
Time to Shutdown tSHDN (Note 8) 50 800 ns
RECEIVER
Propagation Delay tRPLH CL = 15pF, Figures 6 and 7 (Note 6) 25 ns
tRPHL 25
Receiver Output Skew tRSKEW CL = 15pF, Figures 6 and 7 (Notes 6, 9) 2 ns
Maximum Data Rate DRMAX 40 Mbps
Receiver Enable to Output High tRZH RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7) 20 ns
Receiver Enable to Output Low tRZL RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7) 20 ns
Receiver Disable Time from Low tRLZ RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7) 20 ns
Receiver Disable Time from High tRHZ RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7) 20 ns
Receiver Enable from Shutdown
to Output Low tRZL(SHDN) RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7) 4 Fs
Receiver Enable from Shutdown
to Output High tRZH(SHDN) RL = 1kI, CL = 15pF, Figure 8 (Notes 6, 7) 4 Fs
Time to Shutdown tSHDN (Note 8) 50 800 ns
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Test and Timing Diagrams
Figure 1. Driver DC Test Load Figure 2. Driver Timing Test Circuit
Figure 3. Driver Propagation Delays
Figure 4. Driver Enable and Disable Times (tDZH, tDHZ)
VOD
A
B
VOC
RL
2
RL
2
RLCL
VOD
VCC
DI
DE
A
B
1.5V 1.5V
tDPHL
tDPLH
VOD
0
B
A
10%
90%
10%
90%
0
-VO
VOD
tDSKEW = tDPLH - tDPHL
VOD = [VA - VB]
VCC
VO
f = 1MHz, tLH = 3ns, tHL = 3ns
tLH tHL
0
0
0.25V
1.5V
tDZH, tDZH(SHDN)
tDHZ
DE
VCC
VOH
1.5V
OUT
RL = 110I
50I
OUT
S1
A
B
D
DI
GND OR VCC
GENERATOR
DE
CL
50pF
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Test and Timing Diagrams (continued)
Figure 5. Driver Enable and Disable Times (tDLZ, tDZL )
Figure 6. Receiver Propagation Delay Test Circuit
Figure 7. Receiver Propagation Delays
RL = 110I
50I
OUT
0
0.25V
1.5V
tDZL, tDZL(SHDN)
tDLZ
DE
S1
A
B
D
DI
0 OR VCC
VCC
VCC
1.5V
VCC
OUT
VOL
GENERATOR
DE
VID
B
A
RECEIVER
OUTPUT
ATE R
A
B
VOH
VOL
RO
tRPHL
tRSKEW = tRPHL - tRPLH
f = 1MHz, tLH P 3ns, tHL P 3ns
tRPLH
-1V
1V
2
VCC
2
VCC
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Test and Timing Diagrams (continued)
Figure 8. Receiver Enable and Disable Times
GENERATOR 50I
R
1kI
CL
15pF
R
-1.5V
+1.5V
RO
S1 VCC
S2
S3
VID
RE
RE
RO
RE
RO
RE
RE
RO
RO
0
tRHZ tRLZ
0.25V
0.25V
1.5V 1.5V
0 0
2
S1 OPEN
S2 CLOSED
S3 = +1.5V
S1 OPEN
S2 CLOSED
S3 = +1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
S1 CLOSED
S2 OPEN
S3 = -1.5V
VOH
0
0
VOH
VCC
VCC
VCC
1.5V1.5V
VCC
tRZL, tRZL(SHDN)
VOL
0
VCC
VCC
VCC
VOL
tRZH, tRZH(SHDN)
2
VCC
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Typical Operating Characteristics
(VCC = +3.3V, TA = +25NC, unless otherwise noted.)
DRIVER OUTPUT CURRENT
vs. OUTPUT LOW VOLTAGE
MAX14840E toc09
OUTPUT LOW VOLTAGE (V)
OUTPUT CURRENT (mA)
108642
20
40
60
80
100
120
140
0
01
2
DRIVER OUTPUT CURRENT
vs. OUTPUT HIGH VOLTAGE
MAX14840E toc08
OUTPUT HIGH VOLTAGE (V)
OUTPUT CURRENT (mA)
31-1-3-5
20
40
60
80
100
0
-7 5
DIFFERENTIAL DRIVER OUTPUT VOLTAGE
vs. TEMPERATURE
MAX14840E toc07
TEMPERATURE (°C)
DIFFERENTIAL DRIVER OUTPUT VOLTAGE (V)
11085603510-15
1
2
3
4
0
-40 125
RL = 54I
DIFFERENTIAL DRIVER OUTPUT
VOLTAGE vs. OUTPUT CURRENT
MAX14840E toc06
IOD (mA)
VOD (V)
604020
1
2
3
4
5
0
08
0
RECEIVER OUTPUT LOW VOLTAGE
vs. OUTPUT CURRENT
MAX14840E toc05
IRO (mA)
VRO (V)
2421181512963
1
2
3
4
5
0
02
7
RECEIVER OUTPUT HIGH VOLTAGE
vs. OUTPUT CURRENT
IRO (mA)
VRO (V)
2015105
1
2
3
4
5
0
02
5
MAX14840E toc04
SUPPLY CURRENT vs. DATA RATE
MAX14840E toc03
DATA RATE (Mbps)
SUPPLY CURRENT (mA)
302010
20
40
60
80
100
0
04
0
54I LOAD
NO LOAD
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
MAX14840E toc02
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
11085603510-15
1
2
3
4
0
-40 125
RE = VCC
DE = GND
NO-LOAD SUPPLY CURRENT
vs. TEMPERATURE
MAX14840E toc01
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
1
2
3
4
0
11085603510-15-40 125
RE = GND AND DE = VCC,
OR RE = VCC AND DE = VCC
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Typical Operating Characteristics (continued)
(VCC = +3.3V, TA = +25NC, unless otherwise noted.)
RECEIVER INPUT CAPACITANCE
vs. FREQUENCY
MAX14840E toc16
FREQUENCY (kHz)
CAPACITANCE (pF)
10,0001000
10
20
30
40
50
60
70
0
100 100,000
DRIVER/RECEIVER
PROPAGATION DELAY
MAX14840E toc15
DI
5V/div
A/B
2V/div
RO
5V/div
10ns/div
RECEIVER PROPAGATION DELAY
vs. TEMPERATURE
MAX14840E toc14
TEMPERATURE (°C)
RECEIVER PROPAGATION DELAY (ns)
5
10
15
20
25
0
11085603510-15-40 125
CL = 50pF
tRPLH
tRPHL
DRIVER OUTPUT TRANSITION SKEW
(tDSKEW) vs. TEMPERATURE
MAX14840E toc13
TEMPERATURE (°C)
DRIVER OUTPUT TRANSITION SKEW (ns)
1
2
3
4
0
11085603510-15-40 125
RL = 54I, CL = 50pF
DRIVER OUTPUT RISE AND FALL TIME
vs. TEMPERATURE
MAX14840E toc12
TEMPERATURE (°C)
TIME (ns)
2
4
6
8
10
0
11085603510-15-40 125
RL = 54I, CL = 50pF
FALL TIME
RISE TIME
DIFFERENTIAL DRIVER SKEW (tDSKEW)
vs. TEMPERATURE
MAX14840E toc11
TEMPERATURE (°C)
DRIVER OUTPUT SKEW (ns)
0.5
1.0
1.5
2.0
0
11085603510-15-40 125
RL = 54I, CL = 50pF
DRIVER PROPAGATION DELAY
vs. TEMPERATURE
MAX14840E toc10
TEMPERATURE (°C)
DRIVER PROPAGATION DELAY (ns)
5
10
15
20
25
0
11085603510-15-40 125
RL = 54I, CL = 50pF
tDPLH
tDPHL
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Pin Congurations
Pin Descriptions
A
GNDDI
1
2
8
7
VCC
BRE
DE
RO
SO
3
4
6
5
MAX14840E
MAX14841E
1 3 4
8 6 5
VCC A GND
*EP
*CONNECT EXPOSED PAD (EP) TO GND.
MAX14840E
MAX14841E
2
7
B
RO
+
DE DIRE
TDFN
TOP VIEW
PIN NAME FUNCTION
1 RO Receiver Output. See the Function Table.
2RE
Active-Low Receiver-Output Enable. Drive RE low to enable RO. RO is high impedance when RE is high.
Drive RE high and DE low to enter low-power shutdown mode. RE is a hot-swap input (see the Hot-Swap
Capability section for details).
3 DE
Driver-Output Enable. Drive DE high to enable driver outputs. These outputs are high impedance when DE
is low. Drive RE high and DE low to enter low-power shutdown mode. DE is a hot-swap input (see the Hot-
Swap Capability section for details).
4 DI Driver Input. With DE high, a low on DI forces the A output low and the B output high. Similarly, a high on
DI forces the A output high and the B output low.
5 GND Ground
6 A Noninverting Receiver Input and Noninverting Driver Output
7 B Inverting Receiver Input and Inverting Driver Output
8 VCC Positive Supply Voltage Input. Bypass VCC with a 0.1FF ceramic capacitor to GND.
— EP Exposed Pad (TDFN Only). Connect EP to GND.
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Function Table
X = Don’t care.
Note: Shutdown mode, driver, and receiver outputs are in high impedance.
TRANSMITTING
INPUTS OUTPUTS
RE DE DI B A
X 1 1 0 1
X 1 0 1 0
0 0 X High Impedance High Impedance
1 0 X Shutdown (see note)
RECEIVING (MAX14840E)
INPUTS OUTPUTS
RE DE A-B RO
0 X R 200mV 1
0 X P -200mV 0
0 X Open/Shorted Previous State
1 1 X High Impedance
1 0 X Shutdown (see note)
RECEIVING (MAX14841E)
INPUTS OUTPUTS
RE DE A-B RO
0 X R -10mV 1
0 X P -200mV 0
0 X Open/Shorted 1
1 1 X High Impedance
1 0 X Shutdown (see note)
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Detailed Description
The MAX14840E/MAX14841E are +3.3V ESD-protected
RS-485 transceivers intended for high-speed, half-duplex
communications. A hot-swap capability eliminates false
transitions on the bus during power-up or hot insertion.
The MAX14840E features symmetrical fail-safe and
larger receiver hysteresis, providing improved noise
rejection and improved recovered signals in high-speed
and long cable applications. The MAX14841E has true
fail-safe receiver inputs guaranteeing a logic-high receiver
output when inputs are shorted or open. All devices have
a 1-unit load receiver input impedance, allowing up to 32
transceivers on the bus.
The MAX14840E/MAX14841E transceivers draw 1.5mA
(typ) supply current when unloaded or when fully loaded
with the drivers disabled.
Symmetrical Fail Safe (MAX14840E)
At high data rates and with long cable lengths, the signal
at the end of the cable is attenuated and distorted due to
the lowpass characteristic of the transmission line. Under
these conditions, fail-safe RS-485 receivers, which have
offset threshold voltages, produce recovered signals with
uneven mark-space ratios. The MAX14840E has symmetrical
receiver thresholds, as shown in Figure 9. This produces
near even mark-space ratios at the receiver’s output
(RO). The MAX14840E also has higher receiver hysteresis
than the MAX14841E and most other RS-485 transceivers.
This results in higher receiver noise tolerance.
Symmetrical fail safe means that the receiver’s output
(RO) remains at the same logic state that it was before the
differential input voltage VOD went to 0V. Under normal
conditions, where UART signaling is used, this means
that the state on the line prior to all drivers being disabled
is a logic-high (i.e., a UART STOP bit).
True Fail Safe (MAX14841E)
The MAX14841E guarantees a logic-high receiver output
when the receiver inputs are shorted or open or when
they are connected to a terminated transmission line with
all drivers disabled. This is the case if the receiver input
threshold is between -10mV and -200mV. RO is logic-high
if the differential receiver input voltage VOD is greater
than or equal to -10mV.
Hot-Swap Capability
Hot-Swap Inputs
When circuit boards are inserted into a hot or powered
backplane, disturbances to the enable inputs and differ-
ential receiver inputs can lead to data errors. Upon initial
circuit board insertion, the processor undergoes its pow er-up
sequence. During this period, the processor out put drivers
are high impedance and are unable to drive the DE and
RE inputs of the MAX14840E/MAX14841E to a defined
logic level. Leakage currents up to 10FA from the high-
impedance output of a controller could cause DE and RE
to drift to an incorrect logic state. Additionally, parasitic
circuit board capacitance could cause coupling of VCC
or GND to DE and RE. These factors could improperly
enable the driver or receiver. However, the MAX14840E/
MAX14841E have hot-swap inputs that avoid these
potential problems.
When VCC rises, an internal pulldown circuit holds DE
low and RE high. After the initial power-up sequence, the
pulldown circuit becomes transparent, resetting the hot-
swap-tolerable inputs.
How-Swap Input Circuitry
The MAX14840E/MAX14841E DE and RE enable inputs
feature hot-swap capability. At the input, there are two
nMOS devices, M1 and M2 (Figure 10). When VCC ramps
Figure 9. Symmetrical Hysteresis
RO
-200mV +200mV VOD
VTHP
VTHF
-10mV +10mV
VTHP
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
from 0V, an internal 15Fs timer turns on M2 and sets the
SR latch that also turns on M1. Transistors M2 (a 1mA
cur rent sink) and M1 (a 100FA current sink) pull DE to
GND through a 5.6kI resistor. M2 is designed to pull DE
to the disabled state against an external parasitic capaci-
tance up to 100pF that can drive DE high. After 15µs, the
timer deactivates M2 while M1 remains on, holding DE
low against three-state leakages that can drive DE high.
M1 remains on until an external source overcomes the
required input current. At this time, the SR latch resets
and M1 turns off. When M1 turns off, DE reverts to a stan-
dard, high-impedance CMOS input. Whenever VCC drops
below 1V, the hot-swap input is reset.
For RE, there is a complementary circuit employing two
pMOS devices pulling RE to VCC.
±35kV ESD Protection
ESD protection structures are incorporated on all pins
to protect against electrostatic discharges encountered
during handling and assembly. The driver outputs and
receiver inputs of the MAX14840E family of devices have
extra protection against static electricity. The ESD struc-
tures withstand high ESD in all states: normal operation,
shutdown, and powered down. After an ESD event, the
MAX14840E/MAX14841E keep working without latchup
or damage.
ESD protection can be tested in various ways. The trans-
mitter outputs and receiver inputs of the MAX14840E/
MAX14841E are characterized for protection to the fol-
lowing limits:
• Q35kV HBM
• Q20kV using the Air Gap Discharge method specified
in IEC 61000-4-2
• Q12kV using the Contact Discharge method specified
in IEC 61000-4-2
Figure 10. Simplified Structure of the Driver Enable Pin (DE)
VCC
TIMER
DE
TIMER
5.6kI
15Fs
100FA1mA
M2M1
DRIVER
ENABLE
(HOT SWAP)
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents test
setup, test methodology, and test results.
Human Body Model
Figure 11 shows the HBM, and Figure 12 shows the current
waveform it generates when discharged into a low-
impedance state. This model consists of a 100pF capacitor
charged to the ESD voltage of interest, which is then
discharged into the test device through a 1.5kI resistor.
IEC 61000-4-2
The IEC 61000-4-2 standard covers ESD testing and
performance of finished equipment. However, it does not
specifically refer to integrated circuits. The MAX14840E/
MAX14841E family of devices helps you design equipment
to meet IEC 61000-4-2, without the need for additional
ESD protection components.
The major difference between tests done using the HBM
and IEC 61000-4-2 is higher peak current in IEC 61000-4-2
because series resistance is lower in the IEC 61000-4-2
model. Hence, the ESD withstand voltage measured to
IEC 61000-4-2 is generally lower than that measured
using the HBM.
Figure 13 shows the IEC 61000-4-2 model, and Figure
14 shows the current waveform for IEC 61000-4-2 ESD
Contact Discharge test.
Applications Information
High-Speed Operation
The MAX14840E and MAX14841E are high-performance
RS-485 transceivers supporting data rates up to 40Mbps.
Driver Output Protection
Two mechanisms prevent excessive output current and
power dissipation caused by faults or by bus contention.
Current limit on the output stage provides immediate
Figure 11. Human Body ESD Test Model
Figure 12. Human Body current Waveform
Figure 13. IEC 61000-4-2 ESD Test Model
Figure 14. IEC 61000-4-2 ESD Generator Current Waveform
CHARGE CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
CS
100pF
RC
1MI
RD
1.5kI
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
IP 100%
90%
36.8%
tRL TIME
tDL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
IR
10%
0
0
AMPERES
CHARGE CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
Cs
150pF
RC
50MΩ TO 100MΩ
RD
330Ω
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
tR = 0.7ns TO 1ns 30ns
60ns
t
100%
90%
10%
I
PEAK
I
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
protection against short circuits over the whole common-mode
voltage range (see the Typical Operating Characteristics
section). Additionally, a thermal shutdown circuit forces
the driver outputs into a high-impedance state if the die
temperature exceeds +160NC (typ).
Low-Power Shutdown Mode
Low-power shutdown mode is initiated by bringing RE
high and DE low. In shutdown, the devices draw less than
10FA of supply current.
RE and DE can be driven simultaneously; the parts are
guaranteed not to enter shutdown if RE is high and DE is
low for less than 50ns. If the inputs are in this state for at
least 800ns, the parts are guaranteed to enter shutdown.
Typical Applications
The MAX14840E/MAX14841E transceivers are designed
for bidirectional data communications on multipoint bus
transmission lines. Figure 15 shows a typical network
application circuit. To minimize reflections, terminate the
line at both ends with its characteristic impedance and
keep stub lengths off the main line as short as possible.
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maximintegrated.com/packages. Note that a “+”, “#”,
or “-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Figure 15. Typical Half-Duplex RS-485 Network
DI RO DE
A
B
RE
RO
RO
RO
DI
DI
DI
DE
DE
DE
DD
D
R
R
R
B B
B
AAA
120Ω120Ω
D
R
MAX14840E
MAX14841E
RERE
RE
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
8 SO S8+4 21-0041
8 TDFN-EP T833+2 21-0137
Ordering Information/Selector Guide
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
PART FAIL SAFE TEMP RANGE PIN-PACKAGE
MAX14840EASA+ Symmetrical -40NC to +125NC8 SO
MAX14840EATA+ Symmetrical -40NC to +125NC8 TDFN-EP*
MAX14841EASA+ True -40NC to +125NC8 SO
MAX14841EATA+ True -40NC to +125NC8 TDFN-EP*
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 2/10 Initial release —
1 7/15 Updated Benefits and Features section and added note for operating junction
temperature up to +150°C 1–3, 5
2 7/15 Updated junction temperature range 1
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc. © 2015 Maxim Integrated Products, Inc.
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MAX14840E/MAX14841E 40Mbps, +3.3V, RS-485 Half-Duplex Transceivers
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
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