DS04-27216-4E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP For Power Supply Applications
BIPOLAR
Switching Regulator Controller
MB3817
■DESCRIPTION
The MB3817 is a pulse width modulator (PWM) type switching regulator controller IC designed for low-voltage
and high-speed operation. This can be used in applications as down-conversion or down/up-conversion (Zeta
method) .
With f e wer e xternal components and faster oper ating speed, the MB3817 enables reduction in po wer supply unit
size, making it ideal for use with internal power supplies in compact, high-performance portable devices.
■FEATURES
• Wide range of operating power supply voltages : 2.5 V to 18 V
• Built-in high-precision reference voltage generator : 1.5 V ± 2%
• High speed operation is possible : Max 500 kHz
• Wide input voltage range of error amplifier : 0 V to VCC − 0.9 V
• Built-in soft start function
• Built-in timer/latch-actuated short-circuiting protection circuit
• Totem-pole type output with adjustable on/off current (for PNP transistors)
• Built-in standby function
• Small package : SSOP-16P (FPT-16P-M05)
■PACKAGE
16-pin Plastic SSOP
(FPT-16P-M05)
MB3817
2
■
■■
■PIN ASSIGNMENT
(TOP VIEW)
(FPT-16P-M05)
16
15
14
13
12
11
10
9
VREF
CTL
CSCP
CS
GND
VE
OUT
VCC
1
2
3
4
5
6
7
8
CT
RT
+IN
−IN
FB
DTC
CB1
CB2
MB3817
3
■
■■
■PIN DESCRIPTION
Pin no. Pin name I/O Descriptions
1CTThis terminal connects to a capacitor for setting the triangular-wave frequency.
2RTThis terminal connects to a resistor for setting the triangular-wave frequency.
3+IN I Error amplifier non-inverted input terminal
4−IN I Error amplifier inverted input terminal
5 FB O Error amplifier output terminal
6 DTC I Dead time control terminal
7CB1Boot capacitor connection terminal
8CB2Boot capacitor connection terminal
9V
CC Power supply terminal
10 OUT O Totem-pole type output terminal
11 VE Output current setting terminal
12 GND Ground terminal
13 CS Soft start setting capacitor connection terminal
14 CSCP Short detection setting capacitor connection terminal
15 CTL I Power supply control terminal
When this terminal is High, IC is inactive state
When this terminal is Low, IC is standby state
16 VREF O Reference voltage output terminal
MB3817
4
■
■■
■BLOCK DIAGRAM
Q4
Q6
Q5 D1
(0.5 V)
+
−
−
+
+
+
+
−+
−
7
8
9
10
11
OUT
VE
VCC
CB2
CB1
15
VCC
bias
CTL
12
VREF GNDCSCP
16
Q3 Power
ON/OFF
Ref
(1.5 V)
Q2
UVLO
RS
Latch
bias
2
1.5 V
SCP
Comp.
Soft Start
Comp.
(0.9 V)
1 µA
Q1
PWM
Comp.
Error
Amp.
13
OSC
1RTCT
−1.4 V
−1.0 V
CS
6
DTC
3
4
5
+IN
−IN
FB
OUT
CS
14
SCP
OFF
current
setting
block
1 µA
MB3817
5
■
■■
■ABSOLUTE MAXIMUM RATINGS
* : The package is mounted on the epoxy board (10 cm × 10 cm) .
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■
■■
■RECOMMENDED OPERATING CONDITIONS
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
Parameter Symbol Condition Rating Unit
Min Max
Power supply voltage VCC 20 V
Power dissipation PDTa ≤ +25 °C440* mW
Storage temperature Tstg −55 +125 °C
Parameter Symbol Condition Value Unit
Min Typ Max
Power supply voltage VCC 2.5 6.0 18 V
Reference voltage output
current IOR −10mA
Error amp. input voltage VIN 0VCC − 0.9 V
Control input voltage VCTL 018 V
Output current IO330 mA
Timing capacitance CT150 1500 pF
Timing resistance RT5.1 100 kΩ
Oscillation frequency fOSC 10 200 500 kHz
Soft start capacitance CS0.1 1.0 µF
Short detection capacitance CSCP 0.1 1.0 µF
Boot capacitance CB0.1 µF
Operating temperature Ta −40 +25 +85 °C
MB3817
6
■
■■
■ELECTRICAL CHARACTERISTICS (VCC = 6 V, Ta = +25 °C)
* : Standard design value.
(Continued)
Parameter Symbol Pin
no. Condition Value Unit
Min Typ Max
Reference
section (Ref)
Output voltage VREF 16 1.47 1.50 1.53 V
Output temperature
stability ∆VREF/
VREF 16 Ta = −40°C to +85°C0.5* %
Input stability Line 16 VCC = 2.5 V to 18 V 210mV
Load stability Load 16 IOR = 0 mA to −1 mA 210mV
Short circuit output
current IOS 16 VREF = 1 V −10 −5−2mA
Under voltage
lockout
protection
section (UVLO)
Threshold voltage VTH 13 VCC = 2.0 2.3 V
VTL 13 VCC = 1.5 1.8 V
Hysteresis width VH13 0.1 0.2 V
Reset voltage VR13 0.6 1.0 V
Soft start
section (CS)
Threshold voltage VT0 10 Duty cycle = 0%0.9 1.0 V
VT100 10 Duty cycle = 100%1.4 1.5 V
Input standby
voltage VSTB 13 50 100 mV
Charge current ICHG 13 −1.4 −1.0 −0.6 µA
Short circuit
detection
section (SCP)
Threshold voltage VTH 14 0.60 0.65 0.70 V
Input standby
voltage VSTB 14 50 100 mV
Input latch voltage VI14 50 100 mV
Input source current II14 −1.4 −1.0 −0.6 µA
Triangular
waveform
oscillator
section (OSC)
Oscillator frequency fOSC 10 CT = 330 pF
RT = 6.2 kΩ450 500 550 kHz
Frequency voltage
stability ∆f/fdv 10 VCC = 3.6 V to 16 V 110%
Frequency
temperature stability ∆f/fdt 10 Ta = −40°C to +85°C 1* %
MB3817
7
(Continued)
(VCC = 6 V, Ta = +25 °C)
* : Standard design value.
Parameter Symbol Pin
no. Condition Value Unit
Min Typ Max
Error amp.
section (Error
Amp.)
Input offset voltage VIO 3, 4 VFB = 1.2 V 10 mV
Input offset current IIO 3, 4 VFB = 1.2 V 100 nA
Input bias current II3, 4 VFB = 1.2 V −200 −100 nA
Common mode
input voltage range VCM 3, 4 0VCC −
0.9 V
Common mode
rejection ratio CMRR 5 DC 60 100 dB
Voltage gain AV5 DC 60 100 dB
Frequency
bandwidth BW 5 AV = 0 dB 800* kHz
Maximum output
voltage width VOM+51.8 2.0 V
VOM−550 500 mV
Output sink current IO+5VFB = 1.2 V 60 120 µA
Output source
current IO−5VFB = 1.2 V −2.0 −0.6 mA
Dead time
control section
(DTC)
Threshold voltage VT0 10 Duty cycle = 0%0.9 1.0 V
VT100 10 Duty cycle = 100%1.4 1.5 V
ON duty cycle Dtr 10 VDTC = VREF × 0.88
CT = 330 pF,
RT = 6.2 kΩ70 80 90 %
Input current IDTC 6VDTC = 0 V −500 −250 nA
PWM
comparator
section (PWM
Comp.)
Threshold voltage VT0 10 Duty cycle = 0%0.9 1.0 V
VT100 10 Duty cycle = 100%1.4 1.5 V
Input sink current II+560 120 µA
Input source current II−5−2.0 −0.6 mA
Output section
(OUT)
Output sink current IO+10 RE = 15 kΩ18 30 42 mA
Output source
current IO−10 Duty ≤ 5 % −100 −50 mA
Standby leakage
current ILO 10 VCC = 18 V,
VO = 18 V 10 µA
Control section
(CTL) Input on condition VON 11 2.1 18 V
Input off condition VOFF 11 00.7 V
Input current II15 VCTL = 5 V 100 200 µA
Standby current ICCS 9VCTL = 0 V 10 µA
Power supply current ICC 9 Output “H” 2.7 4.0 mA
MB3817
8
■
■■
■TYPICAL CHARACTERISTICS
(Continued)
5
4
3
2
1
002468101214161820
Ta = +25 °C
Power supply current vs. power supply voltage
Power supply current ICC (mA)
Power supply voltage VCC (V)
2.0
1.5
1.0
0.5
0.0
Ta = +25 °C
IOR = 0 mA
02468101214161820
Reference voltage VREF (V)
Power supply voltage VCC (V)
Reference voltage vs. power supply voltage
1.55
1.54
1.53
1.52
1.51
1.50
1.49
1.48
1.47
1.46
1.45
−60 −40 −20 0 20 40 60 80 100
VCC = 6 V
IOR = 0 mA
Reference voltage vs. ambient temperature
Reference voltage VREF (V)
Ambient temperature Ta (°C)
1.7
1.6
1.5
1.4
1.3
012345
VCC = 6 V
Ta = +25 °C
IOR = 0 mA
Reference voltage vs. control voltage
Reference voltage VREF (V)
Control voltage VCTL (V)
500
400
300
200
100
004812 16 20
VCC = 6 V
Ta = +25 °C
Control current vs. control voltage
Control current ICTL (µA)
Control voltage VCTL (V)
MB3817
9
(Continued)
1 k 10 k 100 k 1 M
CT = 15000 pF CT = 1500 pFCT = 150 pF
VCC = 6 V
Ta = +25 °C
10 M
1 M
100 k
10 k
1 k
Triangular wave frequency vs.
timing resistance
Triangular wave frequency fOSC (Hz)
Timing resistance RT (Ω)
105
103104
102
10
VCC = 6 V
Ta = +25 °C
RT = 6.2 kΩ
1.8
1.6
1.4
1.2
1.0
0.8
0.6
Triangular wave maximum amplitude voltage vs.
timing capacitance
Triangular wave maximum amplitude voltage VCT (V)
Timing capacitance CT (pF)
1 k 10 k 100 k 1 M 10 M
100
80
60
40
20
0
VCC = 6 V
Ta = +25 °C
RT = 6.2 kΩ
VDTC = VREF × 0.88
Duty vs. triangular wave frequency
Duty Dtr (%)
Triangular wave frequency fOSC (Hz)
1000
100
10
1
0.1
VCC = 6 V
Ta = +25 °C
RT = 6.2 kΩ
105
103104
102
10
Triangular wave cycle vs. timing capacitance
Triangular wave cycle tOSC (µs)
Timing capacitance CT (pF)
−60 −40 −20 0 20 40 60 80 100
VCC = 6 V
fOSC = 500 kHz
(CT = 330 pF, RT = 6.2 kΩ)
10.00
5.00
0.00
−5.00
−10.00
Frequency stability vs. ambient temperature
Frequency stability (%)
Ambient temperature Ta (°C)
MB3817
10
(Continued)
1 k 10 k 100 k 1 M 10 M
225
180
135
90
45
0
−45
−90
−135
−180
−225
AV
φ
10 µF+
−
2.4 kΩ
11 kΩ
11 kΩ240 kΩ
VREF
VCC = 6 V
Error Amp.
5
4
3
Ta = +25 °C
50
40
30
20
10
0
−10
−20
−30
−40
−50
− +
Error amp. frequency • Measurement circuit
AV (dB)
Frequency fOSC (Hz)
φ (deg)
−50−40−30−20−100
VCC = 6 V
Ta = +25 °C
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
Output current setting pin voltage vs.
output current setting pin current
Output current setting pin voltage VE (V)
Output current setting pin current IE (mA)
500
400
300
200
100
0
440
−40 −20 0 20 40 60 80 100 120
Power dissipation vs. ambient temperature
Power dissipation PD (mW)
Ambient temperature Ta (°C)
MB3817
11
■
■■
■FUNCTIONAL DESCRIPTION
1. Switching Regulator Functions
(1) Reference voltage circuit (Ref)
The reference voltage circuit generates a temperature-compensated stable voltage ( := 1.50 V) . This ref erence
voltage is used as the reference voltage and bias level for the power control unit.
(2) Triangular-wave oscillator circuit
By connecting a timing capacitor and a resistor to the CT (pin1) and the RT (pin2) terminals, it is possible to
generate any desired triangular oscillation waveform.
(3) Error amplifier
The error amp. is an amplifier circuit that detects the output voltage from the switching regulator and produces
the PWM control signal. The broad in-phase input v oltage range of 0 V to Vcc − 0.9 V pro vides easy setting from
external power supplies and enables use with applications such as DC motor speed control systems.
Also, it is possible to provide stable phase compensation for a system by setting up any desired level of loop
gain, by connecting feedback resistance and a capacitor between the error amp. output term inal (FB ter minal
(pin 5) ) and the inverse input terminal (−IN terminal (pin 4) ) .
(4) PWM comparator (PWM Comp.)
This is a vo ltage comparator with one inverted input and three non-inverted inputs, and operates as a voltage-
pulse width modulator controlling output duty in relation to input voltage.
The output transistor is turned on during the interval in which the triangular wa v eform is lower than an y of three
voltages : the error amp. output voltage (FB terminal (pin 5) ) , soft start set voltage (CS terminal (pin 13) ) , or
dwell time setting voltage (DTC terminal (pin 6) ) .
(5) Output cir c uits (OUT)
The output circuit has totem pole type configuration, and can drive an external PNP transistor.
The on current value can be set up to a maximum of 30 mA using the resistance (RE) connected to the VE
terminal (pin 11) .
The off current is set by connecting a bootstr ap capacitor CB between the CP1 terminal (pin 7) and CP2 terminal
(pin 8) .
2. Power Supply Control Functions
The output is switched on and off according to the voltage level at the CTL terminal (pin 15) .
* : Supply current in standby mode is 10 µA or less.
CTL terminal voltage level Channel on/off status
L ( ≤ 0.7 V) Standby mode*
H ( ≥ 2.1 V) Operating mode
MB3817
12
3. Protective Circuit Functions
(1) Soft start and short protection circ uits (CS, SCP)
Soft starting, by pre v enting a rush current at pow er-on, can be pro vided b y connecting a capacitor CS to the CS
terminal (pin 13) .
After the soft start operation is completed, the CSCP terminal (pin 14) is held at “L” lev el (standb y v oltage VSTB),
which functions as short detection standby mode. If an output short causes the error amp. output to rise above
1.5 V, capacitor CSCP begins charging, and after reaching threshold voltage VTH of 0.65 V causes the OUT terminal
(pin 10) to be fixed at “H” level and the dwell time to be set to 100%, and the CSCP terminal (pin 14) is held at
“L” level.
Once the protection circuit has been activated, the power supply must be reset to restore operation.
(2) Low input voltage error prevention circuit (UVLO)
P o wer-on surges and momentary drops in power supply v oltage can cause errors in control IC operation, which
can destroy or damage systems. The low input voltage error protection circuit compares the supply voltage to
the inter nal reference voltage, and sets the OUT terminal (pin 10) to “H” level in the event of a drop in supply
voltage.
Operation is restored when the power supply voltage returns above the threshold voltage of the low input voltage
error prevention circuit.
MB3817
13
■
■■
■SETTING OUTPUT VOLTAGE
■
■■
■OSCILATOR FREQUENCY SETTING
The oscillator frequency can be set by connecting a timing capacitor (C T) to the CT terminal (pin1) and a timing
resistor (RT) to the RT terminal (pin2) .
Oscillator frequency : fOSC
R2
R1
+
−Error Amp.
VREF
+IN
−IN
3
4(R1 + R2)
VREF
R2
=
VO+
VO+
•Output voltage VO is plus
R
R
+
−Error Amp.
VREF
+IN
−IN
3
4(R1 + R2)
VREF
2 × R2
=
VO−
R2
R1
VO−
+VREF
−
•Output voltage VO is minus
fOSC (kHz) := 1023000
CT (pF) •RT (kΩ)
MB3817
14
■
■■
■METHOD OF SETTING THE OUTPUT CURRENT
The output circuit is comprised of a totem-pole configuration. Its output current wavefor m is such that the ON-
current value is set by constant current and the OFF-current value is set by a time constant. These output currents
are set using the equations below.
ON current : IO+ [mA] := (Voltage on output current-setting pin VE = 0.5 V)
OFF current : OFF-current time constant = proportional to the value of CB
500
RE [Ω]
Q4
Q6
Q5 D1
(0.5 V)
7
8
9
10
11
OUT
VE
VCC
CB2
CB1
CB
RE
Outside putting PNP transistor
ON current
OFF
current
OFF
current
setting
block
•Output circuit
t
0
ON current
Output current
OFF current
•Output current waveform
MB3817
15
IO (mA)
40
20
0
−20
4
2
0
−2
−4
VO (V)
VCC = 3 V
02 86410
t (µs)
•Voltage and current waveforms on output terminal
•Measuring circuit diagram
(5.0 V)
7
8
9
10
11
OUT
VE
VCC
CB2
CB1
CB
VCC
1000 pF
22 µF
RE
16 Ω22 µF
2S81121S U1FWJ44N
35 kΩ
15 kΩ
VO
MB3817
16
■
■■
■METHOD OF SETTING THE SHORT DETECTION TIME
The error amp . output is connected to the inverted input of the short detector comparator circuit (SCP Comp .) ,
where it is constantly compared to the reference voltage of approximately 1.5 V that is connected to the non-
inverted input.
If the switching regulator load conditions are stabilized, the short detector comparator output is at “H” level,
transistor Q3 is on, and the CSCP terminal (pin14) holds the input standby voltage VSTB which is 50 mV.
If load conditions change rapidly due to a cause such as a load short, so that output voltage falls, the short
detector comparator circuit output changes to “L” le v el. When this happens, transistor Q3 turns off and the short
detector capacitor CSCP connected e xternally to the CSCP terminal starts charging from the input source current
II, which is −1.0 µA.
Short detection time (tPE)
tPE [s] := 0.65 × CSCP [µF]
When the short detector capacitor CSCP has been charged to the threshold v oltage VTH, which is 0.65 V, the SR
latch is set, and the e xternal PNP transistor is turned off (setting dwell time to 100%) . At this time, the SR latch
input is closed, and the CSCP terminal is set to input latch voltage VI which is 50 mV.
Q4
Q6
Q5 D1
(0.5V)
+
−
−
+
+
+
+
−
9
10
11
OUT
VE
VCC
CSCP
14
Q3Q2
1 µA
UVLO
RS
Latch
bias
1.5 V
SCP Comp.
PWM Comp.
Error Amp.
3
4
5
+IN
−IN
FB
RE
Outside putting
PNP transistor
OFF
current
setting
block
•Short protection circuit
MB3817
17
■
■■
■TREATMENT WHEN NOT USING CSCP
When you do not use the timer/latch-actuated short-circuiting protection circuit, connect the CSCP terminal (pin
14) to GND.
14 CSCP
•Treatment when not using CSCP
MB3817
18
■
■■
■METHOD OF SETTING SOFT START TIME
To protect against surge currents when the IC is turned on, a soft start setting can be made by connecting a soft
start capacitor (CS) to the CS terminal (pin 13) .
When the IC starts up (CTL terminal (pin 15) to “H” level, Vcc ≥ UVLO threshold voltage VTH) the transistor Q1
turns off and the soft start capacitor (CS) connected to the CS terminal begins charging from the charge current
ICHG which is −1.0 µA.
At this time, if the CS terminal voltage is less than 0.9 V, the soft start comparator circuit output goes to “H” lev el,
transistor Q2 turns on and the CSCP terminal (pin 14) holds input standby v oltage VSTB which is 50 mV so that
the short protection circuit is not activated. When the CS terminal voltage is greater than or equal to 0.9 V,
transistor Q2 turns off, the PWM comparator circuit compares the CS terminal voltage with the triangular wave
and changes the ON duty of the OUTPUT ter minal, thus achieving a soft start. Note that the soft start time is
determined by the following formula.
Soft start time (time before output ON duty reaches 50%)
tS [ms] := 1.2 × CS [µF]
Q4
Q6
Q5 D1
(0.5V)
−
+
+
+
+
−
9
10
11
OUT
VE
VCC
CSCP
14
Q3Q2
1 µA
UVLO
RS
Latch
bias
(0.9 V)
Soft Start Comp.
PWM Comp.
13
RE
Q1
1 µA
CS
Outside putting
PNP transistor
OFF
current
setting
block
•Soft star t circuit
MB3817
19
■
■■
■TREATMENT WHEN NOT USING CS
When not using the soft start function, the CS terminal (pin 13) should be left open.
13 CS
Open
•When no soft start time is set
MB3817
20
■
■■
■METHOD OF SETTING THE DEAD TIME
When the de vice is set for step-up inverted output based on the flyback method, the output transistor is fixed to
a full-on state (ON-duty = 100%) at power switch-on. To prevent this problem, you may determine the voltages
on the DTC terminals (pin 6) from the VREF voltage so you can easily set the output transistor’s dead time
(maximum ON-duty) independently for each channel as shown below.
When the voltage on the DTC terminals (pin 6) is lower than the triangular-wave output voltage from the oscillator,
the output transistor turns off. The dead time calculation formula assuming that triangular-wave amplitude ≅
0.4 V and triangular-wave minimum voltage ≅ 1.4 V is given below.
Duty (ON) MAX :=
When you do not use these DTC terminals, connect them to VREF terminal.
Vdt − 1.0 V
0.4 × 100 [%]
16 VREF
6DTC
Ra
RbVdt
•When using DTC to set dead time
16 VREF
6DTC
•When not using DTC to set dead time
MB3817
21
■
■■
■APPLICATION EXAMPLE
1. Step-down scheme
VIN
VO
(3.3 V)
Q6
Q5 (0.5 V)
+
−
−
+
+
+
+
−
+
−
7
8
9
10
11
OUT
VE
VCC
CB2
CB1
15
VCC
bias
CTL
12
VREF GND
CSCP
1614
Q3 Power
ON/OFF
Ref
Q2
1 µA
UVLO
RS
Latch
bias
2
1.5 V
SCP
Comp.
Soft Start
Comp.
(0.9 V)
1 µA
Q1
PWM
Comp.
Error Amp1
13
OSC
1RTCT
1.4 V
1.0 V
CS
6
DTC
3
4
5
+IN
−IN
FB
4.7 µF
22 µH2SB1121S
U1FWJ44N
22 µF
22 µF
47 Ω
1000 pF
1000 pF 6.2 kΩ
0.1 µF
15 Ω
15 kΩ
18 kΩ0.047 µF
0.1 µF
10 kΩCS
OUT
SCP
1.5 V
Q4
(note)
Output ON/OFF signal
ON : CTL = 5 V
OFF: CTL = 0 V
2SB1121S: SANYO Electric Co., Ltd.
UIFWJ44N: TOSHIBA CORPORATION
OFF
current
setting
block
MB3817
22
2. Zeta scheme
VIN
VO
(3.3 V)
Q6
Q5 (0.5 V)
+
−
−
+
+
+
+
−
+
−
7
8
9
10
11
OUT
VE
VCC
CB2
CB1
15
VCC
bias
CTL
12
VREF GND
CSCP
1614
Q3 Power
ON/OFF
Ref
Q2
1 µA
UVLO
RS
Latch
bias
2
1.5 V
SCP
Comp.
Soft Start
Comp.
(0.9 V)
1 µA
Q1
PWM
Comp.
Error Amp1
13
OSC
1RTCT
1.4 V
1.0 V
CS
6
DTC
3
4
5
+IN
−IN
FB
4.7 µF
4.7 µF22 µH
22 µH
2SB1121S
U1FWJ44N
22 µF
22 µF
47 Ω
1000 pF
1000 pF 6.2 kΩ
0.1 µF
15 Ω
15 kΩ
18 kΩ0.047 µF
0.1 µF
10 kΩCS
OUT
SCP
1.5 V
(note)
Output ON/OFF signal
ON : CTL = 5 V
OFF: CTL = 0 V
2SB1121S: SANYO Electric Co., Ltd.
UIFWJ44N: TOSHIBA CORPORATION
OFF
current
setting
block
MB3817
23
3. Flyback scheme
VIN
VO
(5.0 V)
Q4
Q6
Q5 D1
(0.5 V)
7
8
9
10
11
OUT
VE
VCC
CB2
CB1
CB
15
VCC
bias
CTL
12
VREF GNDCSCP
1614
Q3 Power
ON/OFF
Ref
(1.5 V)
Q2
1 µA
UVLO
RS
Latch
bias
2
1.5 V
SCP
Comp.
Soft Start
Comp.
(0.9 V)
1 µA
Q1
PWM
Comp.
Error Amp.
13
OSC
1RTCT
−1.4 V
−1.0 V
CS
6
DTC
3
4
5
+IN
−IN
FB
22 µF
U1FWJ44N2SB1121S
22 µF
22 µF
RE
16 Ω
1000 pF
1000 pF 6.2 kΩ
1 µF
13 kΩ
15 kΩ
35 kΩR1
R2
0.047 µF
2.2 µF
1.2 kΩ
CS
OUT
SCP
+
−
−
+
+
+
+
−
+
−
(note)
Output ON/OFF signal
ON : CTL = 5 V
OFF: CTL = 0 V
2SB1121S: SANYO Electric Co., Ltd.
UIFWJ44N: TOSHIBA CORPORATION
OFF
current
setting
block
MB3817
24
■
■■
■APPLICATION
1. Equivalent series resistance and stability of smoothing capacitor
The equiva lent series resistance (ESR) of the smoothing capacitor in the DC/DC converter greatly affects the
loop phase characteristic.
A smoothing capacitor with a high ESR improv es system stability because the phase is adv anced into the high-
frequency range of an ideal capacitor (see Fig. 34 and 35) . A smoothing capacitor with a low ESR reduces
system stability. Use care when using low ESR electrolytic capacitors (OS-CONTM) and tantalum capacitors.
Note : OS-CON is the trademark of Sanyo Electric Co.,Ltd.
VIN D
L
RC
RL
C
Tr
Figure 33 DC/DC Converter Basic Circuit
10 100 1 k 10 k 100 k
−60
−40
−20
0
20
(1) : RC = 0 Ω
(2) : RC = 31 mΩ(1)
(2)
Frequency f (Hz)
Gain AV (dB)
10 100 1 k 10 k 100 k
−180
−90
0
(1) : RC = 0 Ω
(2) : RC = 31 mΩ
(2)
(1)
Frequency f (Hz)
Phase φ (deg)
Figure 34 Gain vs. Frequency Figure 35 Phase vs. Frequency
MB3817
25
Reference data
In an aluminum electrolytic smoothing capacitor (RC := 1.0 Ω) is replaced with a low ESR electrolytic capacitor
(OS-CONTM : RC := 0.2 Ω) , the phase margin is reduced by half (see Fig. 37 and 38) .
R2VIN
AV vs. φ characteristic
Between this point
FB
R1
VREF/2
Error Amp.
CNF
VOUT VO+
−
+
−IN
+IN
Figure 36 DC/DC Converter AV vs. φ
φφ
φ characteristic Test Circuit
Phase φ (deg)
−180
−90
0
90
180
10 100 1 k 10 k 100 k
Gain AV (dB)
−20
0
20
40
60
−40
VCC = 10 V
RL = 25 Ω
CP = 0.1 µF
AV
62°
φVO+
AI Condenser
220 µF (16 V)
RC ≅ 1.0 Ω : fOSC = 1 kHz
+
−
GND
Frequency f (Hz)
Phase φ (deg)
−180
−90
0
90
180
Frequency f (Hz)
10 100 1 k 10 k 100 k
Gain AV (dB)
−20
0
20
40
60
−40
VCC = 10 V
RL = 25 Ω
CP = 0.1 µF
AV
27°
φ
VO+
22 µF (16 V)
RC ≅ 0.2 Ω : fOSC = 1 kHz
+
−
GND
OS-CONTM
Figure 37 DC/DC Converter +
++
+5 V output Gain vs. Phase
Figure 38 DC/DC Converter +
++
+5 V output Gain vs. Phase
MB3817
26
■
■■
■NOTES ON USE
• Take account of common impedance when designing the earth line on a printed wiring board.
• Take measures against static electricity.
- For semiconductors, use antistatic or conductive containers.
- When storing or carrying a printed circuit board after chip mounting, put it in a conductive bag or container.
- The work table, tools and measuring instruments must be grounded.
- The worker must put on a grounding device containing 250 kΩ to 1 MΩ resistors in series.
• Do not apply a negative voltage
- Applying a negative voltage of −0.3 V or less to an LSI may generate a parasitic transistor, resulting in
malfunction.
■
■■
■ORDERING INFORMATION
Part number Package Remarks
MB3817PFV 16-pin Plastic SSOP
(FPT-16P-M05)
MB3817
27
■
■■
■PACKAGE DIMENSION
16-pin Plastic SSOP
(FPT-16P-M05)
Note 1) *1 : Resin protrusion. (Each side : +0.15 (.006) Max) .
Note 2) *2 : These dimensions do not include resin protrusion.
Note 3) Pins width and pins thickness include plating thickness.
Note 4) Pins width do not include tie bar cutting remainder.
Dimensions in mm (inches)
Note : The values in parentheses are reference values.
C
2003 FUJITSU LIMITED F16013S-c-4-6
5.00±0.10(.197±.004)
4.40±0.10 6.40±0.20
(.252±.008)(.173±.004)
.049 –.004
+.008
–0.10
+0.20
1.25 (Mounting height)
0.10(.004)
0.65(.026) 0.24±0.08
(.009±.003)
1 8
16 9
"A"
0.10±0.10 (Stand off)
0.17±0.03
(.007±.001)
M
0.13(.005)
(.004±.004)
Details of "A" part
0~8˚
(.024±.006)
0.60±0.15
(.020±.008)
0.50±0.20
0.25(.010)
LEAD No.
INDEX
*1
*2
MB3817
FUJITSU LIMITED
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F0308
FUJITSU LIMITED Printed in Japan