Hardware User Manual TCM-BF537 v1.x TCM-BF537BP v1.x Contact Bluetechnix Mechatronische Systeme GmbH Lainzerstrae 162/3 A-1130 Vienna AUSTRIA/EUROPE office@bluetechnix.at http://www.bluetechnix.com Document No.: 100-1225-1.4 Document Revision 20 Date: 2010-11-30 TCMBF537 v1.xHardware User Manual 2 Table of Contents BLACKFIN Products .............................................................................................................................................................................. 6 BLACKFIN Design Service ................................................................................................................................................................... 7 1 2 Introduction .................................................................................................................................................................................. 8 1.1 Overview............................................................................................................................................................................... 8 1.2 Versions ................................................................................................................................................................................. 9 1.3 Key Features ........................................................................................................................................................................ 9 1.4 Target Applications ........................................................................................................................................................... 9 1.5 Further Information .......................................................................................................................................................... 9 Specification ...............................................................................................................................................................................10 2.1 Functional Specification ................................................................................................................................................10 2.2 Boot Mode..........................................................................................................................................................................11 2.3 Flash Memory Map*) ......................................................................................................................................................11 2.3.1 2.4 SDRAM Memory Map .....................................................................................................................................................12 2.5 Electrical Specification ...................................................................................................................................................12 2.5.1 Supply Voltage ........................................................................................................................................................12 2.5.2 Supply Voltage Ripple ..........................................................................................................................................13 2.5.3 Input Clock Frequency .........................................................................................................................................13 2.5.4 Real Time Clock Crystal ........................................................................................................................................13 2.5.5 Supply Current ........................................................................................................................................................13 2.6 3 4 Asynchronous Memory Banks ...........................................................................................................................12 Environmental Specification ........................................................................................................................................13 2.6.1 Temperature ............................................................................................................................................................13 2.6.2 Humidity....................................................................................................................................................................13 TCM-BF537C (Connector Version) .......................................................................................................................................13 3.1 Mechanical Outline .........................................................................................................................................................13 3.2 Footprint .............................................................................................................................................................................15 3.3 Schematic Symbol of Connector Version ................................................................................................................16 3.4 Connectors PIN Assignment ........................................................................................................................................17 3.4.1 Connector X1 - (1-60) ...........................................................................................................................................17 3.4.2 Connector X2 - (61-120) ......................................................................................................................................18 TCM-BF537B (Border Pad and BGA Versions) ..................................................................................................................20 4.1 Mechanical Outline .........................................................................................................................................................20 4.2 Footprint of Border Pad Baseboard ...........................................................................................................................21 4.3 Schematic Symbol of Border Pad Version ...............................................................................................................22 4.4 Border Pad Pin Assignment..........................................................................................................................................23 TCMBF537 v1.xHardware User Manual 3 4.5 BGA PAD Numbering .....................................................................................................................................................25 4.6 Footprint of BGA Baseboard ........................................................................................................................................25 4.7 Schematic Symbol of BGA Version ............................................................................................................................26 4.8 BGA Pin Assignment .......................................................................................................................................................27 4.9 Reset circuit .......................................................................................................................................................................31 4.10 Flash Memory Extension PINS .....................................................................................................................................31 5 4.10.1 PINS FA20 to FA24 .................................................................................................................................................31 4.10.2 WP_FLASH ................................................................................................................................................................31 Application Example Schematics ........................................................................................................................................32 5.1 Schematic Example for Connecting a Physical Ethernet Chip .........................................................................32 5.2 Schematic Example for Connecting a USB 2.0 Chip.............................................................................................33 6 Software Support ......................................................................................................................................................................34 6.1 BLACKSheep ......................................................................................................................................................................34 6.2 uClinux ................................................................................................................................................................................34 7 Anomalies ....................................................................................................................................................................................34 8 Production Report ....................................................................................................................................................................35 9 Product Changes .......................................................................................................................................................................36 10 A Document Revision History ..............................................................................................................................................36 List of Figures and Tables .......................................................................................................................................................37 TCMBF537 v1.xHardware User Manual 4 (c) Bluetechnix Mechatronische Systeme GmbH 2010 All Rights Reserved. The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights of technical change reserved. We hereby disclaim any warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Bluetechnix makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you. Bluetechnix specifically disclaims any implied warranty of merchantability or fitness for a particular purpose. Bluetechnix takes no liability for any damages and errors causing of the usage of this board. The user of this board is responsible by himself for the functionality of his application. He is allowed to use the board only if he has the qualification. More information is found in the General Terms and Conditions (AGB). Information For further information on technology, delivery terms and conditions and prices please contact Bluetechnix (http://www.bluetechnix.com). Warning Due to technical requirements components may contain dangerous substances. The Core Modules and development systems contain ESD (electrostatic discharge) sensitive devices. Electro-static charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Unused Core Modules and Development Boards should be stored in the protective shipping TCMBF537 v1.xHardware User Manual 5 BLACKFIN Products Core Modules: TCM-BF518: The new Core Module CM-BF518 is powered by Analog Devices' single core ADSPBF518 processor; up to 400MHz, 32MB SDRAM, up to 8MB flash. The 2x60 pin expansion connectors are backwards compatible with other Core Modules. CM-BF527: The new Blackfin Processor Module is powered by Analog Devices' single core ADSPBF527 processor; key features are USB OTG 2.0 and Ethernet. The 2x60 pin expansion connectors are backwards compatible with other Core Modules. CM-BF533: Blackfin Processor Module powered by Analog Devices' single core ADSP-BF533 processor; up to 600MHz, 32MB SDRAM, 2MB flash, 2x60 pin expansion connectors and a size of 36.5x31.5mm. TCM-BF537: Blackfin Processor Module powered by Analog Devices' single core ADSP-BF537 processor; up to 500MHz, 32MB SDRAM, 8MB flash, a size of 28x28mm, 2x60 pin expansion connectors, Ball Grid Array or Border Pads for reflow soldering, industrial temperature range -40C to +85C. CM-BF537E: Blackfin Processor Module powered by Analog Devices' single core ADSP-BF537 processor; up to 600MHz, 32MB SDRAM, 4MB flash, integrated TP10/100 Ethernet physical transceiver, 2x60 pin expansion connectors and a size of 36.5x31.5mm. CM-BF537U: Blackfin Processor Module powered by Analog Devices' single core ADSP-BF537 processor; up to 600MHz, 32MB SDRAM, 4MB flash, integrated USB 2.0 Device, 2x60 pin expansion connectors and a size of 36.5x31.5mm. CM-BF548: The new Blackfin Processor Module is powered by Analog Devices' single core ADSPBF548 processor; key features are 64MB DDR SD-RAM 2x100 pin expansion connectors. CM-BF561: Blackfin Processor Module powered by Analog Devices' dual core ADSP-BF561 processor; up to 2x 600MHz, 64MB SDRAM, 8MB flash, 2x60 pin expansion connectors and a size of 36.5x31.5mm. eCM-BF561: Blackfin Processor Module powered by Analog Devices' dual core ADSP-BF561 processor; up to 2x 600MHz, 128MB SDRAM, 8MB flash, 2x100 pin expansion connectors and a size of 44x33mm. TCMBF537 v1.xHardware User Manual 6 Development Boards: EVAL-BF5xx: Low cost Blackfin processor Evaluation Board with one socket for any Bluetechnix Blackfin Core Module. Additional interfaces are available, e.g. an SD-Card. DEV-BF5xxDA-Lite: Get ready to program and debug Bluetechnix Core Modules with this tiny development platform including an USB-Based Debug Agent. The DEV-BF5xxDA-Lite is a low cost starter development system including a VDSP++ Evaluation Software License. DEV-BF548-Lite: Low-cost development board with one socket for Bluetechnix CM-BF548 Core Module. Additional interfaces are available, e.g. an SD-Card, USB and Ethernet. DEV-BF548DA-Lite: Get ready to program and debug Bluetechnix CM-BF548 Core Module with this tiny development platform including an USB-Based Debug Agent. The DEV-BF548DA-Lite is a low-cost starter development system including a VDSP++ Evaluation Software License. EXT-Boards: The following Extender Boards are available: EXT-BF5xx-AUDIO, EXT-BF5xx-VIDEO, EXTBF5xx-CAM, EXT-BF5xx-EXP-TR, EXT-BF5xx-USB-ETH2, EXT-BF5xx-AD/DA, EXT-BF548EXP and EXT-BF518-ETH. Furthermore, we offer the development of customized extender boards for our customers. Software Support: BLACKSheep: The BLACKSheep VDK is a multithreaded framework for the Blackfin processor family from Analog Devices that includes driver support for a variety of hardware extensions. It is based on the real-time VDK kernel included within the VDSP++ development environment. LabVIEW: LabVIEW embedded support for Bluetechnix Core Modules is done by SchmidEngineering AG: http://www.schmid-engineering.ch uClinux: All the Core Modules are fully supported by uClinux. The required boot loader and uClinux can be downloaded from: http://blackfin.uClinux.org. Upcoming Products and Software Releases: Keep up-to-date with all the changes to the Bluetechnix product line and software updates at: http://www.bluetechnix.com . BLACKFIN Design Service Based on more than five years of experience with Blackfin, Bluetechnix offers development assistance as well as custom design services and software development. TCMBF537 v1.xHardware User Manual 7 1 Introduction The TCM-BF537 is a chip size Core Module designed for industrial temperature range and volume production. It combines power supply, RAM and FLASH into a module as small as a chip package. Different connector options (Ball Grid Array (BGA), Border Pads (BP) and Connectors) provides solutions for all possible requirements. 1.1 Overview The Core Module TCM-BF537 consists of the following components shown in Figure 1-1. Figure 1-1: Main Components of the TCM-BF537 Core Module Analog Devices Blackfin Processor BF537 o ADSP-BF537BBCZ-5A, 500MHz (-40-85C) 32 MB SDRAM o o SDRAM Clock up to 133MHz See chapter 8 Production Report Up to 64 MB of Byte Addressable Flash o See chapter 8 Production Report o Additional flash memory upon request: It can be connected through the expansion board as parallel flash using asynchronous chip select lines or as SPI flash. Low Voltage Reset Circuit o Resets module if power supply goes below 2.93V. Dynamic Core Voltage Control o o Core voltage adjustable by setting software registers on the Blackfin processor Core voltage range: 0.8 - 1.32V TCMBF537 v1.xHardware User Manual 8 Peripherals available on all Core Module versions o o o o o o o o o SPORT 0 JTAG UART0/UART1 CAN TWI (I2C compatible) SPI (Serial Port Interface) PPI (Parallel Port Interface) Boot Mode Pins GPIO's Peripherals available on the Connector and BGA version only. o o o o 1.2 Data Bus Address Bus Further GPIO's Memory Control Signals Versions TCM-BF537: Connector Version 2x60 connector pins TCM-BF537BGA: 169 BGAs 1.5 mm pitch for volume production TCM-BF537BP: 76 Border Pads, no Data- and Address bus on border pads 1.3 Key Features 1.4 Target Applications 1.5 The TCM-BF537, measuring only 28x28mm is the smallest core module available. An extended temperature range, suitable for industrial production. Allows integration on a two layer baseboard. Reduces development costs, fast time to market. Very cost effective for small and medium volumes Generic high performance signal processor module Industrial Automation Further Information Further information, and document http://www.bluetechnix.com/goto/tcm-bf537 TCMBF537 v1.xHardware User Manual updates are available on the product homepage: 9 2 Specification 2.1 Functional Specification Mem. Control, Boot Mode, JTAG, Ethernet Dynamic Core Voltage Control BF537 @ 500MHz 32 Mbyte SDRam 256Mx16 Up to 64 Mbyte Flash Low Voltage Reset Clock Clock-out Data & Address Bus 3V3 Power , Reset 16 Bit Data Bus 20 Bit Address Bus PPI, SPORT0, UART, SPI, TWI, CAN, GPIO Figure 2-1: Detailed Block Diagram Figure 2-1 shows a detailed block diagram of the TCM-BF537 module. Beside the SDRAM and a few other control pins, the TCM-BF537 has most pins of the Blackfin processor on its two 60 pin connectors, or its BGA, or its Border Pads. Dynamic voltage control allows reducing power consumption to a minimum adjusting the core voltage and the clock frequency dynamically in accordance to the required processing power. A low voltage reset circuit guarantees a power on reset and resets the system when the input voltage drops below 2.93V for at least 140ms. TCMBF537 v1.xHardware User Manual 10 2.2 Boot Mode By default the boot mode = 000 (BMODE2 = Low, BMODE1 = Low, BMODE0=Low). All BMODE pins have on board pull down resistors. Switch Settings BM2,BM1,BM0 Description 000 001 010 011 100 101 110 111 Execute from 16bit external memory (bypass boot ROM) Boot from 8bit or 16bit memory (EPROM/flash) Reserved Boot from serial SPI memory (EEPROM/flash) Boot from SPI Host (slave mode) Boot from serial TWI memory (EEPROM/flash) Boot from TWI host (slave mode) Boot from UART host (slave mode) Table 2-1: Boot Mode TCM-BF537 Connect BMODE0 to Vcc and leave BMODE1, BMODE2 pins open for Boot Mode 001 equals to 8 or 16 bit PROM/FLASH boot mode. This is the default boot mode for the BLACKSheep software. 2.3 Flash Memory Map*) Blackfin Start Addr. 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 Blackfin End Addr. 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF FA24 (PG15) FA23 (PG14) FA22 (PG13) **) **) **) 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 TCMBF537 v1.xHardware User Manual FA21 (PF5) FA20 (PF4) Flash Start Addr. Flash End Addr. 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0x00000000 0x00200000 0x00400000 0x00600000 0x00800000 0x00A00000 0x00C00000 0x00E00000 0x01000000 0x01200000 0x01400000 0x01600000 0x01800000 0x01A00000 0x01C00000 0x01E00000 0x02000000 0x02200000 0x02400000 0x02600000 0x02800000 0x02A00000 0x02C00000 0x02E00000 0x03000000 0x03200000 0x03400000 0x001FFFFF 0x003FFFFF 0x005FFFFF 0x007FFFFF 0x009FFFFF 0x00BFFFFF 0x00DFFFFF 0x00FFFFFF 0x011FFFFF 0x013FFFFF 0x015FFFFF 0x017FFFFF 0x019FFFFF 0x01BFFFFF 0x01DFFFFF 0x01FFFFFF 0x021FFFFF 0x023FFFFF 0x025FFFFF 0x027FFFFF 0x029FFFFF 0x02BFFFFF 0x02DFFFFF 0x02FFFFFF 0x031FFFFF 0x033FFFFF 0x035FFFFF 11 0x20000000 0x20000000 0x20000000 0x20000000 0x20000000 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 0x201FFFFF 1 1 1 1 1 1 1 1 1 1 0 1 1 1 1 1 0 0 1 1 1 0 1 0 1 0x03600000 0x03800000 0x03A00000 0x03C00000 0x03E00000 0x037FFFFF 0x039FFFFF 0x03BFFFFF 0x03DFFFFF 0x03FFFFFF Table 2-2: Memory Map The flash memory is subdivided into addressable banks with 2 MByte size. The pin-connections for FA22-FA24 can be customized. Please contact Bluetechnix Support for more information. *) Be aware that you have to unlock the flash before starting an erase process! **) Only valid if 64 MByte flash mounted (see chapter 8 Production Report) 2.3.1 Asynchronous Memory Banks The maximum amount of memory addressable by a single asynchronous memory bank, of the Blackfin processor is 1MB. On this module, each 2MB segment of Flash is addressed over 2 asynchronous memory banks. In order to be able to use more than 2MB without using more than 2 banks, 2 GPIOs (PF4, PF5) are used to select which 2MB section of the FLASH is visible in the memory window of the Blackfin processor. This frees up the remaining banks for the user. Aside from the first 2 async memory banks, which are used for FLASH addressing, the core module has 2 banks of the Asynchronous Memory interface available, these can be addressed through the following addresses: Bank Start Address End Address Size Comment 0 1 2 3 0x20000000 0x20100000 0x20200000 0x20300000 0x200FFFFF 0x201FFFFF 0x202FFFFF 0x203FFFFF 1MB 1MB 1MB 1MB (Addresses FLASH) (Addresses FLASH) Use nAMS 2 Use nAMS 3 Table 2-3: Asynchronous memory banks These memory banks can be used to access various memory mapped devices or peripherals. *There are 19 address lines (A1 to A19) (The A0 signal is produced through addressing logic on ABE0 and ABE1), this allows the entire 1MB to be addressable bytewise. See section 5.6, Flash Memory Extension PINS. 2.4 SDRAM Memory Map Start Addr. End Addr. Size Comment 0x00000000 0x01FFFFFF 32MByte 16 Bit Memory interface Table 2-4: SDRAM memory map 2.5 Electrical Specification 2.5.1 Supply Voltage 3.3V DC +/-10% TCMBF537 v1.xHardware User Manual 12 2.5.2 Supply Voltage Ripple 100mV peak to peak 0-20 MHz 2.5.3 Input Clock Frequency 25MHz The Blackfin Processor Input Clock frequency is 25 MHz, this frequency is derived from the on-board crystal/oscillator and drives the Blackfin Processor's Clock generator. This frequency is also provided on the connector as pin 78 (CLKBUF). 2.5.4 Real Time Clock Crystal 32.768kHz 2.5.5 Supply Current 2.6 Maximum current: 300mA at 3.3V Typical operating conditions at 25C environment temperature: o Processor running at 500MHz, Core Voltage 1.2V, SDRAM 50% bandwidth utilization at 125MHz; 150mA at 3.3V o Processor running at 250MHz, Core Voltage 0.85V SDRAM 50% bandwidth utilization at 83,3MHz; ; Ethernet Idle: 85mA at 3.3V Environmental Specification 2.6.1 Temperature Operating at full 500MHz:: -40 to + 85 C 2.6.2 Humidity Operating: 10% to 90% (non condensing) 3 3.1 TCM-BF537C (Connector Version) Mechanical Outline Figure 3-1 shows the top view of the Core Module. All dimensions are given in millimeters! TCMBF537 v1.xHardware User Manual 13 Figure 3-1: Mechanical Outline (top view) Figure 3-2 shows the bottom view of the Core Module (connector version). Figure 3-2: Mechanical Outline (bottom view) Figure 3-3 shows a side view of the Core Module with mounted connectors. TCMBF537 v1.xHardware User Manual 14 Figure 3-3: Side View with Connectors mounted The total minimum mounting height including receptacle at the motherboard is 5.8mm. 3.2 Footprint For the Connector version (2x Hirose 0.6mm pitch) the footprint for the base board looks like that as shown in Figure 3-4. For the baseboard the following connectors have to be used. Baseboard Part Manufacturer Manufacturer Part No. X1, X2 Hirose FX860SSV Table 3-1: Baseboard connector types The Connectors on the TCM-BF537 are of the following type: Part Manufacturer Manufacturer Part No. X1, X2 Hirose 3mm height FX860PSV Table 3-2: Core Module connector types Figure 3-4: Recommended Footprint for Base Board (top view) TCMBF537 v1.xHardware User Manual 15 3.3 Schematic Symbol of Connector Version SPORT 0 CAN TWI GPIO Power PPI / SPORT 1 UARTs SPI JTAG 1 60 2 59 3 58 4 57 5 56 6 55 7 54 8 53 9 52 10 51 11 50 12 49 13 48 14 47 15 46 16 45 17 44 18 43 19 42 20 41 21 40 22 39 23 38 24 37 25 36 26 35 27 34 28 33 29 32 30 31 RSCLK0 / TACLK2 A1 RFS0 / TACLK3 A2 DR0PRI / TACLK4 A3 DR0SEC / TACI0 / CAN_Rx A4 TSCLK0 / TACLK1 A5 TFS0 / SPI_SSEL3 A6 DT0PRI / SPI_SSEL2 A7 DT0SEC / SPI_SSEL7 / CAN_Tx A8 PH15 / MIICRS A9 SCL A10 SDA A11 PF10 / SPI_SSEL1 A12 PH7 / COL A13 PF6 / TMR3 / SPI_SSEL4 A14 PH6 / MIIPHYINT A15 PH5 / MIITxCLK A16 Vin 3V3 A17 GND A18 Vin 3V3 A19 GND ABE0 PG0 / PPI1D0 Connectors ABE1 PG1 / PPI1D1 ETxD0 / PH0 PG2 / PPI1D2 ETxD1 / PH1 PG3 / PPI1D3 ETxD2 / PH2 PG4 / PPI1D4 ETxD3 / PH3 PG5 / PPI1D5 ETxEN / PH4 PG6 / PPI1D6 ERxD0 / PH8 PG7 / PPI1D7 ERxD1 / PH9 PG8 / PPI1D8 / DR1SEC ERxD2 / PH10 PG9 / PPI1D9 / DT1SEC ERxD3 / PH11 PG10 / PPI1D10 / RSCLK1 ARDY PG11 / PPI1D11 / RFS1 ERxDV / PH12 PG12 / PPI1D12 / DR1PRI ERxCLK / PH13 PG13 / PPI1D13 / TSCLK1 ERXER / PH14 PG14 / PPI1D14 / TFS1 CLKBUF PG15 / PPI1D15 / DT1PRI VDD-RTC PPI1Sy3 / PF7 / TMR2 GND PPI1Sy2 / PF8 / TMR1 AMS2 PPI1Sy1 / PF9 / TMR0 AMS3 PPI1Clk / PF15 / TMRCLK ARE MDC AWE PF2 / Tx1 / TMR7 AOE PF3 / Rx1 / TMR6 / TACI6 CLKOUT PF14 / SPI_SS RESET PF1 / DMAR1 / TACI1 / Rx0 D0 PF0 / DMAR0 / Tx0 D1 PF11 / SPI_MOSI D2 PF12 / SPI_MISO D3 PF13 / SPI_SCK D4 Bmode1 D5 Bmode0 D6 MDIO D7 GND D8 Bmode2 D9 TCK D10 TDO D11 TDI D12 Connector TMS D13 TRST D14 Symbol EMU D15 TCM-BF537 61 120 62 119 63 118 64 117 65 116 66 115 67 114 68 113 69 112 70 111 71 110 72 109 73 108 74 107 75 106 76 105 77 104 78 103 79 102 80 101 81 100 82 99 83 98 84 97 85 96 86 95 87 94 88 93 89 92 90 91 Addr. Bus Ethernet / GPIO Control Signals Data Bus Figure 3-5: Schematics Symbol of Connector Version of the TCM-BF537 TCMBF537 v1.xHardware User Manual 16 3.4 Connectors PIN Assignment Please mind the mounted pull up and pull down resistors on the Core Module. See the third column of Table 3-3 and Table 3-4. 3.4.1 Connector X1 - (1-60) Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 Signal Signal Type. RSCLK0 / TACLK2 DR0PRI / TACLK4 TSCLK0 / TACLK1 DT0PRI / SPI_SSEL2 PH15 / MIICRS SDA PH7 / COL PH6 / MIIPHYINT Vin 3.3 V Vin 3.3V PG0 / PPI1D0 PG2 / PPI1D2 PG4 / PPI1D4 PG6 / PPI1D6 PG8 / PPI1D8 / DR1SEC PG10 / PPI1D10 / RSCLK1 PG12 / PPI1D12 / DR1PRI PG14 / PPI1D14 / TFS1 PPI1SY3/PF7/TMR2 PPI1SY1/PF8/TMR1 MDC PF3 / Rx1 / TMR6 / TACI6 PF1 / DMAR1 / TACI1 / Rx0 PF11 / SPI_MOSI PF13 / SPI_SCK BMODE0 GND TCK TDI TRST EMU TMS TDO BMODE2 MDIO BMODE1 PF12 / SPI_MISO PF0 / DMAR0 / Tx0 PF14 / SPI_SS PF2 / Tx1 / TMR7 PPI1Clk / PF15 / TMRCLK I/O O I/O I I/O I/O I/O I/O PWR PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I - 10k pull down PWR I - 10k pull up I - 10k pull up I - 4k7 pull down O I - 10k pull up O I - 10k pull down I/O - 10k pull up I - 10k pull down I/O I/O I/O I/O I/O TCMBF537 v1.xHardware User Manual 17 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 PPI1Sy2 / PF8 / TMR1 PG15 / PPI1D15 / DT1PRI PG13 / PPI1D13 / TSCLK1 PG11 / PPI1D11 / RFS1 PG9 / PPI1D9 / DT1SEC PG7 / PPI1D7 PG5 / PPI1D5 PG3 / PPI1D3 PG1 / PPI1D1 GND GND PH5 / MIITxCLK PF6 / TMR3 / SPI_SSEL4 PF10 / SPI_SSEL1 SCL DT0SEC / CANTX / SPI_SSEL7 TFS0 / SPI_SSEL3 DR0SEC / TACI0 / CANRX RFS0 / TACLK3 I/O I/O I/O I/O I/O I/O I/O I/O I/O PWR PWR I/O I/O I I/O O I/O I I/O Table 3-3: Connector X1 pin assignment Note: The processor pins PF4 and PF5 are used for flash addressing on the Core Module. They are not available on the connectors. Signal names correspond to those of the Blackfin processor unless otherwise stated. 3.4.2 Connector X2 - (61-120) Pin No. 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 Signal Signal Type. A1 A3 A5 A7 A9 A11 A13 A15 A17 A19 ABE1 / SDQM1 PH1/ETxD1 PH3/ETxD3 PH8/ERxD0 PH10/ERxD2 ADRY PH13/ERxCLK CLKBUF GND O O O O O O O O O O O I/O I/O I/O I/O I - 10k pull up I/O O PWR TCMBF537 v1.xHardware User Manual 18 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 AMS3 AWE CLKOUT (SCLK) D0 D2 D4 D6 D8 D10 D12 D14 D15 D13 D11 D9 D7 D5 D3 D1 Reset AOE ARE AMS2 VDD-RTC PH14/ERXER PH12/ERxDV PH11/ERxD3 PH9/ERxD1 PH4/ETxEN PH2/ETxD2 PH0/ETxD0 ABE0/ SDQM0 A18 A16 A14 A12 A10 A8 A6 A4 A2 O O I I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I - see chapter 0 O O O PWR I/O I/O PWR I/O I/O I/O I/O O O O O O O O O O O Table 3-4: Connector X2 pin assignment Signal names correspond to those of the Blackfin processor unless otherwise stated. TCMBF537 v1.xHardware User Manual 19 4 TCM-BF537B (Border Pad and BGA Versions) 4.1 Mechanical Outline The two figures below shows the top and bottom view of the Core Module. All dimensions are given in millimeters! Figure 4-1: Mechanical Outline (top view) Figure 4-2: Mechanical Outline (bottom view) TCMBF537 v1.xHardware User Manual 20 Figure 4-3 shows a side view of the Core Module with border pads. Figure 4-3: Side View of the Border Pads The total minimum mounting height of the Border Pad version is only 3.1mm! 4.2 Footprint of Border Pad Baseboard Figure 4-4 shows the pin assignment of the Border Pad Version. The pin Numbering is clockwise ascending. The Pins No. 10 and 48 are not present. Figure 4-4: Border Pad Footprint for the Base Board (top view) Note: Conducting paths and vias within the footprint must be solder resistant. Do not place any component within the footprint either. TCMBF537 v1.xHardware User Manual 21 4.3 Schematic Symbol of Border Pad Version U? 6 5 8 7 12 11 14 13 76 4 3 33 68 32 66 65 28 29 49 67 42 43 44 45 46 47 50 51 52 53 54 55 56 57 58 59 39 40 41 38 2 30 31 37 27 26 34 35 36 18 19 16 17 20 21 22 23 24 25 RSCLK0 / TACLK2 RFS0 / TACLK3 DR0PRI / TACLK4 DR0SEC / TACI0 / CAN_Rx TSCLK0 / TACLK1 TFS0 / SPI_SSEL3 DT0PRI / SPI_SSEL2 DT0SEC / SPI_SSEL7 / CAN_Tx PH15 / MIICRS SCL SDA PF10 / SPI_SSEL1 PH7 / COL PF6 / TMR3 / SPI_SSEL4 PH6 / MIIPHYINT PH5 / MIITxCLK Vin 3V3 GND Vin 3V3 GND Borderpads PG0 / PPI1D0 PG1 / PPI1D1 ETxD0 / PH0 PG2 / PPI1D2 ETxD1 / PH1 PG3 / PPI1D3 ETxD2 / PH2 PG4 / PPI1D4 ETxD3 / PH3 PG5 / PPI1D5 ETxEN / PH4 PG6 / PPI1D6 ERxD0 / PH8 PG7 / PPI1D7 ERxD1 / PH9 PG8 / PPI1D8 / DR1SEC ERxD2 / PH10 PG9 / PPI1D9 / DT1SEC ERxD3 / PH11 PG10 / PPI1D10 / RSCLK1 PG11 / PPI1D11 / RFS1 ERxDV / PH12 PG12 / PPI1D12 / DR1PRI ERxCLK / PH13 PG13 / PPI1D13 / TSCLK1 ERXER / PH14 PG14 / PPI1D14 / TFS1 CLKBUF PG15 / PPI1D15 / DT1PRI VDD-RTC PPI1Sy3 / PF7 / TMR2 PPI1Sy2 / PF8 / TMR1 PPI1Sy1 / PF9 / TMR0 PPI1Clk / PF15 / TMRCLK MDC PF2 / Tx1 / TMR7 PF3 / Rx1 / TMR6 / TACI6 PF14 / SPI_SS RESET PF1 / DMAR1 / TACI1 / Rx0 PF0 / DMAR0 / Tx0 PF11 / SPI_MOSI PF12 / SPI_MISO PF13 / SPI_SCK Bmode1 Bmode0 MDIO TCM-BF537 60 61 62 63 64 69 70 71 72 73 74 75 1 9 15 Bmode2 TCK TDO TDI TMS TRST EMU T-CM-BF537 Figure 4-5: Schematics of the Border Pad Version of the TCM-BF537BP TCMBF537 v1.xHardware User Manual 22 4.4 Border Pad Pin Assignment Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 Signal Type CLKBUF MDC SDA SCL RFS0 / TACLK3 RSCLK0 / TACLK2 DR0SEC / TACI0 / CAN_Rx DR0PRI / TACLK4 VDDRTC not available TFS0 / SPI_SSEL3 TSCLK0 / TACLK1 DT0SEC / SPI_SSEL7 / CAN_Tx DT0PRI / SPI_SSEL2 O O I/O I/O I/O I/O I I PWR RESET MDIO BMODE2 BMODE1 BMODE0 TCK TDO TDI TMS TRST EMU PF0 / DMAR0 / Tx0 PF1 / DMAR1 / TACI1 / Rx0 Vin 3.3V GND PF2 / Tx1 / TMR7 PF3 / Rx1 / TMR6 / TACI6 PF6 / TMR3 / SPI_SSEL4 PF10 / SPI_SSEL1 PF11 / SPI_MOSI PF12 / SPI_MISO PF13 / SPI_SCK PF14 / SPI_SS PPI1Clk / PF15 / TMRCLK PPI1Sy3 / PF7 / TMR2 PPI1Sy2 / PF8 / TMR1 PPI1Sy1 / PF9 / TMR0 PG0 / PPI1D0 PG1 / PPI1D1 PG2 / PPI1D2 PG3 / PPI1D3 TCMBF537 v1.xHardware User Manual I/O I/O O O I - see chapter 0 I/O - 10k pull up I - 10k pull down I - 10k pull down I - 10k pull down I - 10k pull up O I - 10k pull up I - 10k pull up I - 4k7 pull down O I/O I/O PWR PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O 23 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 PG4 / PPI1D4 PG5 / PPI1D5 not present Vin 3.3V PG6 / PPI1D6 PG7 / PPI1D7 PG8 / PPI1D8 / DR1SEC PG9 / PPI1D9 / DT1SEC PG10 / PPI1D10 / RSCLK1 PG11 / PPI1D11 / RFS1 PG12 / PPI1D12 / DR1PRI PG13 / PPI1D13 / TSCLK1 PG14 / PPI1D14 / TFS1 PG15 / PPI1D15 / DT1PRI PH0 / ETxD0 PH1 / ETxD1 PH2 / ETxD2 PH3 / ETxD3 PH4 / ETxEN PH5 / MIITxCLK PH6 / MIIPHYINT GND PH7 / COL PH8 / ERxD0 PH9 / ERxD1 PH10 / ERxD2 PH11 / ERxD3 PH12 / ERxDV PH13 / ERxCLK PH14 / ERXER PH15 / MIICRS I/O I/O PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O Table 4-1: Border pin assignment Signal names correspond to those of the Blackfin processor unless otherwise stated. Not: Please mind the mounted pull up and pull down resistors on the Core Module. See the third column of Table 4-1. TCMBF537 v1.xHardware User Manual 24 4.5 BGA PAD Numbering A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 D1 D2 D3 D15 D16 D17 E1 E2 E3 E15 E16 E17 F1 F2 F3 F15 F16 F17 G1 G2 G3 G15 G16 G17 H1 H2 H3 H15 H16 H17 J1 J2 J3 J15 J16 J17 K1 K2 K3 K15 K16 K17 L1 L2 L3 L15 L16 L17 M1 M2 M3 M15 M16 M17 N1 N2 N3 N15 N16 N17 P1 P2 P3 P15 P16 P17 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T15 T16 T17 U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 T11 T12 T13 T14 Figure 4-6: BGA Pad Numbering (top view) 4.6 Footprint of BGA Baseboard Figure 4-7 shows the top view of the BGA footprint for your base board. Figure 4-7: Recommended BGA Footprint for the Base Board (top view) TCMBF537 v1.xHardware User Manual 25 B1 H15 J15 K16 WP_Flash FA22 FA23 FA24 RSCLK0 / TACLK2 RFS0 / TACLK3 DR0PRI / TACLK4 DR0SEC / TACI0 / CAN_Rx TSCLK0 / TACLK1 TFS0 / SPI_SSEL3 DT0PRI / SPI_SSEL2 DT0SEC / SPI_SSEL7 / CAN_Tx PH15 / MIICRS SCL SDA PF10 / SPI_SSEL1 PH7 / COL PF6 / TMR3 / SPI_SSEL4 PH6 / MIIPHYINT PH5 / MIITxCLK A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 TCM-BF537 ABE0 PG0 / PPI1D0 ABE1 BGA PG1 / PPI1D1 ETxD0 / PH0 PG2 / PPI1D2 ETxD1 / PH1 PG3 / PPI1D3 ETxD2 / PH2 PG4 / PPI1D4 ETxD3 / PH3 PG5 / PPI1D5 ETxEN / PH4 PG6 / PPI1D6 ERxD0 / PH8 PG7 / PPI1D7 ERxD1 / PH9 PG8 / PPI1D8 / DR1SEC ERxD2 / PH10 PG9 / PPI1D9 / DT1SEC ERxD3 / PH11 PG10 / PPI1D10 / RSCLK1 ARDY PG11 / PPI1D11 / RFS1 ERxDV / PH12 PG12 / PPI1D12 / DR1PRI ERxCLK / PH13 PG13 / PPI1D13 / TSCLK1 ERXER / PH14 PG14 / PPI1D14 / TFS1 CLKBUF PG15 / PPI1D15 / DT1PRI VDD-RTC PPI1Sy3 / PF7 / TMR2 GND PPI1Sy2 / PF8 / TMR1 AMS2 PPI1Sy1 / PF9 / TMR0 AMS3 PPI1Clk / PF15 / TMRCLK ARE MDC AWE PF2 / Tx1 / TMR7 AOE PF3 / Rx1 / TMR6 / TACI6 MEMCLK PF14 / SPI_SS RESET PF1 / DMAR1 / TACI1 / Rx0 D0 PF0 / DMAR0 / Tx0 D1 PF11 / SPI_MOSI D2 PF12 / SPI_MISO D3 PF13 / SPI_SCK D4 Bmode1 D5 Bmode0 D6 MDIO D7 GND D8 Bmode2 D9 TCK D10 TDO D11 TDI D12 TMS D13 TRST D14 EMU D15 A7 B7 C7 A8 B8 C8 B9 C9 A10 B10 C10 A11 C11 A12 B12 C12 A13 B13 C13 B6 A6 T2 T1 R2 R1 P2 M2 M1 L2 L1 A4 K2 K1 J2 A1 H3 J3 B3 A3 B5 A5 B4 A2 D1 A17 B17 C16 C17 D16 D17 E16 E17 F16 F17 G16 G17 H16 H17 J16 J17 R7 R8 R9 R12 R13 R14 C3 C6 A9 B11 C14 C15 A16 B16 D15 G15 K15 GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 U4 T4 U3 T3 U2 U1 T12 U12 T13 U13 H1 U17 T17 T14 R16 R17 U15 T15 U14 L15 L16 H2 N15 L17 M16 M17 N16 N17 P16 P17 NMI BG BGH BR Vcc Vcc Vcc Vcc Vcc Vcc F3 G1 F1 F2 E2 E3 D3 E1 J1 G2 G3 T16 N1 U16 N2 P1 D2 C2 B2 C1 Schematic Symbol of BGA Version R10 R11 T10 T11 U10 U11 4.7 Figure 4-8: Schematics Symbol of the BGA Version of the TCM-BF537BGA TCMBF537 v1.xHardware User Manual 26 4.8 BGA Pin Assignment Pin No. Signal Signal Type. A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 A15 A16 A17 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 C11 CLKBUF MEMCLK O O O I - 10k pull up O O O O PWR O O O O PWR I/O I - 10k pull up O O O O O O O O O PWR O O PWR I/O I - 10k pull up O PWR PWR O O O O O AMS3 ARDY AWE ABE1 A1 A4 GND A9 A12 A14 A17 n.c. n.c. GND D0 WP_Flash BGH AMS2 AOE ARE ABE0 A2 A5 A7 A10 GND A15 A18 n.c. n.c. GND D1 BR BG GND n.c. n.c. GND A3 A6 A8 A11 A13 TCMBF537 v1.xHardware User Manual 27 C12 C13 C14 C15 C16 C17 D1 D2 D3 D15 D16 D17 E1 E2 E3 E15 E16 E17 F1 F2 F3 F15 F16 F17 G1 G2 G3 G15 G16 G17 H1 H2 H3 H15 H16 H17 J1 J2 J3 J15 J16 J17 K1 K2 K3 K15 K16 A16 A19 GND GND D2 343I/O Reset NMI DT0PRI / SPI_SSEL2 GND D4 D5 DT0SEC / CANTX / SPI_SSEL7 TSCLK0 / TACLK1 TFS0 / SPI_SSEL3 n.c. D6 D7 DR0PRI / TACLK4 DR0SEC / TACI0 / CANRX RSCLK0 / TACLK2 n.c. D8 D9 RFS0 / TACLK3 SCL SDA GND D10 D11 MDC MDIO VDDRTC FA22 D12 D13 PH15 / MIICRS PH14 / ERXER GND FA23 D14 D15 PH13 / ERxCLK PH12 / ERxDV n.c. GND FA24 TCMBF537 v1.xHardware User Manual O O PWR PWR I/O I/O I - see chapter 0 I - 10k pull up O PWR I/O I/O O I/O I/O I/O I/O I I I/O I/O I/O I/O I/O I/O PWR I/O I/O I/O I/O - 10k pull up PWR I - 10k pull down I/O I/O I/O I/O PWR I - 10k pull down I/O I/O I/O I/O PWR I - 10k pull down 28 K17 L1 L2 L3 L15 L16 L17 M1 M2 M3 M15 M16 M17 N1 N2 N3 N15 N16 N17 P1 P2 P3 P15 P16 P17 R1 R2 R3 R4 R5 R6 R7 R8 R9 R10 R11 R12 R13 R14 R15 R16 R17 T1 T2 T3 T4 T5 n.c. PH11 / ERxD3 PH10 / ERxD2 n.c. BMODE1 BMODE0 BMODE2 PH9 / ERxD1 PH8 / ERxD0 n.c. n.c. TCK TDO PH7 / COL PH6 / MIIPHYINT n.c. GND TDI TMS PH5 / MIITxCLK PH4 / ETxEN n.c. n.c. TRST EMU PH3 / ETxD3 PH2 / ETxD2 n.c. n.c. n.c. n.c. GND GND GND Vcc Vcc GND GND GND n.c. PF1 / DMAR1 / TACI1 / Rx0 PF0 / DMAR0 / Tx0 PH1 / ETxD1 PH0 / ETxD0 PG13 / PPI1D13 / TSCLK1 PG11 / PPI1D11 / RFS1 PG9 / PPI1D9 / DT1SEC TCMBF537 v1.xHardware User Manual PWR I/O I - 10k pull down I - 10k pull down I - 10k pull down I/O I/O I - 10k pull up O I/O I/O PWR I - 10k pull up I - 10k pull up I/O I/O I - 4k7 pull down O I/O I/O PWR PWR PWR PWR PWR PWR PWR PWR I/O I/O I/O I/O I/O I/O I/O 29 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 U1 U2 U3 U4 U5 U6 U7 U8 U9 U10 U11 U12 U13 U14 U15 U16 U17 PG7 / PPI1D7 PG5 / PPI1D5 PG3 / PPI1D3 PG1 / PPI1D1 Vcc Vcc PF7 / PPI1SY3 / TMR2 PF9 / PPI1SY1 / TMR0 PF14 / SPI_SS PF12 / SPI_MISO PF10 / SPI_SSEL1 PF3 / Rx1 / TMR6 / TACI6 PG15 / PPI1D15 / DT1PRI PG14 / PPI1D14 / TFS1 PG12 / PPI1D12 / DR1PRI PG10 / PPI1D10 / RSCLK1 PG8 / PPI1D8 / DR1SEC PG6 / PPI1D6 PG4 / PPI1D4 PG2 / PPI1D2 PG0 / PPI1D0 Vcc Vcc PF8 / PPI1_SY2 / TMR1 PF15 / PPI1CLK / TMRCLK PF13 / SPI_SCLK PF11 / SPI_MOSI PF6 / TMR3 / SPI_SSEL4 PF2 / Tx1 / TMR7 I/O I/O I/O I/O PWR PWR I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O Table 4-2: BGA Version Pin Assignment Signal names correspond to those of the Blackfin processor unless otherwise stated. Note: Please mind the mounted pull up and pull down resistors on the Core Module. See the third column of Table 4-2. TCMBF537 v1.xHardware User Manual 30 4.9 Reset circuit The reset of the flash and the processor are connected to a power monitoring IC. The output can be used as power on reset for external devices, see Figure 4-9. 3.3V RESET of Flash TCM809SENB713 3 VDD RESET 1 2 R12 RESET of ADSP-BF5xx 470R GND U5 Core Module 99 GND External RESET Figure 4-9: Schematic of reset circuit on the Core Module 4.10 Flash Memory Extension PINS 4.10.1 PINS FA20 to FA24 Flash pin Blackfin pin FA20 FA21 FA22 FA23 FA24 PF4 PF5 PG13 PG14 PG15 Table 4-3: Pins FA20 to FA24 All pins are pulled down by default. The signals FA20 and FA21 are used to address the (first) 8MB of Flash memory. These signals are connected directly with the Blackfin pins PF4 (FA20) and PF5 (FA21) (see chapter 2.3) so you cannot use FA20 or FA21 for your own purposes! The signals FA22-FA24 can be used to address up to 64MByte of Flash memory (if installed on the Core Module). The signals FA22-FA23 are connected through a 0R resistor array with the Blackfin signals PG13 (FA22), PG14 (FA23) and PG15 (FA24). If you need the signals PG13-PG15 for your own purposes (for example to use the SPORT1 interface) AND you want to address up to 64MByte Flash memory, so you can remove the 0R resistor array and use other GPIOs for FA22-FA24 (in this case you must connect these GPIOs externally to FA22-F24). Please contact Bluetechnix Support for further informations. 4.10.2 WP_FLASH Is pulled high by default so flash is unprotected. To write protect the flash connect this pin to GND. TCMBF537 v1.xHardware User Manual 31 5 Application Example Schematics In the following two examples connection of a Physical Ethernet chip and a USB 2.0 chip to the Core Module are provided. 5.1 Schematic Example for Connecting a Physical Ethernet Chip Since the ADSP-BF537 Blackfin Chip from Analog Devices already has Ethernet functionality only a physical Ethernet chip needs to be connected to the TCM-BF537 Core Module in order to make use of this feature. 3V3 2.5V_VA ERxDV ERxCLK ERxER ERxDV ERxCLK ERxER 3 4 5 6 9 10 11 MII_CRS COL MII_CRS COL 22 21 ERxD3 ERxD2 ERxD1 ERxD0 MDC MDIO nRESET_ETH1 nPD MII_PHYINT 3V3 2 1 nRESET_ETH1 48 nPD 30 MII_PHYINT 25 TxD3 TxD2 TxD1 TxD0 Tx_EN Tx_CLK/REFCLK Tx_ER/TXD4 VddRCV VddRX VddTX VddPLL Vdd_CORE RxD3/PHYAD RxRxD2/PHYAD2 Rx+ RxD1/PHYAD3 FXSD/FXEN RxD0/PHYAD4 TxRx_DV/CRSDV/PCS_LBPK Tx+ Rx_CLK Rx_ER/ISO REXT 38 31 42 600Z L1 10u 47 2.5V_PLL 13 2.5V 32 33 34 40 41 R3 49R9 C6 10u Rx Rx+ GND GND 6k49 CRS/RMII_BTB COL/RMII SPEED100/FEF COLLISION/NWAYEN MDC ACTIVITY/TEST MDIO FDUPLEX RESET CLKIN/XTAL1 27 29 26 28 46 XTAL2 R9 49R9 LED_SPEED R13 6 5 4 3 2 1 V1 DTVSUSB2.0 > InvNr: 10549 1 xRx 2 3 GND xRx+ R5 R6 3V3 27R 27R V2 4 5 6 xTx 2.5V_VA xTx+ 3V3 DTVSUSB2.0 > InvNr: 10549 C7 100n LED_ACT 2.5V_VA 12 11 8 7 3 2 1 9 10 RdRd+ TdTd+ R10 GND GND 220R R12 R11 220R 45 2k43 8 12 23 35 36 39 43 44 3V3 C8 100n GND CLKBUF R8 49R9 27R PD INT/PHYAD0 R4 49R9 2.5V_VA Tx Tx+ R7 GND R2 10R GND L2 600Z 37 2.5V_VA C5 GND GND GND GND GND GND GND GND MDC MDIO 2.5V_VA KS8721 Vdd Vdd 20 19 18 17 16 15 14 14 ETxEN MII_TxCLK ERxD[3..0] ETxEN MII_TxCLK ERxD[3..0] C4 10u U2 ETxD3 ETxD2 ETxD1 ETxD0 13 ETxD[3..0] 7 24 ETxD[3..0] C9 100n CLKBUF GND Figure 5-1: Configuration with Physical Chip Designator Value Part Number Description Quantity C4, C5, C6 C7, C8, C9 L1, L2 R2 R3, R4, R8, R9 10u 100n 600Z 10R 49R9 C0805C106K9PAC 2238 246 19876 74279265 MC 0.063W 0603 1% 10R MC 0.063W 0603 1% 49R9 Capacitor non-polarized Capacitor non-polarized Ferrite Resistor Resistor 3 3 2 1 4 R5, R6, R11 27R MC 0.063W 0603 1% 27R Resistor 3 R7 6k49 MC 0.063W 0603 1% 6K49 Resistor 1 R10, R12 220R MC 0.063W 0603 1% 220R Resistor 2 R13 U2 2k43 MULTICOMP KSZ8721BLI-LQFP48L Resistor 10/100BASE Physical Layer Transceiver TSV-Diode for USB 2.0 RJ45-Connector with LEDs 1 1 V1, V2 X3 USBLC6-2P6 RJLBC-060TC1 2 1 Table 5-1: Bill of Material of Sample Schematic TCMBF537 v1.xHardware User Manual 32 X3 RJ45 1:1 LED 5.2 Schematic Example for Connecting a USB 2.0 Chip The following example shows how to connect a USB 2.0 chip to the TCM-BF537 core Module. A[7..0] A[7..0] 2V5 3V3 2V5A 3V3 D[15..0] 15 11 27 42 55 7 3 48 1 GND 5 6 7 8 GND D[15..0] 58 53 61 59 60 50 34 51 52 5 6 7 8 USB-nAMS nARE nAWE R17 40 18 17 GND 10k 4 3 2 1 C10 3 3V3 2 4 26 R22 13 30MHz 12p GND AVDD PVDD VDD25 VDDC VDDC XIN RSDM DM XOUT DP RSDP RREF VSSC VSSC VSSIO VSSIO VSSIO GND GND 64 LD0 LD1 LD2 LD3 LD4 LD5 LD6 LD7 LD8 LD9 LD10 LD11 LD12 LD13 LD14 LD15 LCLKO DREQ IRQ 2k43 VBUS 24 56 33 41 54 4 10 VBUS NET2272REV1ALF TRST TEST TMC2 GND 1 GND 25 Y1 12p C11 GND RESET ALE CS IOR IOW DMARD DMAWR DACK EOT AVSS AVSS COM USBnRESET ALE USB-nRESET LA0 LA1 LA2 LA3 LA4 RPU 19 20 21 22 23 35 36 37 38 39 43 44 45 46 47 49 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 57 62 63 9 8 6 5 2 3V3 R19 1k5 DREQ USBnIRQ R20 39R GND R21 39R R23 1k5 1 2 3 USB-nIRQ X4 V3 6 5 4 6 2 3 4 1 5 USBD USBD+ 3V3 GND DTVSUSB2.0 > InvNr: 10549 3V3 R24 47k V4 R25 1M C13 100n 12 14 16 4 3 2 1 DREQ 32 31 30 29 28 A0 A1 A2 A3 A4 VDDIO VDDIO VDDIO VDD33 U3 R14 10k GND C12 10n USBDUSBD+ GND VCC USBB GND GND 3V3 2V5 L3 2V5A 3V3 C14 10n C15 10n C16 100n C17 10u GND C18 10u C19 10n GND C20 100n L4 C23 10n C21 100n 220Z 2V5 U4 1 220Z C22 1u 3 Vin Vout CE GND XC62042V5 5 2 GND GND Figure 5-2: Configuration with USB 2.0 Chip Designator Value Part Number Description Quantity C1u, C2u C3u, C4u, C5u, C9u, C11u C6u, C10u, C12u C7u, C8u L1u, L2u R1u, R3u, R11u, R12u R2u R4u R5u, R6u R7u R8u R9u R10u U1u 12p 10n 100n 10u 220R 10k 10k 1k 39R 2k43 1k5 47k 1M 2238 867 15129 2238 916 15636 2238 246 19876 C0805C106K9PAC 74279263 MC 0.063W 0603 1% 10K 2350 025 11003 MC 0.063W 0603 1% 1k MC 0.0654W 0603 1% 39R MULTICOMP MC 0.063W 0603 1% 1K5 MC 0.063W 0603 1% 47k MC 0.063W 0603 1% 1M NET2272REV1A-LF Capacitor non-polarized Capacitor non-polarized Capacitor non-polarized Capacitor non-polarized Ferrite Resistor 4-Resistor Array Resistor Resistor Resistor Resistor Resistor Resistor USB 2.0 Peripheral Controller TQPF 2 5 3 2 2 4 1 1 2 1 1 1 1 1 V1u X1u Y1u CDS3C05GTA 2411 01 Q 30.0-JXS32-12-10/20 USB-Device Normal Crystal Oscillator 1 1 1 Table 5-2: Bill of Material of Sample Schematic TCMBF537 v1.xHardware User Manual 33 6 Software Support 6.1 BLACKSheep The Core Module is delivered with a pre-flashed basic version of the BLACKSheep VDK multithreaded framework. It contains a boot-loader for flashing the Core Module via the serial port. Please consult the software development documents. 6.2 uClinux The Core Module is fully supported by the open source platform at http://blackfin.uclinux.org. Since the Core Modules are pre-flashed with BLACKSheep you have to flash uBoot first. To flash uBoot you can use the BLACKSheep boot-loader. To use the Ethernet functionality of the TCM-BF537 Core Modules you need the EXT-BF5xx-ETH-USB Blackfin Extension Board. 7 Anomalies For the latest information regarding anomalies for this product, please consult the product home page: http://www.bluetechnix.com/goto/tcm-bf537 Date Revisions Description 24.10.2007 V1.1 V1.2 V1.3 RTCProblem: The Clock accuracy of the RTC is much less than specified by the crystal (20ppm). Due to layout issues the measured inaccuracy is about 79 sec. / Hour. The RTC Bug affects both the BGA and Border Pad Versions. For accurate time measurements please use the main crystal or an external RTC. Table 8-7-1: Anomalies TCMBF537 v1.xHardware User Manual 34 8 Production Report For the latest information regarding the productions for this product, please consult the product home page: https://support.bluetechnix.at/wiki/Revision_Report_TCM-BF537x TCMBF537 v1.xHardware User Manual 35 9 Product Changes For the latest product change information please consult the product web-page at: http://www.bluetechnix.com/goto/tcm-bf537 Version Changes V1.1.X Border Pad and BGA Versions added with 64MB flash addressing option, 28mmx28mm outline Component placement changed (connector version) Mount option for 64MB flash addressing (connector version) Correction of RTC inaccurateness V1.2.X V1.3.X V1.4.X 10 Document Revision History Version Date Document Revision 20 19 18 17 2010-11-30 2010-08-31 2010-02-03 2009-05-25 16 15 14 2009-03-19 2009-01-19 2008-12-02 13 12 11 10 9 8 7 6 5 4 3 2008-10-21 2008-09-05 2008-08-11 2008-08-06 2008 03 27 2007 24 10 2007 06 04 2007 04 17 2007 04 04 2007 01 08 2006 10 02 2 2 2006 04 26 2006 04 26 1 2006 03 07 Changed product picture Complete document revision Redesign Manual Table 4.2 L14 -> J16 Symbol BGA updated Table 8.2 new version added Chapter 5-1 new schematic, new part list Chapter 4.9 added Pull up/down information added Correction of the BGA-Pin assignment table Pin 48 not available instead of 49 Footprints and mechanical drawings updated English checked for spelling, grammar and clarity Fixed memory map Production Report Added RTC Problem in the Anomaly List added Unlock flash hint, Document Revision History Table BP and BGA symbols corrected; Rx1 and Tx1 were mixed up Corrections of the description of the BP and BGA versions. Corrected Typo in page 7 Table 2-2: PF5 one time instead of two times PF4 Release V1.1 of TCM Boards Main updates: Separate Connector, Border and BGA pad version Border Pads: 76 Border pads without Data and Address bus pins Connector Version: As in version V1.0 BGA Version: Additional Processor pins, added Flash addressing flexibility Removed limited address range, all 8MB addressable Updated anomaly list: only 4MB addressable. Updated document: Connector symbol, fixed Bug naming of pin 22 and pin 40 (connector version) Rx and Tx was flipped. First release V1.0 of the Document Table 10-1: Revision History TCMBF537 v1.xHardware User Manual 36 A List of Figures and Tables Figures Figure 1-1: Main Components of the TCM-BF537 Core Module ........................................................................................................ 8 Figure 2-1: Detailed Block Diagram ........................................................................................................................................................... 10 Figure 3-1: Mechanical Outline (top view) .............................................................................................................................................. 14 Figure 3-2: Mechanical Outline (bottom view) ...................................................................................................................................... 14 Figure 3-3: Side View with Connectors mounted ................................................................................................................................. 15 Figure 3-4: Recommended Footprint for Base Board (top view) ..................................................................................................... 15 Figure 3-5: Schematics Symbol of Connector Version of the TCM-BF537 .................................................................................... 16 Figure 4-1: Mechanical Outline (top view) .............................................................................................................................................. 20 Figure 4-2: Mechanical Outline (bottom view)..................................................................................................................................... 20 Figure 4-3: Side View of the Border Pads ................................................................................................................................................. 21 Figure 4-4: Border Pad Footprint for the Base Board (top view) ..................................................................................................... 21 Figure 4-5: Schematics of the Border Pad Version of the TCM-BF537BP ...................................................................................... 22 Figure 4-6: BGA Pad Numbering (top view)........................................................................................................................................... 25 Figure 4-7: Recommended BGA Footprint for the Base Board (top view) .................................................................................... 25 Figure 4-8: Schematics Symbol of the BGA Version of the TCM-BF537BGA ................................................................................ 26 Figure 4-9: Schematic of reset circuit on the Core Module ............................................................................................................... 31 Figure 5-1: Configuration with Physical Chip ......................................................................................................................................... 32 Figure 5-2: Configuration with USB 2.0 Chip .......................................................................................................................................... 33 Tables Table 2-1: Boot Mode TCM-BF537 .............................................................................................................................................................. 11 Table 2-2: Memory Map ................................................................................................................................................................................. 12 Table 2-3: Asynchronous memory banks ................................................................................................................................................ 12 Table 2-4: SDRAM memory map ................................................................................................................................................................. 12 Table 3-1: Baseboard connector types ..................................................................................................................................................... 15 Table 3-2: Core Module connector types................................................................................................................................................. 15 Table 3-3: Connector X1 pin assignment................................................................................................................................................. 18 Table 3-4: Connector X2 pin assignment................................................................................................................................................. 19 Table 4-1: Border pin assignment .............................................................................................................................................................. 24 Table 4-2: BGA Version Pin Assignment ................................................................................................................................................... 30 Table 4-3: Pins FA20 to FA24........................................................................................................................................................................ 31 Table 5-1: Bill of Material of Sample Schematic ..................................................................................................................................... 32 Table 5-2: Bill of Material of Sample Schematic ..................................................................................................................................... 33 Table 8-7-1: Anomalies .................................................................................................................................................................................. 34 Table 10-1: Revision History ......................................................................................................................................................................... 36 TCMBF537 v1.xHardware User Manual 37 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Bluetechnix: 100-1225-1