DS04-28314-2E
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP
3-Channel 10-Bit D/A Converter
MB40950
■DESCRIPTION
The MB40950 is a 10-bit resolution high-speed digital-to-analog converter, designed for video processing
applications such as TVsets and VCRS.
The M B40 950 has 1 0-bi t r es olu tio n 3 ch ann els D/ A c onver ter s. Digital d ata ar e inpu t to the 10-bi t di gi tal in put
ports, and the input digita l data are co nverted into the ana log da ta in m inimum 6 0 Mega samp le per s econ ds
(MSPS). The analog output voltage is provided in a range of DC +3V to +5V (2Vp-p level) .
The MB40950 is fabricated by the Fujitsu’s advanced bipolar process and housed in a 48-pin plastic QFP.
The MB40950 is designed for video signal processing, and it is suitable for TVS and VCRS applications.
■FEATURES
• 10-bit x 3 channels D/A converters
• Max. 60 MHz input clock frequency providing 60 MSPS data conversion rate
• Linearity error : Max. +/-0.07%
• Analog output voltage range : 3V to 5V (2Vp-p level)
• Digital input voltage level : TTL level
• On-chip reference voltage generator
(Continued)
■PACKAGE
(FPT-48P-M15)
48 pin, Plastic QFP
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields. However, it is advised that
normal precautions be taken t o avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
2
MB40950
(Continued)
• Low power consumption :
– Typical 460mW at 2Vp-p analog output voltage
– Typical 350mW at 1Vp-p analog output voltage
• Single +5V power supply
• Operating temperature range : -20°C to +70°C
• Fujitsu’s advanced bipolar process
• Package : 48-pin plastic QFP (Suffix : -PF)
■PIN ASSIGNMENT
CLKR
CLKG
CLKB
R1
R2
R3
R4
R5
R6
R7
R8
R9
1
2
3
4
5
6
7
8
9
10
11
12
(FPT-48P-M15)
(TOP-VIEW)
36
35
34
33
32
31
30
29
28
27
26
25
VROUT1
COMP
VCCD
B10
B9
B8
B7
B6
B5
B4
B3
B2
13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41 40 39 38 37
R10 G1G2G3G4G5G6G7G8G9G10 B1
D.GND
VCCA
ROUT
A.GND
VCCA
GOUT
A.GND
VCCA
BOUT
A.GND
VROUT2
VRIN
INDEX
3
MB40950
■PIN DESCRIPTION
(Continued)
Symbol Pin No. Type Name & Function
Power Supply
VCCD 34 —+5V DC power supply pins for digital block.
D. GND 48 —Ground pin for digital block.
VCCA 41, 44, 47 —DC power supply pins for analog block.
A. GND 39, 42, 45 —Ground pins for analog block.
Clock
CLKR 1 I Clock input pin for R channel.
CLKG 2 I Clock input pin for G channel.
CLKB 3 I Clock input pin for B channel.
Digital Input
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
4
5
6
7
8
9
10
11
12
13
IDigital data input pins for R cha nnel.
10-bit data is input to the pins.
The R1 pin is the MSB and the R10 pin is the LSB.
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
14
15
16
17
18
19
20
21
22
23
IDigital data input pins for G channel.
10-bit data is input to the pins.
The G1 pin is the MSB and the G10 pin is the LSB.
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
24
25
26
27
28
29
30
31
32
33
IDigital data input pins for B channel.
10-bit data is input to the pins.
The B1 pin is the MSB and the B10 pin is the LSB.
4
MB40950
(Continued)
Symbol Pin No. Type Name & Function
Analog Output
ROUT 46 OAnalog signal output pin for R channel.
GOUT 43 OAnalog signal output pin for G channel.
BOUT 40 OAnalog signal output pin for B channel.
Reference Voltage
VRIN 37 I
Reference voltage input pin. This pin is used to set the analog output
dynamic range. When the internal ref erence v oltage is used, this pin is
connected with VROUT1 pin (36 pin) or VROUT2 pin (38 pin). When the
reference voltage is supplied from the external generator, 2.65V to
4.3V or VCCA - VRIN = 0.7V to 2.2V is input to this pin.
VROUT1 36 OReference voltage output #1 pin. The output voltage is set to 0.6 x
VCCA by the resistor divided method. When this pin is connected with
VRIN pin (37 pin), an analog v oltage is output from this pin in a range of
0.6 x VCCA to VCCA.
VROUT2 38 OReference voltage output #2 pin. The output voltage is set to VCCA - 2V
by the band-gap reference method. When this pin is connected with
VRIN pin (37 pin), an analog v oltage is output from this pin in a range of
VCCA - 2V to VCCA.
Compesation Capacitor
COMP 35 -Phase compesation capacitor pin. A phase compesation capacitor of
0.1µF or greater is connected between this pin and A. GND pin.
5
MB40950
■BLO C K DIAGR AM
CLKR
10
Input
buffer
Master
slave
Flip-Flop Buffer Current
switch
1010
VCCA
ROUT
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
(MSB)
(LSB)
101010
CLKG
Input
buffer
Master
slave
Flip-Flop Buffer Current
switch
VCCA
GOUT
G1
G2
G3
G4
G5
G6
G7
G8
G9
G10
(MSB)
101010
CLKB
Input
buffer
Master
slave
Flip-Flop Buffer Current
switch
VCCA
BOUT
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
(MSB)
(LSB)
Amp.
Reference resistor
Reference
vo lta ge #2
VCCA - 2V
VCCAVCCDCOMPVRINVROUT2VROUT1A. GNDD. GND
(LSB)
Reference
v olta ge #1
0.6 x V CCA
6
MB40950
■ABSOLUTE MAXIMUM RATINGS
■RECOMMENDED OPERATING CONDITIONS
(A. GND = D. GND = 0V)
Parameter Symbol Rating Unit
Power supply voltage VCCA, VCCD –0.5 to +7.0 V
Power supply voltage difference VCCD – VCCA 1.5 V
Analog reference voltage VRIN –0.5 to VCCA +7.0 V
Digital input voltage VID –0.5 to +7.0 V
Storage temperature Tstg –55 to +125 °C
Note: P ermanent device damage may occur if the abov e Absolute Maximum Ratings are exceeded. Functional
operation should be restr icted to the conditio ns as deta iled in the op erational sec tions of thi s data sh eet.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
(A. GND = D. GND = 0V)
Parameter Symbol Value Unit
Min. Typ. Max.
Power supply voltage VCCA, VCCD 4.75 5.00 5.25 V
Power supply voltage difference VCCA – VCCD –0.2 —0.2 V
Analog reference voltage VCCA – VRIN 0.70 2.00 2.20 V
VRIN 2.65 3.00 4.30 V
Digital "H" level input voltage VIHD 2.0 — — V
Digital "L" level input voltage VILD — — 0.8 V
Clock frequency fCLK — — 60 MHz
Setup time tSU 8.0 — — ns
Hold time th2.0 — — ns
Minimum clock "H" level pulse width twH 6.5 — — ns
Minimum cloc k "L" le vel pulse width twL 6.5 — — ns
Phase compesation capacitance CCOMP 0.1 — — µF
Operating ambient temperature TOP –20 —70 °C
7
MB40950
■ELECTRICAL CHARACTERISTICS
(Recommended Operating Conditions Otherwise Noted)
1. DC Characteristics
2. AC Characteristics
Parameter Symbol Value Unit Remark
Min. Typ. Max.
Resolution — — — 10 bit —
Linearity er ro r LE — — ±0.07 %DC Accuracy
Differential linearity error DLE — — ±0.07 %DC Accuracy
Digital "H" level input current IIHD — — 20 µA VIHD = 2.7 (V)
Digital "L" level input current IILD –100 — — µA VILD = 0.4 (V)
Reference input current IRIN — — 10 µA VRIN = 3.000 (V)
Reference v oltage (Resister divided) VROUT1 2.900 3.000 3.100 V VCCA = VCCD = 5.00 (V)
Reference voltage (BGR) VROUT2 VCCA
–2.100 VCCA
–2.000 VCCA
–1.900 V —
Reference voltage (BGR) — — 100 —ppm/°C —
RGB output voltage ratio FSR 0 — 6 % VCCA = VCCD = 5.00 (V)
Full-scale output voltage VOFS VCCA
–20 VCCA —mV —
Zero-scale output voltage VOZS 2.932 3.002 3.072 VVCCA = VCCD = 5.00 (V)
VRIN = 3.000 (V)
Output resistance RO192 240 288 ΩTa = 25°C
Supply current ICC —92* 152 mA VCCA = VCCD = 5.25 (V)
VRIN = VROUT1
* :VCCA = VCCD = 5.00V
Parameter Symbol Value Unit Remark
Min. Typ. Max.
Maximum conversion rate FS60 — — MSPS
Ter m in ated A. OUT pin
with 240Ω, CL = 15pF
Output propagation delay time tpd — 7 — ns
Output rising time tr— 5 — ns
Output falling time tf — 5 — ns
Setting tim e tset —17.5 —ns
8
MB40950
■AC TIMING CHART
tWH
1.5V
tsetHL
tWL
Data Input 0V
3V
tsu th
1.5V
0V
3V
VOZS
VOFS
±1/2 LSB
±1/2 LSB
tsetLH
tpdLH tpdHL
tftr
90%
50%
10%
Clock Input
Analog Output
Input
R1 ~ 10
G1 ~ 10
B1 ~ 10
1023
0
Output
ROUT
GOUT
BOUT
5.000V
3.002V
5.000V
3.000V
(VCCA)
VOFS
VOZS
(VRIN)
■DAC OUTPUT VOLTAGE RANGE
1LSB 2mV
9
MB40950
■CALCULATION OF DAC OUTPUT VOLTAGE AT IDEAL CONVERSION
■NOTES ON USE
1. Power Supply Patterns of the PCB
The power supply wire patter n s (VCC and GND patterns ) o f the PCB s houl d be desig ned as wide as po ssible
in order to reduce parasitic impedance.
2. Switching Noise
In order to reduce switching noise as much as possible, noise limit capacitor must be connected between VCCD
and D. GND pins and VCCA and A. GND pins.
In this case, the capacitor should be connected to the GND pins side as near as possible.
ROUT (GOUT, BOUT) = VCCA – X ( VCCA – VRIN )
1024
1023 – N
[ N : Digital Input Code (0 to 1023) ]
VOFS = VCCA
VOZS = VCCA – X ( VCCA – VRIN )
1024
1023
5V
VCCD
0.01µF47µF47µF0.01µF
2.2µH
2.2µH
VCCA
R 1 to 10
G1 to 10
B1 to 10
D. GND A. GND
ROUT
GOUT
BOUT
VROUT2
VRIN
VROUT1
COMP
0.1µF
Data Input
CLK Input Connect to VROUT1, VROUT2, or
external reference voltage source.
CLKR
CLKG
CLKB
■
TYPICAL CONNECTION EXAMPLE
10
MB40950
■PACKAGE DIMENSION
(FPT-48P-M15)
48 pin, Plastic QFP
+0.05
–0.01
+.002
–.0004
+0.30
–0.10
+.012
–.004
0.15
.006
12.00
.472 0.05(.002)MIN
(STAND OFF)
"B" (.033±.012)
0.85±0.30
0~10°
0.15(.006)MAX
0.50(.020)MAX
0.20(.008)
0.15(.006)
"A"
SQ
SQ
(.602±.016)
LEAD No.
0.80(.0315)TYP
48 13
2437
36 25
112
Details of "B" part
INDEX
0.10(.004)
REF
(.346) (.535±.016)
8.80 13.60±0.40
2.70(.106)MAX
M
0.16(.006)
(.012±.002)
0.30±0.06
15.30±0.40
Details of "A" part
1994 FUJITSU LIMITED F48025S-1C-1
CDime nsio ns in mm (i nc hes) .
12
MB40950
All Rights Reserved.
The contents of this document are subject to change without
notice. Customers are advised to consult with FUJITSU sales
repres entatives before or dering.
The information and circuit diagrams in this document presented
as examples of semiconductor device applications, and are not
intended to be incorporated in devices for actual use. Also,
FUJITSU is una ble to assume respon sibility for in frin gem ent of
any patent rights or other rights of third parties arising from the
use of this information or circuit diagrams.
FUJITSU semiconductor devices are intended for use in
standard applications (computers, office automation and other
office equipment, industrial, communications, and measurement
equipment, personal or household devices, et c.).
CAUTION:
Customers considering the use of our products in special
applications where failure or abnormal operation may directly
affect hu man lives or cause physical injury or property damage,
or where extremely high levels of reliability are demanded (such
as aerospace systems, atomic energy controls, sea floor
repeaters, vehicle operating controls, medical devices for life
support, etc.) are requested to consult with FUJITSU sales
representatives before such use. The company will not be
responsible for damages arising from such use without prior
approval.
Any semiconductor devices have inherently a certain rate of
failure. You must protect against injury, damage or loss from
such failures by incorporating safety design measures into your
facility and equipment such as redundancy, fire protection, and
prevent ion of ove r-curr ent level s and ot her abnor mal ope rating
conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreig n Exchange an d Foreig n Tr a de C o ntrol Law o f J a pan, the
prior auth orization by Japanese gov ernment shoul d be required
for export of those products from Japan.
FUJITSU LIMITED
For further information please contact:
Japan
FUJITSU LIMITED
Corporate Global Business Support Division
Electronic Devices
KAWASAKI PLANT, 4-1-1, Kamikodanaka
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Tel: (044) 754- 375 3
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Semiconductor Division
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F9703
FUJITSU LIMITED Printed in Japan
