2N5060 Series Preferred Device Sensitive Gate Silicon Controlled Rectifiers Reverse Blocking Thyristors Annular PNPN devices designed for high volume consumer applications such as relay and lamp drivers, small motor controls, gate drivers for larger thyristors, and sensing and detection circuits. Supplied in an inexpensive plastic TO-226AA (TO-92) package which is readily adaptable for use in automatic insertion equipment. * Sensitive Gate Trigger Current -- 200 A Maximum * Low Reverse and Forward Blocking Current -- 50 A Maximum, TC = 110C * Low Holding Current -- 5 mA Maximum * Passivated Surface for Reliability and Uniformity * Device Marking: Device Type, e.g., 2N5060, Date Code http://onsemi.com SCRs 0.8 AMPERES RMS 30 thru 200 VOLTS G A MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Symbol Peak Repetitive Off-State Voltage(1) (TJ = 40 to 110C, Sine Wave, 50 to 60 Hz, Gate Open) 2N5060 2N5061 2N5062 2N5064 VDRM, VRRM On-State Current RMS (180 Conduction Angles; TC = 80C) IT(RMS) * Value Unit Volts 30 60 100 200 *Average On-State Current (180 Conduction Angles) (TC = 67C) (TC = 102C) IT(AV) *Peak Non-repetitive Surge Current, TA = 25C (1/2 cycle, Sine Wave, 60 Hz) ITSM 0.8 Amp 10 PIN ASSIGNMENT 1 A2s *Forward Peak Gate Power (Pulse Width 1.0 sec; TA = 25C) PGM 0.1 Watt PG(AV) 0.01 Watt *Forward Peak Gate Current (Pulse Width 1.0 sec; TA = 25C) IGM 1.0 Amp *Reverse Peak Gate Voltage (Pulse Width 1.0 sec; TA = 25C) VRGM 5.0 Volts *Operating Junction Temperature Range TJ -40 to +110 C Tstg -40 to +150 C v *Storage Temperature Range 3 Amps 0.4 v 2 TO-92 (TO-226AA) CASE 029 STYLE 10 0.51 0.255 I2t *Forward Average Gate Power (TA = 25C, t = 8.3 ms) 1 Amp Circuit Fusing Considerations (t = 8.3 ms) v K Cathode 2 Gate 3 Anode ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. Preferred devices are recommended choices for future use and best overall value. *Indicates JEDEC Registered Data. (1) VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; however, positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. Semiconductor Components Industries, LLC, 2000 May, 2000 - Rev. 4 1 Publication Order Number: 2N5060/D 2N5060 Series THERMAL CHARACTERISTICS Symbol Max Unit *Thermal Resistance, Junction to Case(1) Characteristic RJC 75 C/W Thermal Resistance, Junction to Ambient RJA 200 C/W -- +230* C *Lead Solder Temperature (Lead Length 1/16 from case, 10 s Max) q ELECTRICAL CHARACTERISTICS (TC = 25C unless otherwise noted) Characteristic Symbol Min Typ Max Unit *Peak Repetitive Forward or Reverse Blocking Current(2) (VAK = Rated VDRM or VRRM) TC = 25C TC = 110C IDRM, IRRM -- -- -- -- 10 50 A A -- -- 1.7 Volts -- -- -- -- 200 350 -- -- -- -- 0.8 1.2 0.1 -- -- IH -- -- -- -- 5.0 10 td tr -- -- 3.0 0.2 -- -- OFF CHARACTERISTICS ON CHARACTERISTICS *Peak Forward On-State Voltage(3) (ITM = 1.2 A peak @ TA = 25C) VTM Gate Trigger Current (Continuous dc)(4) *(VAK = 7 Vdc, RL = 100 Ohms) Gate Trigger Voltage (Continuous dc)(4) *(VAK = 7 Vdc, RL = 100 Ohms) TC = 25C TC = -40C *Gate Non-Trigger Voltage (VAK = Rated VDRM, RL = 100 Ohms) Holding Current (4) *(VAK = 7 Vdc, initiating current = 20 mA) VGT VGD TC = 110C TC = 25C TC = -40C Volts Volts mA s Turn-On Time Delay Time Rise Time (IGT = 1 mA, VD = Rated VDRM, Forward Current = 1 A, di/dt = 6 A/s Turn-Off Time (Forward Current = 1 A pulse, Pulse Width = 50 s, 0.1% Duty Cycle, di/dt = 6 A/s, dv/dt = 20 V/s, IGT = 1 mA) A IGT TC = 25C TC = -40C s tq 2N5060, 2N5061 2N5062, 2N5064 -- -- 10 30 -- -- -- 30 -- DYNAMIC CHARACTERISTICS Critical Rate of Rise of Off-State Voltage (Rated VDRM, Exponential) dv/dt V/s *Indicates JEDEC Registered Data. (1) This measurement is made with the case mounted "flat side down" on a heat sink and held in position by means of a metal clamp over the curved surface. (2) RGK = 1000 is included in measurement. (3) Forward current applied for 1 ms maximum duration, duty cycle 1%. (4) RGK current is not included in measurement. p http://onsemi.com 2 2N5060 Series Voltage Current Characteristic of SCR + Current Symbol Parameter VDRM IDRM Peak Repetitive Off State Forward Voltage VRRM IRRM Peak Repetitive Off State Reverse Voltage Anode + VTM on state Peak Forward Blocking Current IH IRRM at VRRM Peak Reverse Blocking Current VTM IH Peak on State Voltage Holding Current Reverse Blocking Region (off state) Reverse Avalanche Region + Voltage IDRM at VDRM Forward Blocking Region (off state) Anode - 130 120 CASE MEASUREMENT POINT - CENTER OF FLAT PORTION 110 100 dc 90 80 = 30 70 60 90 120 130 a = CONDUCTION ANGLE 180 60 TA , MAXIMUM ALLOWABLE AMBIENT TEMPERATURE ( C) TC , MAXIMUM ALLOWABLE CASE TEMPERATURE (C) CURRENT DERATING 50 = CONDUCTION ANGLE 110 TYPICAL PRINTED CIRCUIT BOARD MOUNTING 90 70 dc 50 = 30 60 90 120 180 30 0 0.1 0.2 0.3 0.4 0.5 0 0.1 0.2 0.3 IT(AV), AVERAGE ON-STATE CURRENT (AMP) IT(AV), AVERAGE ON-STATE CURRENT (AMP) Figure 1. Maximum Case Temperature Figure 2. Maximum Ambient Temperature http://onsemi.com 3 0.4 2N5060 Series CURRENT DERATING 10 ITSM , PEAK SURGE CURRENT (AMP) 5.0 3.0 2.0 TJ = 110C 1.0 0.7 5.0 3.0 2.0 0.5 1.0 1.0 3.0 5.0 7.0 10 20 30 50 70 100 NUMBER OF CYCLES Figure 4. Maximum Non-Repetitive Surge Current 0.2 0.8 0.1 0.07 0.05 0.03 0.02 120 a = CONDUCTION ANGLE = 30 0.6 60 180 90 0.4 dc 0.2 0.01 0 0 r(t), TRANSIENT THERMAL RESISTANCE NORMALIZED 2.0 0.3 P(AV), MAXIMUM AVERAGE POWER DISSIPATION (WATTS) i T , INSTANTANEOUS ON-STATE CURRENT (AMP) 25C 7.0 0.5 1.0 1.5 2.0 2.5 0 0.3 0.2 0.1 0.5 0.4 vT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) IT(AV), AVERAGE ON-STATE CURRENT (AMP) Figure 3. Typical Forward Voltage Figure 5. Power Dissipation 1.0 0.5 0.2 0.1 0.05 0.02 0.01 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 t, TIME (SECONDS) Figure 6. Thermal Response http://onsemi.com 4 1.0 2.0 5.0 10 20 2N5060 Series I GT , GATE TRIGGER CURRENT (NORMALIZED) TYPICAL CHARACTERISTICS VAK = 7.0 V RL = 100 RGK = 1.0 k 0.7 0.6 0.5 0.4 0.3 - 75 -50 -25 0 25 50 75 200 VAK = 7.0 V RL = 100 100 50 2N5062-64 20 10 5.0 2N5060-61 2.0 1.0 0.5 0.2 100 110 -75 -50 -25 0 25 50 75 TJ, JUNCTION TEMPERATURE (C) TJ, JUNCTION TEMPERATURE (C) Figure 7. Typical Gate Trigger Voltage Figure 8. Typical Gate Trigger Current 4.0 I H , HOLDING CURRENT (NORMALIZED) VG , GATE TRIGGER VOLTAGE (VOLTS) 0.8 VAK = 7.0 V RL = 100 RGK = 1.0 k 3.0 2.0 2N5060,61 1.0 0.8 2N5062-64 0.6 0.4 -75 -50 -25 0 25 50 75 TJ, JUNCTION TEMPERATURE (C) Figure 9. Typical Holding Current http://onsemi.com 5 100 110 100 110 2N5060 Series TO-92 EIA RADIAL TAPE IN FAN FOLD BOX OR ON REEL H2A H2A H2B H2B H W2 H4 H5 T1 L1 H1 W1 W L T T2 F1 F2 P2 D P2 P1 P Figure 10. Device Positioning on Tape Specification Inches Symbol Item Millimeter Min Max Min Max 0.1496 0.1653 3.8 4.2 D Tape Feedhole Diameter D2 Component Lead Thickness Dimension 0.015 0.020 0.38 0.51 Component Lead Pitch 0.0945 0.110 2.4 2.8 F1, F2 H Bottom of Component to Seating Plane H1 Feedhole Location .059 .156 1.5 4.0 0.3346 0.3741 8.5 9.5 1.0 H2A Deflection Left or Right 0 0.039 0 H2B Deflection Front or Rear 0 0.051 0 1.0 0.7086 0.768 18 19.5 H4 Feedhole to Bottom of Component H5 Feedhole to Seating Plane 0.610 0.649 15.5 16.5 L Defective Unit Clipped Dimension 0.3346 0.433 8.5 11 L1 Lead Wire Enclosure 0.09842 -- 2.5 -- P Feedhole Pitch 0.4921 0.5079 12.5 12.9 P1 Feedhole Center to Center Lead 0.2342 0.2658 5.95 6.75 First Lead Spacing Dimension 0.1397 0.1556 3.55 3.95 0.06 0.08 0.15 0.20 -- 0.0567 -- 1.44 P2 T Adhesive Tape Thickness T1 Overall Taped Package Thickness T2 Carrier Strip Thickness 0.014 0.027 0.35 0.65 W Carrier Strip Width 0.6889 0.7481 17.5 19 W1 Adhesive Tape Width 0.2165 0.2841 5.5 6.3 W2 Adhesive Tape Position .0059 0.01968 .15 0.5 NOTES: 1. Maximum alignment deviation between leads not to be greater than 0.2 mm. 2. Defective components shall be clipped from the carrier tape such that the remaining protrusion (L) does not exceed a maximum of 11 mm. 3. Component lead to tape adhesion must meet the pull test requirements. 4. Maximum non-cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 5. Holddown tape not to extend beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 6. No more than 1 consecutive missing component is permitted. 7. A tape trailer and leader, having at least three feed holes is required before the first and after the last component. 8. Splices will not interfere with the sprocket feed holes. http://onsemi.com 6 2N5060 Series ORDERING & SHIPPING INFORMATION: 2N5060 Series packaging options, Device Suffix U.S. 2N5060,61,62,64 2N5060,61,62,64RLRA 2N5060,64RLRM Europe Equivalent Shipping Description of TO92 Tape Orientation 2N5060RL1 Bulk in Box (5K/Box) Radial Tape and Reel (2K/Reel) Radial Tape and Fan Fold Box (2K/Box) N/A, Bulk Round side of TO92 and adhesive tape visible Flat side of TO92 and adhesive tape visible PACKAGE DIMENSIONS TO-92 (TO-226AA) CASE 029-11 ISSUE AJ A NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. B R P L SEATING PLANE K DIM A B C D G H J K L N P R V D X X G J H V C SECTION X-X 1 N N INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 --- 0.250 --- 0.080 0.105 --- 0.100 0.115 --- 0.135 --- STYLE 10: PIN 1. CATHODE 2. GATE 3. ANODE http://onsemi.com 7 MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 --- 6.35 --- 2.04 2.66 --- 2.54 2.93 --- 3.43 --- 2N5060 Series ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. 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