EVAL-ADuM4122EBZ User Guide
UG-1440
One Technology Way P. O. Box 9106 Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 Fax: 781.461.3113 www.analog.com
Evaluating the ADuM4122 Single Gate Adjustable Slew Rate Isolated Gate Driver,
3 A Short Circuit (<3 Ω)
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 7
FEATURES
3 A short-circuit output capability
Output power device resistance: <3 Ω
Output voltage range to 35 V
Output and input undervoltage lockout (UVLO)
Pad placement for multiple switch types
Pad placement for external series gate resistors
Screw terminals for easy connectivity
Placement for capacitive load testing
Jumpers for easy slew rate setting
EVALUATION KIT CONTENTS
EVAL-ADuM4122EBZ evaluation board
EQUIPMENT NEEDED
Suggested test equipment
Primary side power supply: 0 V to 6 V at 100 mA
Secondary side supply: 0 V to 35 V at 250 mA
Square wave generator: 0 V to 5 V
DOCUMENTS NEEDED
ADuM4122 data sheet
GENERAL DESCRIPTION
The E VA L -ADuM4122EBZ evaluation board supports the
ADuM4122 isolated gate driver with slew rate control.
iCoupler® technology provides isolation between the
ADuM4122 input signal and the output gate driver. The
evaluation board supplies jumpers and screw terminals to
configure different drive conditions. The E VA L -
ADuM4122EBZ board operates with square waves and dc
values on the VIN+ and SRC pins.
The ADuM4122 is operational with voltages of up to 35 V.
Logic level voltages at the VIN+ pin control the VOUT output. The
SRC pin controls whether the VOUT_SRC pin is either set to high-Z
or follows the logic of the user supplied pulse-width modulation
(PWM) input at VIN+. When the external series gate resistors
combine the outputs from the VOUT and VOUT_SRC pins, one isolated
gate driver is then able to have two easily selectable slew rates.
The E VA L -ADuM4122EBZ board tests the propagation delay,
drive strength, slew rate selection, and input logic of the device.
Refer to the ADuM4122 data sheet for complete information about
the ADuM4122, and consult the data sheet in conjunction with this
user guide when using the evaluation board.
EVALUATION BOARD PHOTOGRAPH
17217-001
Figure 1.
UG-1440 EVAL-ADuM4122EBZ User Guide
Rev. 0 | Page 2 of 7
TABLE OF CONTENTS
Features .............................................................................................. 1
Evaluation Kit Contents ................................................................... 1
Equipment Needed ........................................................................... 1
Documents Needed .......................................................................... 1
General Description ......................................................................... 1
Evaluation Board Photograph ......................................................... 1
Revision History ............................................................................... 2
Evaluation Board Hardware ............................................................ 3
Initial Configuration .................................................................... 3
Pad Layout for the Device Under Test (DUT)...........................3
Setting Up the EVAL-ADuM4122EBZ Evaluation Board .......3
Power Supplies ...............................................................................4
Input and Output Connections ...................................................5
Evaluation Board Schematic and Artwork .....................................6
Ordering Information .......................................................................7
Bill of Materials ..............................................................................7
REVISION HISTORY
4/2019—Revision 0: Initial Version
EVAL-ADuM4122EBZ User Guide UG-1440
Rev. 0 | Page 3 of 7
EVALUATION BOARD HARDWARE
INITIAL CONFIGURATION
In the stock configuration (see Figure 1), the R1 to R6 resistors
are not placed on the board. The series external resistors for the
charging and discharging paths of the driven device are located
in the R1 to R6 pad locations-.
PAD LAYOUT FOR THE DEVICE UNDER TEST (DUT)
The EVA L-ADuM4122EBZ board provides placement for
supporting components to facilitate evaluation of the gate
driver. The Pad Layout for the Device Under Test (DUT)
section provides descriptions of the available pad placements.
The E VA L -ADuM4122EBZ board includes the following
available pad placements:
U1 is the footprint for the ADuM4122.
C1 and C2 are 0.1 µF bypass capacitors. C3 is a 10 µF
bypass capacitor.
TO-247, TO-252, or TO-220 metal-oxide semiconductor
field effect transistors (MOSFETs) or insulated gate bipolar
transistors (IGBTs) (see Figure 2 for the transistor footprint)
populate the Q1, Q2, and P12 pad placements. TO-252 is
placed on Q1, TO-247 is placed on Q2, and TO-220 is
placed on P12.
R1 to R6 are gate resistors that control the output edges. No
resistors are installed by default and users are recommended
to populate the resistors with low value 1206 resistors in the
1 Ω to 10 Ω range.
17217-002
Figure 2. IGBT/MOSFET Footprint
SETTING UP THE EVAL-ADUM4122EBZ
EVALUATION BOARD
Complete the following steps before initial use to prepare the
evaluation board for operation:
1. Depending on the load being driven, use the 1206 surface-
mount resistors pads to select the appropriate drive
strength. The recommended values are approximately
between 1 Ω and 10 Ω.
2. The R1 to R3 resistors are between the P11 jumper pins
and the VOUT pin. R4 to R6 are between P11 and the
VOUT_SRC pin. Place a jumper in P11 to combine the two
outputs pins, VOUT and VOUT_SRC, at the gate of the user
supplied power device. If the jumper at P11 is removed, the
C4 and C5 capacitor pad placements provide land patterns
for placing a capacitor load to simulate gate capacitance.
3. The R7 to R10 resistors enable bipolar voltage configurations.
Populate R9 and/or R10 with a 0 Ω resistor when the source or
emitter of the driven power device is referenced to GND2, a
unipolar configuration. If a bipolar voltage configuration is
desired, construct Zener networks in R7 to R10 according to
the directions from the Analog Dialogue article, Driving a
Unipolar Gate Driver in a Bipolar Way.
4. Either place an IGBT or MOSFET in the provided Q1, Q2,
or P12 landing patterns to evaluate gate driver performance
on the given power device. P9 and P10 allow shorting
across the external resistors of the series to observe
overshoot and to probe the voltage to quantify peak currents.
5. The R11 and R12 resistors terminate the inputs, VIN+ and SRC
with 50 Ω loads. The P4 jumper pin and the P6 jumper pin
connect R11 and R12, but when R11 and R12 are not
connected, the evaluation board accepts high impedance,
input generator signals from an external source (see Figure 3).
17217-003
Figure 3. 50 Ω Terminated (Left) and High Impedance (Right)
6. Either pins or screw terminals are viable as connection
mechanisms. The screw terminals connect wires for
long-term measurements, but are not recommended for
connecting driven devices.
UG-1440 EVAL-ADuM4122EBZ User Guide
Rev. 0 | Page 4 of 7
7. P3 and P5 tie the VIN+ and SRC pins to VDD1 or GND1 for
faster dc evaluation setups (see Figure 4, Figure 5, and
Figure 6). If using P3 or P5, do not drive the pin that is
connected by a jumper to an external signal generator.
17217-004.
Figure 4. P3 and P5 Configured for Screw Terminal Input
17217-005
Figure 5. P3 and P5 Configured to Connect Inputs to VDD1
17217-006
Figure 6. P3 and P5 Configured to Connect Inputs to GND1
POWER SUPPLIES
Adhere to the following steps to connect the E VA L -
ADuM4122EBZ board to a power supply:
1. Connect the input VDD1 supply (3.3 V to 5.5 V) to the VDD1
and GND1 pins (see Figure 7).
2. Connect the input VDD2 supply (4.5 V to 35 V) to the VDD2
and GND2 pins (see Figure 7).
VDD1
SUPPLY VDD2
SUPPLY
17217-007
Figure 7. Power Supply Connections
GND1 and GND2 are isolated from each other. The emitter or
source of the IGBT and MOSFET is connected to GND2.
EVAL-ADuM4122EBZ User Guide UG-1440
Rev. 0 | Page 5 of 7
INPUT AND OUTPUT CONNECTIONS
The VIN+ and SRC pins are complementary metal-oxide
semiconductor (CMOS) inputs. The SRC pin chooses whether
the extra drive power provided by the VOUT_SRC pin is available at
the output. SRC is active low, and an extra boost on the output
is available when SRC is held low.
The E VA L -ADuM4122EBZ board comes with screw terminals
for both the input and output connections. The screw terminals
facilitate connection options (soldering vs. hook clamps) but are
not recommended for high performance transient testing. The
most accurate measurements conducted on the load, whether
through the IGBT, MOSFET, or load capacitor, come from small
loop measurements performed on the load. When conducting
measurements on the load, whether through the IGBT,
MOSFET, or load capacitor, small loop measurements are
recommended for the best results. Using the screw terminals as
either the sensing node or load connection often results in
measurement overshoot.
UG-1440 EVAL-ADuM4122EBZ User Guide
Rev. 0 | Page 6 of 7
EVALUATION BOARD SCHEMATIC AND ARTWORK
3
1
2
4
8
7
6
5
ADuM4122
VDD1
VIN+
GND1
VDD2
VOUT
GND2
G
2
2
2
22
1
11
11
R6
R5 R4
E/S
GATE
C/D
GATE
C/D
C
EE/S
P10
C2 C3
Q1, Q2, P12
C1
VDD1
GND1
P5
VDD1
R12
P5
P6
VDD1
GND1
P8
VDD2
GND2
SRC VOUT_SRC
VIN+
SRC P3
VDD1
R11
P6 P4
R3
R1 R2
P10
P11
C5
C4
VDD2
GND2
P7 VDD2
R10 R7
R9 R8
VDD2
1
17217-008
Figure 8. Schematic of the EVAL-ADuM4122EBZ Evaluation Board
Figure 9. EVAL-ADuM4122EBZ Evaluation Board Top Layer
Figure 10. EVAL-ADuM4122EBZ Evaluation Board Bottom Layer
EVAL-ADuM4122EBZ User Guide UG-1440
Rev. 0 | Page 7 of 7
ORDERING INFORMATION
BILL OF MATERIALS
Table 1.
Reference Designator Description/Value Manufacturer Part Number
U1 ADuM4122 Analog Devices, Inc. ADuM4122ARIZ
R9 Resistor, 0 Ω, 1206 Not applicable Not applicable
R11, R12 Resistor, 49.9 Ω, 1206 Not applicable Not applicable
C1, C2 Capacitor, 0.1 µF, 25 V, 10%, 1206 Not applicable Not applicable
C3 Capacitor, 10 µF, 50 V, 10%, 1206 Not applicable Not applicable
R1 to R8, R10, Q1, Q2, P12, C4, C5 Not installed Not applicable Not applicable
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
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owners. UG17217-0-4/19(0)