120
DATA SHEE
T
ARRAY
CHIP RESISTORS
YC324 (8Pin/4R)
5%, 1%
sizes 4 × 1206
RoHS complian
t
Product specification – Oct 01, 2008 V.2 Supersedes Date of Mar. 06, 2003
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
2
8
Y
YA
AG
GE
EO
O
B
BR
RA
AN
ND
D
o
or
rd
de
er
ri
in
ng
g
c
co
od
de
e
GLOBAL PART NUMBER (PREFERRED)
YC324 – X X X XX XXXX L
(1) (2) (3) (4) (5) (6)
(1) TOLERANCE
F = ±1%
J = ±5% (for Jumper ordering, use code of J)
(2) PACKAGING TYPE
K = Embossed taping reel
(3) TEMPERATURE COEFFICIENT OF RESISTANCE
– = Base on spec
(4) TAPING REEL
07 = 7 inch dia. Reel
(5) RESISTANCE VALUE
There are 2~4 digits indicated the resistor value. Letter R/K/M is decimal point, no need
to mention the last zero after R/K/M, e.g.1K2, not 1K20.
Detailed resistance rules show in table of “Resistance rule of global part number”.
(6) OPTIONAL CODE
L = optional symbol (Note)
ORDERING INFORMATION
-
GLOBAL PART NUMBER
Both part numbers are identified by the series, size, tolerance, packing
type, temperature coefficient, taping reel and resistance value.
SCOPE
This specification describes
YC324 series chip resistor arrays
with lead-free terminations made
by thick film process.
APPLICATIONS
Terminal for SDRAM and
DDRAM
Computer applications: laptop
computer, desktop computer
Consume electronic equipment:
PDAs, PNDs
Mobile phone, telecom…
FEATURES
RoHS compliant
- Products with lead free
terminations meet RoHS
requirements
- Pb-glass contained in electrodes
- Resistor element and glass are
exempted by RoHS
Reducing environmentally
hazardous wastes
High component and equipment
reliability
Saving of PCB space
None forbidden-materials used
in products/production
Halogen Free Epoxy
ORDERING EXAMPLE
The ordering code of a YC324
convex chip resistor array, value
1,000 X with ±5% tolerance,
supplied in 7-inch tape reel is:
YC324-JK-071K(L).
NOTE
1. All our RSMD products meet RoHS
compliant. "LFP" of the internal 2D reel
label mentions "Lead Free Process"
2. On customized label, "LFP" or specific
symbol printed and the optional "L" at
the end of GLOBAL PART NUMBER
Resistance rule of
global part
number
Resistance code rule
Example
0R 0R = Jumpe
r
XRXX
(1 to 9.76 Ω)
1R = 1 Ω
1R5 = 1.5 Ω
9R76 = 9.76 Ω
XXRX
(10 to 97.6 Ω)
10R = 10 Ω
97R6 = 97.6 Ω
XXXR
(100 to 976 Ω) 100R = 100 Ω
XKXX
(1 to 9.76 KΩ)
1K = 1,000 Ω
9K76 = 9760 Ω
XMXX
(1 to 9.76 MΩ)
1M = 1,000,000 Ω
9M76= 9,760,000 Ω
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
3
8
P
PH
HY
YC
CO
OM
MP
P
B
BR
RA
AN
ND
D
o
or
rd
de
er
ri
in
ng
g
c
co
od
de
es
s
Both GLOBAL PART NUMBER (preferred) and 12NC (traditional) codes are acceptable to order Phycomp
brand products.
GLOBAL PART NUMBER (PREFERRED)
For detailed information of GLOBAL PART NUMBER and ordering example, please refer to page 2.
Resistance decade (3) Last digit
0.01 to 0.0976 X 0
0.1 to 0.976 X 7
1 to 9.76 X 8
10 to 97.6 X 9
100 to 976 X 1
1 to 9.76 KX 2
10 to 97.6 KX 3
100 to 976 KX 4
1 to 9.76 MX 5
10 to 97.6 MX 6
Example: 0.02
X = 0200 or 200
0.3 X = 3007 or 307
1
X = 1008 or 108
33 KX = 3303 or 333
10 MX = 1006 or 106
Last digit of 12NC
(1) The resistors have a 12-digit ordering code starting with 2350.
(2) The subsequent 4 or 5 digits indicate the resistor tolerance and
packaging.
(3) The remaining 4 or 3 digits represent the resistance value with the
last digit indicating the multiplier as shown in the table of
“Last digit of 12NC”.
(4) "L" is optional symbol (Note).
ORDERING EXAMPLE
The ordering code of a YC324 resistor, value 1,000 X with ±5%
tolerance, supplied in tape of 4,000 units per reel is: 235003910102(L)
or YC324-JK-071K(L).
NOTE
1. All our RSMD products are RoHS compliant. "LFP" of the internal 2D reel label mentions "Lead Free Process"
2. On customized label, "LFP" or specific symbol printed and the optional "L" at the end of GLOBAL PART
NUMBER / 12NC can be added (both are on customer request)
12NC CODE
2350 XXX XXXXX L
(1) (2) (3) (4)
EMBOSSED TAPE ON REEL (units) (2)
TYPE/
1220
START
IN (1)
TOL.
(%)
RESISTANCE
RANGE
4,000
YC324
2350 ±5% 10 to 1 MΩ 039 10xxx
YC324
2350 ±1% 10 to 1 MΩ 029 1xxxx
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
4
8
CONSTRUCTION
The resistor is constructed on top
of a high-grade ceramic body.
Internal metal electrodes are added
on each end to make the contacts to
the thick film resistive element. The
composition of the resistive element
is a noble metal imbedded into a
glass and covered by a second glass
to prevent environment influences.
The resistor is laser trimmed to the
rated resistance value. The resistor
is covered with a protective epoxy
coat, finally the two external
terminations (matte tin on Ni-
barrier) are added. See fig.2
O
OU
UT
TL
LI
IN
NE
ES
S
overcoat
resistive layer
inner electrode
termination
ceramic substrate
YNSC069
Fig. 2
Chip resistor outlines
MARKING
YC324
E-24 series: 3 digits
First two digits for significant figure and 3rd digit for number of zeros
For further marking information, please see special data sheet “Chip resistors marking”
Fig. 1 Value = 240 KΩ
YNSC031
2
DIMENSIONS
TYPE YC324
B (mm) 0.50 ±0.20
H (mm) 1.10 ±0.15
P (mm) 1.27 ±0.05
L (mm) 5.08 ±0.20
T (mm) 0.60 ±0.10
W1 (mm) 0.50 ±0.15
W2 (mm) 3.20 ±0.20
Table 1
handbook, 4 columns
CCB257_b
Ha
a
P
L
B
T
W1
W2
Fig. 3
Y
C324
series chip resistors
dimension
For dimension see Table
1
SCHEMATIC
handbook, 2 columns
R1 R2 R3 R4
CCA862_c
12
87
3
6
4
5
Fig. 4 Equivalent circuit diagram
R1=R2=R3=R4
For dimension see Fig. 3 and Table 1
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
5
8
FOOTPRINT AND SOLDERING
PROFILES
For recommended footprint and
soldering profiles, please see the
special data sheet “Chip resistors
mounting”.
MLB206_2
70 10055 50
T
amb( C)
o
(%P )
rated
0
0
50
100
155
P
handbook, halfpage
FUNCTIONAL DESCRIPTION
P
PO
OW
WE
ER
R
R
RA
AT
TI
IN
NG
G
YC 324 rated power at 70 °C is 1/8 W
RATED VOLTAGE
The DC or AC (rms) continuous working voltage
corresponding to the rated power is determined by
the following formula:
V=√(P X R)
or max. working voltage whichever is less
Where
V=Continuous rated DC or
AC (rms) working voltage (V)
P=Rated power (W)
R=Resistance value (X)
Fig. 5
Maximum dissipation (P) in percentage of rated power as a
function of the operating ambient temperature (Tamb)
PACKING STYLE AND P
A
CKAGING QUANTITY
PRODUCT TYPE PACKING STYLE REEL DIMENSION QUANTITY PER REEL
YC324 Embossed taping reel (K) 7" (178 mm) 4,000 units
NOTE
1. For embossed tape and reel specification/dimensions, please see the special data sheet “Chip resistors packing”.
Table 3 Packing style and packaging quantity
ELECTRICAL CHARACTERISTICS
CHARACTERISTICS YC324 1/8 W
Operating Temperature Range –55 °C to +155 °C
Maximum Working Voltage 200 V
Maximum Overload Voltage 500 V
Dielectric Withstanding Voltage 500 V
Number of Resistors 4
5% (E24) 10 Ω to 1 MΩ
Resistance Range 1% (E24/E96) 10 Ω to 1 MΩ
Temperature Coefficient ±200 ppm/°C
Table 2
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
6
8
TESTS AND REQUIREMENTS
TEST TEST METHOD PROCEDURE REQUIREMENTS
Life/
Operational Life/
Endurance
MIL-STD-202G-method 108A
IEC 60115-1 4.25.1
JIS C 5202-7.10
1,000 hours at 70±5 °C applied RCWV
1.5 hours on, 0.5 hour off, still air required
±(2%+0.05 Ω)
High
Temperature
Exposure/
Endurance at
upper category
temperature
MIL-STD-202G-method 108A
IEC 60115-1 4.25.3
JIS C 5202-7.11
1,000 hours at maximum operating temperature
depending on specification, unpowered
No direct impingement of forced air to the parts
Tolerances: 155±3 °C
±(1%+0.05 Ω)
Moisture
Resistance
MIL-STD-202G-method 106F
IEC 60115-1 4.24.2
Each temperature / humidity cycle is defined at 8
hours (method 106F), 3 cycles / 24 hours for 10d
with 25 °C / 65 °C 95% R.H, without steps 7a &
7b, unpowered
Parts mounted on test-boards, without
condensation on parts
Measurement at 24±2 hours after
test conclusion
±(2%+0.05 Ω)
Thermal Shock MIL-STD-202G-method 107G -55/+155 °C
Note: Number of cycles required is 300. Devices
unmounted
Maximum transfer time is 20 seconds. Dwell time
is 15 minutes. Air – Air
±(0.5%+0.05 Ω) for 10 KΩ to
10 MΩ
±(1%+0.05 Ω) for others
Short time
overload
MIL-R-55342D-para 4.7.5
IEC60115-1 4.13
2.5 times RCWV or maximum overload voltage
whichever is less for 5 sec at room temperature
±(2%+0.05 Ω)
No visible damage
Board Flex/
Bending
IEC60115-1 4.33
Device mounted on PCB test board as described,
only 1 board bending required
3 mm bending
Bending time: 60±5 seconds
Ohmic value checked during bending
±(1%+0.05 Ω)
No visible damage
Table 4 Test condition, procedure and requirements
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
7
8
TEST TEST METHOD PROCEDURE REQUIREMENTS
Solderability
- Wetting
IPC/JEDECJ-STD-002B test B
IEC 60068-2-58
Electrical Test not required
Magnification 50X
SMD conditions:
1st step: method B, aging 4 hours at 155 °C
dry heat
2nd step: leadfree solder bath at 245±3 °C
Dipping time: 3±0.5 seconds
Well tinned (≥95% covered)
No visible damage
- Leaching IPC/JEDECJ-STD-002B test D
IEC 60068-2-58
Leadfree solder, 260 °C, 30 seconds
immersion time
No visible damage
- Resistance to
Soldering Heat
MIL-STD-202G-method 210F
IEC 60068-2-58
Condition B, no pre-heat of samples
Leadfree solder, 270 °C, 10 seconds
immersion time
Procedure 2 for SMD: devices fluxed and
cleaned with isopropanol
±(1%+0.05 Ω)
No visible damage
SERIES
YC
324 (RoHS Compliant)
Chip Resistor Surface Mount
w
ww.yageo.com
Oc
t
01, 2008 V.2
Product specification
8
8
REVISION HISTORY
“ Yageo reserves all the rights for revising the content of this datasheet without further notification, as long as the products itself are unchanged. Any
product change will be announced by PCN.”
REVISION DATE CHANGE NOTIFICATION DESCRIPTION
Version 2 Oct 01, 2008 - - Change to dual brand datasheet that describes YC324 with RoHS
compliant
- Description of "Halogen Free Epoxy" added
- Define global part number
Version 1 Feb 22, 2005 - - Test method and procedure updated
Version 0 Nov 10, 2003 - - First issue of PbFree specification
