VND5T016ASP-E Double channel high side driver with analog CurrentSense for 24 V automotive applications Datasheet - production data Features Max transient supply voltage VCC 58 V Operating voltage range VCC 8 to 36 V Typ ON-state resistance (per ch.) RON 16 m Current limitation (typ) ILIM 70 A IS 2 A(1) OFF-state supply current 1. Typical value with all loads connected. * General - Very low standby current - 3.0 V CMOS compatible input - Optimized electromagnetic emission - Very low electromagnetic susceptibility - Compliance with European directive 2002/95/EC - Fault reset standby pin (FR_Stby) * Diagnostic functions - Proportional load current sense - Current sense precision for wide range currents - Off state open load detection - Output short to VCC detection - Overload and short to ground latch-off - Thermal shutdown latch-off - Very low current sense leakage * Protections - Undervoltage shutdown - Overvoltage clamp - Load current limitation - Self limiting of fast thermal transients - Protection against loss of ground and loss of VCC - Thermal shutdown - Reverse battery protected with self switch of the PowerMOS - Electrostatic discharge protection February 2016 This is information on a product in full production. PowerSO-16 Application * All types of resistive, inductive and capacitive loads Description The VND5T016ASP-E is a device made using STMicroelectronics(R) VIPower(R) technology, intended for driving resistive or inductive loads with one side connected to ground. Active VCC pin voltage clamp protects the device against low energy spikes. This device integrates an analog current sense which delivers a current proportional to the load current. Fault conditions such as overload, overtemperature or short to VCC are reported via the current sense pin. Output current limitation protects the device in overload condition. The device will latch off in case of overload or thermal shutdown. The device is reset by a low level pass on the fault reset standby pin. A permanent low level on the inputs and fault reset standby pin disables all outputs and sets the device in standby mode. DocID022687 Rev 4 1/31 www.st.com Contents VND5T016ASP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2.5 Maximum demagnetization energy (VCC = 24 V) . . . . . . . . . . . . . . . . . . . 21 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3.1 4 PowerSO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.1 ECOPACK(R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.2 PowerSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 2/31 DocID022687 Rev 4 VND5T016ASP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Table 13. Table 14. Table 15. Table 16. Table 17. Table 18. Pin function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Switching (VCC = 24V; Tj = 25C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Current sense (8 V < VCC < 36 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Openload detection (FR_Stby = 5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 PowerSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 DocID022687 Rev 4 3/31 3 List of figures VND5T016ASP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. 4/31 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 treset definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 tstby definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Output stuck to VCC detection delay time at FR_Stby activation . . . . . . . . . . . . . . . . . . . . 14 Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Open-load off-state delay timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Delay response time between rising edge of output current and rising edge of current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 PowerSO-16 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 22 PowerSO-16 thermal impedance junction ambient single pulse (one channel ON) . . . . . . 23 Thermal fitting model of a double channel HSD in PowerSO-16 . . . . . . . . . . . . . . . . . . . . 23 PowerSO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 PowerSO-16 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSO-16 tape and reel shipment (suffix "TR") . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 PowerSO-16 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 DocID022687 Rev 4 VND5T016ASP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram 9&& 5HYHUVH %DWWHU\ 3URWHFWLRQ 6LJQDO&ODPS 8QGHUYROWDJH ,1 &RQWURO 'LDJQRVWLF &RQWURO 'LDJQRVWLF 3RZHU &ODPS '5,9(5 ,1 &+ 921 /LPLWDWLRQ 2YHU WHPSHUDWXUH &XUUHQW /LPLWDWLRQ 2))6WDWH 2SHQORDG )5B6WE\ 9 6(16(+ &6 &XUUHQW 6HQVH &+ &6 287 /2*,& 287 29(5/2$'3527(&7,21 $&7,9(32:(5/,0,7$7,21 *1' ("1($'5 Table 1. Pin function Name VCC Function Battery connection OUTn Power output GND Ground connection INn Voltage controlled input pin with hysteresis, CMOS-compatible; they control output switch state CSn Analog current sense pin, they deliver a current proportional to the load current FR_Stby In case of latch-off for overtemperature/overcurrent condition, a low pulse on the FR_Stby pin is needed to reset the channel. The device enters in standby mode if all inputs and the FR_Stby pin are low. DocID022687 Rev 4 5/31 30 Block diagram and pin description VND5T016ASP-E Figure 2. Configuration diagram (top view) 9 10 11 12 13 14 15 16 IN1 CS1 NC FR_Stby GND NC CS2 IN2 8 7 6 5 4 3 2 1 OUT1 OUT1 OUT1 OUT1 OUT2 OUT2 OUT2 OUT2 17 VCC Table 2. Suggested connections for unused and not connected pins Connection / pin Current Sense N.C. Output Input FR_Stby Floating Not allowed X(1) X X X To ground Through 10 k resistor X Not allowed Through 10 k resistor Through 10 k resistor 1. X: do not care. 6/31 DocID022687 Rev 4 VND5T016ASP-E 2 Electrical specifications Electrical specifications Figure 3. Current and voltage conventions IS VCC VCC VFn IFR_Stby OUTn FR_Stby VFR_Stby IOUTn VOUTn ISENSEn IINn CSn INn VINn VSENSEn GND IGND 2.1 Absolute maximum ratings Stressing the device above the ratings listed in Table 3 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to the conditions reported in this section for extended periods may affect device reliability. Table 3. Absolute maximum ratings Symbol Parameter Value Unit VCC DC supply voltage 58 V -VCC Reverse DC supply voltage 32 V IOUT DC output current Internally limited A -IOUT Reverse DC output current 45 A DC input current -1 to 10 mA Fault reset standby DC input current -1 to 1.5 mA VCC-58 to +VCC V IIN IFR_Stby VCSENSE Current sense maximum voltage EMAX Maximum switching energy (L = 11 mH; Vbat = 32 V; Tjstart = 150C; IOUT = 5.3 A) 320 mJ LSMAX Maximum stray inductance in short circuit condition RL = 300 m; VBAT = 32 V; Tjstart = 150C; IOUT = IlimH_max 40 H DocID022687 Rev 4 7/31 30 Electrical specifications VND5T016ASP-E Table 3. Absolute maximum ratings (continued) Symbol Value Unit VESD Electrostatic discharge (Human Body Model: R = 1.5 K; C = 100 pF) - INPUT - CURRENT SENSE - FAULT RESET STANDBY PIN - OUTPUT - VCC 4000 2000 4000 5000 5000 V V V V V VESD Charge device model (CDM-AEC-Q100-011) 750 V Junction operating temperature -40 to 150 C Storage temperature -55 to 150 C Value Unit 0.9 C/W See Figure 26 C/W Tj Tstg 2.2 Parameter Thermal data Table 4. Thermal data Symbol Parameter Rthj-case Thermal resistance junction-case (Max.) (with one channel ON) Rthj-amb 8/31 Thermal resistance junction-ambient (Max.) DocID022687 Rev 4 VND5T016ASP-E 2.3 Electrical specifications Electrical characteristics 8 V < VCC < 36 V; -40C < Tj < 150C, unless otherwise specified. Table 5. Power section Symbol Parameter VCC Operating supply voltage VUSD VUSDhyst RON RON REV Vclamp IS IL(off1) Test conditions Min. Typ. Max. Unit 8 24 36 V Undervoltage shutdown 3.5 5 V Undervoltage shutdown hysteresis 0.5 On state resistance(1) IOUT = 5 A; Tj = 25C; 8 V < VCC < 36 V V 16 m IOUT = 5 A; Tj = 150C; 8 V < VCC < 36 V 32 Reverse battery ON state resistance VCC = -24 V; IOUT = -5 A; Tj = 25C 16 m Clamp voltage IS = 20 mA 64 70 V Off-state; VCC = 24 V; Tj = 25C; VIN = VOUT = VSENSE = 0 V 2(2) 5 A On-state; VCC = 24 V; VIN = 5 V; IOUT = 0 A 4.5 6.5 mA 0.01 3 Supply current Off state output current 58 VIN = VOUT = 0 V; VCC = 24 V; Tj = 25C 0 VIN = VOUT = 0 V; VCC = 24 V; Tj = 125C 0 A 5 1. For each channel 2. PowerMOS leakage included. Table 6. Switching (VCC = 24V; Tj = 25C) Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time RL = 4.8 -- 50 -- s td(off) Turn-off delay time RL = 4.8 -- 45 -- s dVOUT/dt(on) Turn-on voltage slope RL = 4.8 0.65 V/s dVOUT/dt(off) Turn-off voltage slope RL = 4.8 0.6 V/s WON Switching energy losses during twon RL = 4.8 -- 2.1 -- mJ WOFF Switching energy losses during twoff RL = 4.8 -- 0.9 -- mJ DocID022687 Rev 4 9/31 30 Electrical specifications VND5T016ASP-E Table 7. Logic inputs Symbol Parameter VIL Input low level voltage IIL Low level input current VIH Input high level voltage IIH High level input current VI(hyst) Input hysteresis voltage VICL Input clamp voltage Fault_reset_standby low level voltage IFR_Stby_L Low level fault_reset_standby current VFR_Stby_H Fault_reset_standby high level voltage IFR_Stby_H High level fault_reset_standby current (hyst) VFR_Stby_CL VIN = 0.9 V Max. Unit 0.9 V 1 A 2.1 V 10 0.25 IIN = 1 mA A V 5.5 7 V -0.7 0.9 VFR_Stby = 0.9 V A 2.1 V 10 0.25 IFR_Stby = 15 mA (10 ms) V 1 VFR_Stby = 2.1 V Fault_reset_standby hysteresis voltage Fault_reset_standby clamp voltage Typ. VIN = 2.1 V A V 11 15 V IFR_Stby = -1 mA -0.7 treset Overload latch-off reset time See Figure 5 2 24 s tstby Standby delay See Figure 4 120 1200 s Figure 4. treset definition T_reset FR_STBY IN OUTPUT CS Overload Channel 10/31 Min. IIN = -1 mA VFR_Stby_L VFR_Stby Test conditions DocID022687 Rev 4 VND5T016ASP-E Electrical specifications Figure 5. tstby definition )5B6WGE\ ,1387Q ,*1' WVWE\ WVWE\ *$3*&)7 Table 8. Protections and diagnostics Symbol Parameter Test conditions IlimH DC short circuit current IlimL Short circuit current during thermal cycling TTSD Shutdown temperature Reset temperature TRS Thermal reset of status Max. Unit 45 70 90 A 90 A VCC = 24 V; TR < Tj < TTSD Output voltage drop limitation 16 150 175 TRS + 1 TRS + 5 A 200 135 Thermal hysteresis (TTSD - TR) VDEMAG Turn-off output voltage clamp VON Typ. 5 V < VCC < 36 V TR THYST VCC = 24 V Min. IOUT = 5 A; VIN = 0; VCC - 58 VCC - 64 VCC - 70 L = 6 mH DocID022687 Rev 4 C C 7 IOUT = 500 mA C 25 C V mV 11/31 30 Electrical specifications VND5T016ASP-E Table 9. Current sense (8 V < VCC < 36 V) Symbol Test conditions Min. Typ. Max. Unit Current sense ratio drift IOUT = 12 mA to 100 mA; Ical = 50 mA; VSENSE = 0.5 V IOUT/ISENSE IOUT = 100 mA; VSENSE = 0.5 V; Tj = -40C to 150C Current sense ratio drift IOUT = 100 mA; VSENSE = 0.5 V; Tj = -40C to 150 C IOUT/ISENSE IOUT = 0.6 A; VSENSE = 1 V; Tj = -40C...150C Tj = 25C...150C Current sense ratio drift IOUT = 0.6 A; VSENSE = 1 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 1.6 A; VSENSE = 1 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 1.6 A; VSENSE = 1 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 2.4 A; VSENSE = 2 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 2.4 A; VSENSE = 2 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 3 A; VSENSE = 4 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 3 A; VSENSE = 4 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 4.2 A; VSENSE = 4 V; Tj = -40C to 150C Tj = 25C to 150C Current sense ratio drift IOUT = 4.2 A; VSENSE = 4 V; Tj = -40C to 150C IOUT/ISENSE IOUT = 20 A; VSENSE = 4 V; Tj = -40C to 150C dK6/K6(1) Current sense ratio drift IOUT = 20 A; VSENSE = 4 V; Tj = -40C to 150C -4 4 % dK/Kbulb1(TOT)(1) Current sense ratio drift IOUT = 1.6 A to 4.2 A; IOUTCAL = 3 A; VSENSE = 2 V -15 50 % dK/Kbulb2(TOT)(1) Current sense ratio drift IOUT = 0.6 A to 2.4 A; IOUTCAL = 1.2 A; VSENSE = 2 V -30 25 % IOUT = 0 A; VSENSE = 0 V; VIN = 0 V; Tj = -40C to 150C 0 1 IOUT = 0 A; VSENSE = 0 V; VIN = 5 V; Tj = -40C to 150C 0 dKled/Kled(TOT)(1) K0 dK0/K0(1) K1 dK1/K1(1) K2 dK2/K2(1) K3 dK3/K3(1) K4 dK4/K4(1) K5 dK5/K5(1) K6 ISENSE0 12/31 Parameter Analog sense leakage current DocID022687 Rev 4 -50 50 % 1185 5770 10760 -25 25 % 2225 8580 5350 3000 7500 -20 20 % 2935 7305 4650 3250 6200 -22 17 % 2800 6680 4200 2955 5560 -16 23 % 2850 6000 4200 3170 5270 -17 17 % 3200 5400 4200 3450 4965 -13 13 % 3940 4200 4535 A 2 VND5T016ASP-E Electrical specifications Table 9. Current sense (8 V < VCC < 36 V) (continued) Symbol Parameter Test conditions Min. Typ. Max. Unit VSENSE Max analog sense IOUT = 20 A; RSENSE = 3.9 K output voltage VSENSEH Analog sense output voltage in fault condition(2) VCC = 24 V; RSENSE = 3.9 K 8 ISENSEH Analog sense output current in fault condition(2) VCC = 24 V; VSENSE = 5 V 9 12 mA tDSENSE2H Delay response time from rising edge of INPUT pin VSENSE < 4 V; 0.5 A < IOUT < 20 A; ISENSE = 90% of ISENSE max (see Figure 7) 300 600 s tDSENSE2H Delay response time between rising edge of output current and rising edge of current sense VSENSE < 4V; ISENSE = 90% of ISENSEMAX, IOUT = 90% of IOUTMAX IOUTMAX = 5A (see Figure 10) 450 s tDSENSE2L Delay response time from falling edge of INPUT pin VSENSE < 4 V; 0.5 A < IOUT < 20 A; ISENSE=10% of ISENSE max (see Figure 7) 20 s 5 V V 5 1. Parameter guaranteed by design; it is not tested. 2. Fault condition includes: power limitation, overtemperature and open load in OFF-state condition. Table 10. Openload detection (FR_Stby = 5 V) Symbol Test conditions Min. Openload Off State voltage detection threshold VIN = 0 V; 8 V < VCC < 36 V tDSTKON Output short circuit to VCC detection delay at turn off IL(off2) td_vol VOL Parameter Max. Unit 2 4 V See Figure 8. 180 1800 s Off state output current at VOUT = 4 V VIN = 0 V; VSENSE = 0 V; VOUT rising from 0 V to 4 V -120 0 A Delay response from output rising edge to VSENSE rising edge in openload VOUT = 4 V; VIN = 0 V; VSENSE = 90% of VSENSEH; RSENSE = 3.9 K 20 s See Figure 6; Input1,2 = low 50 s Output short circuit to tDFRSTK_ON VCC detection delay at FR_Stby activation DocID022687 Rev 4 Typ. 13/31 30 Electrical specifications VND5T016ASP-E Figure 6. Output stuck to VCC detection delay time at FR_Stby activation )567%< 9VHQVH+ 9&6 W')567.B21 ,QSXW /RZ *$3*&)7 Figure 7. Current sense delay characteristics ,1387 /2$'&855(17 6(16(&855(17 W'6(16(+ W'6(16(/ *$3*&)7 Figure 8. Open-load off-state delay timing OUTPUT STUCK TO VCC VIN VOUT > VOL VSENSEH VCS tDSTKON 14/31 DocID022687 Rev 4 With FR_Stby = 5 V VND5T016ASP-E Electrical specifications Figure 9. Switching characteristics 9287 W:RQ W:RII G9287GW RII G9287GW RQ WU WI W ,1387 7G RQ 7G RII W *$3*&)7 DocID022687 Rev 4 15/31 30 Electrical specifications VND5T016ASP-E Figure 10. Delay response time between rising edge of output current and rising edge of current sense 9,1 W'6(16(+ W ,287 ,2870$; ,2870$; W ,6(16( ,6(16(0$; ,6(16(0$; W *$3*&)7 Figure 11. Output voltage drop limitation 9&&9287 7M & 7M & 7M & 921 ,287 921521 7 $*9 16/31 DocID022687 Rev 4 VND5T016ASP-E Electrical specifications Figure 12. Device behavior in overload condition WBUHVHW WBUHVHW )$8/7B5(6(7 ,1Q 287387Q 9VHQVH+ &6Q RYHUORDG RYHUORDGUHVHW RYHUORDGGLDJUHVHW 29(5/2$' &+$11(/Q 287387QDQG&6QFRQWUROOHGE\,1Q )$8/7B5(6(7IURPWRQRDFWLRQRQ&6QSLQ RYHUORDGODWFKRII,QQKLJK&6QKLJK )$8/7B5(6(7ORZ$1'7HPSFKDQQHOQRYHUORDGBUHVHWRYHUORDGODWFKUHVHWDIWHUWBUHVHW WR)$8/7B5(6(7ORZ$1',1QKLJKWKHUPDOF\FOLQJ&6QKLJK )$8/7B5(6(7KLJKODWFKRIIUHVHWGLVDEOHG WRRYHUORDGHYHQWDQG)$8/7B5(6(7KLJKODWFKRIIQRWKHUPDOF\FOLQJ WRRYHUORDGGLDJQRVWLFGLVDEOHGHQDEOHGE\WKHLQSXW RYHUORDGODWFKRIIUHVHWE\)$8/7B5(6(7 29(5/2$' WKHUPDOVKXWGRZQ25SRZHUOLPLWDWLRQ *$3*&)7 Table 11. Truth table Fault reset standby Input Output Sense Standby L L X 0 Normal operation X X L H L H 0 Nominal Overload X X L H L H 0 > Nominal Overtemperature / short to ground X L H L H H L Cycling Latched 0 VSENSEH VSENSEH Undervoltage X X L 0 Short to VBAT L H X L L H H H H 0 VSENSEH < Nominal Open load Off-state (with pull-up) L H X L L H H H H 0 VSENSEH 0 Negative output voltage clamp X L Negative 0 Conditions DocID022687 Rev 4 17/31 30 Electrical specifications VND5T016ASP-E Table 12. Electrical transient requirements (part 1) Test levels (1) ISO 7637-2: 2004(E) Number of pulses or test times Burst cycle/pulse repetition time Delays and impedance Test pulse III IV 1 - 450 V - 600 V 5000 pulses 0.5 s 5s 1 ms, 50 2a + 37 V + 50 V 5000 pulses 0.2 s 5s 50 s, 2 3a - 150 V - 200 V 1h 90 ms 100 ms 0.1 s, 50 3b + 150 V + 200 V 1h 90 ms 100 ms 0.1 s, 50 4 - 12 V - 16 V 1 pulse 100 ms, 0.01 5b (2) + 123 V + 174 V 1 pulse 350 ms, 1 1. The above test levels must be considered referred to VCC = 24.5 V except for pulse 5b 2. Valid in case of external load dump clamp: 58 V maximum referred to ground. Table 13. Electrical transient requirements (part 2) ISO 7637-2: 2004(E) Test level results Test pulse III IV 1 C C(1) 2a C C 3a C C 3b(2) E E 3b(3) C C 4 C C 5b(4) C C 1. With Rload < 24. 2. Without capacitor betweeen VCC and GND. 3. With 10 nF betweeen VCC and GND. 4. External load dump clamp, 58 V maximum, referred to ground. Table 14. Electrical transient requirements (part 3) 18/31 Class Contents C All functions of the device are performed as designed after exposure to disturbance. E One or more functions of the device are not performed as designed after exposure to disturbance and cannot be returned to proper operation without replacing the device. DocID022687 Rev 4 VND5T016ASP-E 2.4 Electrical specifications Electrical characteristics curves Figure 13. Off-state output current Figure 14. High level input current ,ORII>X$@ ,LK>X$@ 9LQ 9 2II6WDWH 9FF 9 9LQ 9RXW 7F>&@ 7F>&@ ("1($'5 Figure 15. Input clamp voltage ("1($'5 Figure 16. Input low level voltage 9LO>9@ 9LFO>9@ ,LQ P$ 7F>&@ 7F>&@ ("1($'5 Figure 17. Input high level voltage ("1($'5 Figure 18. Input hysteresis voltage 9LK\VW>9@ 9LK>9@ 7F>&@ ("1($'5 DocID022687 Rev 4 7F>&@ ("1($'5 19/31 30 Electrical specifications VND5T016ASP-E Figure 19. On-state resistance vs Tcase 5RQ>P2KP@ Figure 20. On-state resistance vs VCC 5RQ>P2KP@ 7F & 7F & ,RXW $ 9FF 9 7F & 7F & 7F>&@ 9FF>9@ ("1($'5 Figure 21. ILIMH vs Tcase ("1($'5 Figure 22. Turn-on voltage slope G9RXWGW 2Q>9XV@ ,OLPK>$@ 9FF 9 9FF 9 5O 7F>&@ ("1($'5 Figure 23. Turn-off voltage slope G9RXWGW 2II>9XV@ 9FF 9 5O 7F>&@ 20/31 ("1($'5 DocID022687 Rev 4 7F>&@ ("1($'5 VND5T016ASP-E 2.5 Electrical specifications Maximum demagnetization energy (VCC = 24 V) Figure 24. Maximum turn-off current versus inductance " $ # , $ 91'7$ 63 6LQJOH 3XOVH 5HSHWLWLYHSXOVH7MVWDUW & 5HSHWLWLYHSXOVH7MVWDUW & / P+ ("1($'5 A: Tjstart = 150C single pulse B: Tjstart = 100C repetitive pulse C: Tjstart = 125C repetitive pulse 9,1,/ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ 'HPDJQHWL]DWLRQ W *$3*&)7 Note: Values are generated with RL = 0 . In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature specified above for curves A and B. DocID022687 Rev 4 21/31 30 Package and PCB thermal data VND5T016ASP-E 3 Package and PCB thermal data 3.1 PowerSO-16 thermal data Figure 25. PowerSO-16 PC board ("1($'5 1. Layout condition of Rth and Zth measurements (board finish thickness 1.6 mm +/- 10%; board double layer; board dimension 77 mm x 86 mm; board material FR4; Cu thickness 70 m (front and back side); thermal vias separation 1.2 mm; thermal via diameter 0.3 mm +/- 0.08 mm; Cu thickness on vias 0.025 mm). Figure 26. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) 57+MBDPEYV&XKHDWVLQNDUHD 57+MDPE 57+MBDPE &: 3&%&XKHDWVLQNDUHD FPA *$3*&)7 22/31 DocID022687 Rev 4 VND5T016ASP-E Package and PCB thermal data Figure 27. PowerSO-16 thermal impedance junction ambient single pulse (one channel ON) =7+ &: &X FP &X FP &X IRRWSULQW 7LPH V ("1($'5 Figure 28. Thermal fitting model of a double channel HSD in PowerSO-16 1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded protections (power limitation or thermal cycling during thermal shutdown) are not triggered. Equation 1: pulse calculation formula Z TH = R TH + Z THtp ( 1 - ) where = tP/T DocID022687 Rev 4 23/31 30 Package and PCB thermal data VND5T016ASP-E Table 15. Thermal parameters 2 24/31 Area/island (cm ) Footprint 2 8 R1 = R7 (C/W) 0.1 R2 = R8 (C/W) 0.5 R3 (C/W) 2 R4 (C/W) 7 R5 (C/W) 12 12 8 R6 (C/W) 22 18 12 C1 = C7 (W.s/C) 0.01 C2 = C8 (W.s/C) 0.05 C3 (W.s/C) 0.5 C4 (W.s/C) 2 C5 (W.s/C) 3 4 7 C6 (W.s/C) 5 6 12 DocID022687 Rev 4 VND5T016ASP-E Package information 4 Package information 4.1 ECOPACK(R) In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK(R) packages, depending on their level of environmental compliance. ECOPACK(R) specifications, grade definitions and product status are available at: www.st.com. ECOPACK(R) is an ST trademark. 4.2 PowerSO-16 mechanical data Figure 29. PowerSO-16 package dimensions P013Q DocID022687 Rev 4 25/31 30 Package information VND5T016ASP-E Table 16. PowerSO-16 mechanical data mm Dim. Min. Typ. Max. A1 0 0.05 0.1 A2 3.4 3.5 3.6 A3 1.2 1.3 1.4 A4 0.15 0.2 0.25 a 0.2 b 0.27 0.35 0.43 c 0.23 0.27 0.32 D 9.4 9.5 9.6 D1 7.4 7.5 7.6 d 0 0.05 0.1 E (1) 13.85 14.1 14.35 E1 9.3 9.4 9.5 E2 7.3 7.4 7.5 E3 5.9 6.1 6.3 e 0.8 e1 5.6 F 0.5 G 1.2 L 0.8 1 R1 0.25 R2 T 26/31 1.1 0.8 2 5 T1 6 (typ.) T2 10 (typ.) Package weight (typ.) DocID022687 Rev 4 8 VND5T016ASP-E 4.3 Package information Packing information Figure 30. PowerSO-16 tube shipment (no suffix) Base q.ty Bulk q.ty A B C ( 0.1) Tube length ( 0.5) C A B 50 1000 4.9 17.2 0.8 532 All dimensions are in mm. Figure 31. PowerSO-16 tape and reel shipment (suffix "TR") REEL DIMENSIONS Base q.ty Bulk q.ty A (max) B (min) C ( 0.2) F G (+ 2 / -0) N (min) T (max) 600 600 330 1.5 13 20.2 24.4 60 30.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape hole spacing Component spacing Hole diameter Hole diameter Hole position Compartment depth Hole spacing W P0 ( 0.1) P D (+ 0.1/-0) D1 (min) F ( 0.05) K (max) P1 ( 0.1) All dimensions are in mm. 24 4 24 1.5 1.5 11.5 6.5 2 End Start Top No components Components No components cover tape 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed DocID022687 Rev 4 27/31 30 Package information VND5T016ASP-E Figure 32. PowerSO-16 suggested pad layout ("1($'5 28/31 DocID022687 Rev 4 VND5T016ASP-E 5 Order codes Order codes Table 17. Device summary Order codes Package PowerSO-16 Tube Tape and reel VND5T016ASP-E VND5T016ASPTR-E DocID022687 Rev 4 29/31 30 Revision history 6 VND5T016ASP-E Revision history Table 18. Document revision history 30/31 Date Revision Changes 15-Feb-2012 1 Initial release. 13-Apr-2012 2 Updated Table : Table 9: Current sense (8 V < VCC < 36 V): - renamed dKled/Kled in dKled/Kled(TOT), dK/Kbulb1 in dK/Kbulb1(TOT) and dK/Kbulb2 in dK/Kbulb2(TOT) - dK/Kbulb1(TOT), dK/Kbulb2(TOT): updated test condition 18-Sep-2013 3 Updated disclaimer. 16-Feb-2016 4 Table 4: Thermal data: - Rthj-case: updated value DocID022687 Rev 4 VND5T016ASP-E IMPORTANT NOTICE - PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST's terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers' products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. (c) 2016 STMicroelectronics - All rights reserved DocID022687 Rev 4 31/31 31