This is information on a product in full production.
February 2016 DocID022687 Rev 4 1/31
VND5T016ASP-E
Double channel high side driver with analog CurrentSense
for 24 V automotive applications
Datasheet
−
production data
Features
•General
– Very low standby current
– 3.0 V CMOS compatible input
– Optimized electromagnetic emission
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
– Fault reset standby pin (FR_Stby)
•Diagnostic functions
– Proportional load current sense
– Current sense precision for wide range
currents
– Off state open load detection
– Output short to V
CC
detection
– Overload and short to ground latch-off
– Therm al sh utdown latc h-off
– Very low current sense leakage
•Protections
– Undervoltage shutdown
– Overvoltage clamp
– Load current limitation
– Self limiting of fast thermal transients
– Protection against loss of ground and loss
of V
CC
– Therm al sh utdown
– Reverse battery protected with self switch
of the PowerMO S
– Electros tatic disc harge protection
Application
•All types of resistive, inductive and capacitive
loads
Description
The VND5T016ASP-E is a device made using
STMicroelectronics
®
VIPower
®
technology,
intended for driving resistive or inductive loads
with one side connected to ground. Active V
CC
pin voltage clamp protects the device against low
energy spikes. This device integrates an analog
current sense which delivers a current
proportional to the load current. Fault conditions
such as overload, overtemperature or short to
V
CC
are reported via the current sense pin.
Output current limitation protects the device in
overload condition. The device will latch off in
case of overload or thermal shutdown.
The device is reset by a low level pass on the fault
reset standby pin.
A permanent low level on the inputs and fault
reset standby pin disables all outputs and sets the
device in standby m ode .
Max transient supply voltage V
CC
58 V
Operati ng vol tage range V
CC
8 to 36 V
Typ ON-state resistance (per ch.) R
ON
16 mΩ
Current lim itation (typ) I
LIM
70 A
OFF- state su pply current I
S
2 µA
(1)
1. Typical value with all loads connected.
PowerSO-16
www.st.com
Contents VND5T016ASP-E
2/31 DocID022687 Rev 4
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Elect rical char acteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
2.5 Maximum demagnetization energy (V
CC
= 24 V) . . . . . . . . . . . . . . . . . . . 21
3 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.1 PowerSO-16 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.1 ECOPACK
®
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.2 PowerSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
DocID022687 Rev 4 3/31
VND5T016ASP-E List of tables
3
List of tables
Table 1. Pin function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Table 2. Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 6
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 6. Switching (VCC = 24V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 7. Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 8. Protections and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 9. Current sense (8 V < V
CC
< 36 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 10. Openload detection (FR_Stby = 5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 11. Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 12. Electrical transient requirements (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 13. Electrical transient requirements (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 14. Electrical transient requirements (part 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 16. PowerSO-16 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 17. Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 18. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
List of figures VND5T016ASP-E
4/31 DocID022687 Rev 4
List of figures
Figure 1. Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 4. t
reset
definition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. t
stby
definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 6. Output stuck to V
CC
detection delay time at FR_Stby activation . . . . . . . . . . . . . . . . . . . . 14
Figure 7. Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 8. Open-load off-state delay timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 9. Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 10. Delay response time between rising edge of output current and rising edge of
current sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 11. Output voltage drop limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 12. Device behavior in overload condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 13. Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 14. High level input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 15. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 16. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 17. Input high level voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 18. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 19. On-state resistance vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 20. On-state resistance vs V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 21. I
LIMH
vs T
case
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 22. Turn-on voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 23. Turn-off voltage slope. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 24. Maximum turn-off current versus inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 25. PowerSO-16 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 26. Rthj-amb vs PCB copper area in open box free air condition (one channel ON) . . . . . . . . 22
Figure 27. PowerSO-16 thermal impedance junction ambient single pulse (one channel ON). . . . . . 23
Figure 28. Thermal fitting model of a double channel HSD in PowerSO-16 . . . . . . . . . . . . . . . . . . . . 23
Figure 29. PowerSO-16 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 30. PowerSO-16 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 31. PowerSO-16 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 32. PowerSO-16 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
DocID022687 Rev 4 5/31
VND5T016ASP-E Block diagram and pin description
30
1 Block diagram and pin description
Figure 1. Block diagram
Table 1. Pin function
Name Function
V
CC
Battery connec ti on
OUTn Power output
GND Ground connection
INn Voltage controlled input pin with hysteresis, CMOS-compatible; they control output
switch state
CSn Analog current sense pin, they deliver a current proportional to the load current
FR_Stby In case of latch-off for overtemperature/overcurrent condition, a low pulse on the
FR_Stby pin is needed to reset the channel.
The device enters in standby mode if all inputs and the FR_Stby pin are low.
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Block diagram and pin description VND5T016ASP-E
6/31 DocID022687 Rev 4
Figure 2. Configuration diagram (top view)
Table 2. Suggested connections for unused and not connected pins
Connection / pin Current Sense N.C. Output Input FR_Stby
Floating Not allowed X
(1)
1. X: do not care.
XX X
To ground Through 10 kΩ
resistor XNot allowed
Through 10 kΩ
resistor Through 10 kΩ
resistor
1
2
3
4
5
6
7
89
10
11
V
CC
12
13
14
15
16
17
OUT2
IN1
GND
CS1
NC
FR_Stby
NC
CS2
IN2 OUT2
OUT2
OUT2
OUT1
OUT1
OUT1
OUT1
DocID022687 Rev 4 7/31
VND5T016ASP-E Electrical specifications
30
2 Electrical specifications
Fig ure 3. Cu rrent and voltage conventions
2.1 Absolute maximum ratings
Stressing the device above the ratings listed in Table 3 may cause permanent damage to
the device. These are stress ratings only and operation of the device at these or any other
conditions above those indicated in the Operating sections of this specification is not
implied. Exposure to the conditions reported in this section for extended periods may affect
device reliability.
I
S
I
GND
V
CC
V
CC
OUTn I
OUTn
CSn I
SENSEn
INn
I
INn
GND
I
FR_Stby
V
FR_Stby
V
INn
V
SENSEn
V
OUTn
V
Fn
FR_Stby
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
CC
DC supply voltage 58 V
-V
CC
Reverse DC su pply voltage 32 V
I
OUT
DC output current Internally limited A
-I
OUT
Reverse D C output current 45 A
I
IN
DC input current -1 to 10 mA
I
FR_Stby
Fault reset standby DC input current -1 to 1.5 mA
V
CSENSE
Current sense maximum voltage V
CC
-58 to
+V
CC
V
E
MAX
Maximum switching energy
(L = 11 mH; V
bat
=32V; T
jstart
=150°C; I
OUT
=5.3A) 320 mJ
L
SMAX
Maximum stray inductance in short circuit condition
R
L
=300mΩ; V
BAT
=32V; T
jstart
=150°C; I
OUT
=I
limH_max
40 µH
Electrical specifications VND5T016ASP-E
8/31 DocID022687 Rev 4
2.2 Thermal data
V
ESD
Electrostatic discharge
(Human Body Model: R = 1.5 KΩ; C=100pF)
– INPUT
– CURRENT SENSE
– FAULT RESET STANDBY PIN
– OUTPUT
–V
CC
4000
2000
4000
5000
5000
V
V
V
V
V
V
ESD
Charge device model (CDM-AEC-Q100-011) 750 V
T
j
Junction operating temperature -40 to 150 °C
T
stg
Storage temperature -55 to 150 °C
Table 3. Absolute maximum ratings (continued)
Symbol Parameter Value Unit
Table 4. Thermal data
Symbol Parameter Value Unit
R
thj-case
Thermal resis t an ce jun cti on -cas e (Ma x.) (with one channel ON) 0.9 ° C/W
R
thj-amb
Thermal resistance junction-ambient (Max.) See Figure 26 °C/W
DocID022687 Rev 4 9/31
VND5T016ASP-E Electrical specifications
30
2.3 Electrical characteristics
8V<V
CC
<36V; -40°C<T
j
< 150°C, unless otherwise specified.
Table 5.
Powe r secti on
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
CC
Operating suppl y vol tage 8 24 36 V
V
USD
Undervoltage shutdown 3.5 5 V
V
USDhyst
Undervoltage shutdown
hysteresis 0.5 V
R
ON
On state resistance
(1)
1. For each channel
I
OUT
= 5 A; T
j
= 25°C;
8V<V
CC
<36V 16 mΩ
I
OUT
= 5 A; T
j
=150°C;
8V<V
CC
<36V 32
R
ON REV
Reverse battery ON
state resistance V
CC
=-24V; I
OUT
=-5A;
T
j
=25°C 16 mΩ
V
clamp
Clamp voltage I
S
=20mA 58 64 70 V
I
S
Supply current
Of f-state ; V
CC
=24V; T
j
= 25°C;
V
IN
=V
OUT
=V
SENSE
=0V 2
(2)
2. PowerMOS leakage included.
5µA
On-s tat e; V
CC
=24V; V
IN
=5V;
I
OUT
=0A 4.5 6.5 mA
I
L(off1)
Off state output current
V
IN
=V
OUT
=0V; V
CC
=24V;
T
j
=25°C 00.013 µA
V
IN
=V
OUT
=0V; V
CC
=24V;
T
j
= 125°C 05
Table 6. Switching (V
CC
= 24V; T
j
=25°C)
Symbol Parameter Test conditions Min. Typ. Max. Unit
t
d(on)
Turn-on del ay time R
L
=4.8Ω—50—µs
t
d(off)
Turn-off delay time R
L
=4.8Ω—45—µs
dV
OUT
/dt
(on)
Turn-on vol t ag e slo pe R
L
=4.8Ω0.65 V/µs
dV
OUT
/dt
(off)
Turn-off voltage slope R
L
=4.8Ω0.6 V/µs
W
ON
Switching energy losses duri ng t
won
R
L
=4.8Ω—2.1—mJ
W
OFF
Switching energy losses duri ng t
woff
R
L
=4.8Ω—0.9—mJ
Electrical specifications VND5T016ASP-E
10/31 DocID022687 Rev 4
Figure 4. t
reset
definition
Table 7. Logic inputs
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
IL
Input low level voltage 0.9 V
I
IL
Low level input current V
IN
=0.9V 1 µA
V
IH
Input high level voltage 2.1 V
I
IH
High level input current V
IN
=2.1V 10 µA
V
I(hyst)
Input hysteresis voltage 0.25 V
V
ICL
Input cl amp voltage I
IN
=1mA 5.5 7 V
I
IN
=-1mA -0.7
V
FR_Stby_L
Fault_reset_standby low
level voltage 0.9 V
I
FR_Stby_L
Low level
fault_reset_standby
current V
FR_Stby
=0.9V 1 µA
V
FR_Stby_H
Fault_reset_standby high
level voltage 2.1 V
I
FR_Stby_H
High level
fault_reset_standby
current V
FR_Stby
=2.1V 10 µA
V
FR_Stby
(hyst)
Fault_reset_standby
hysteresis voltage 0.25 V
V
FR_Stby_CL
Fault_reset_standby
clamp voltage I
FR_Stby
=15mA (10ms) 11 15 V
I
FR_Stby
=-1mA -0.7
t
reset
Overload latch-off reset
time See Figure 5 224µs
t
stby
Standby delay See Figure 4 120 1200 µs
FR_STBY
IN
OUTPUT
CS
Overload
Channel
T_reset
FR_STBY
IN
OUTPUT
CS
Overload
Channel
T_reset
DocID022687 Rev 4 11/31
VND5T016ASP-E Electrical specifications
30
Figure 5. t
stby
definition
Table 8. Protections and diagnostics
Symbol Parameter Test conditions Min. Typ. Max. Unit
I
limH
DC short circuit current V
CC
= 24 V 45 70 90 A
5V<V
CC
<36V 90 A
I
limL
Short circuit current during
ther mal cyclin g V
CC
=24V;
T
R
<T
j
<T
TSD
16 A
T
TSD
Shutdown temperature 150 175 200 °C
T
R
Reset temperature T
RS
+1 T
RS
+5 °C
T
RS
Thermal res et of status 13 5 °C
T
HYST
Thermal hysteresis (T
TSD
-T
R
)7°C
V
DEMAG
Turn-off output voltage clamp I
OUT
= 5 A; V
IN
=0;
L=6mH V
CC
-58 V
CC
-64 V
CC
-70 V
V
ON
Output voltage drop limitation I
OUT
= 500 mA 25 mV
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Electrical specifications VND5T016ASP-E
12/31 DocID022687 Rev 4
Table 9. Current sense (8 V < V
CC
<36V)
Symbol Parameter Test conditions Min. Typ. Max. Unit
dK
led
/K
led(TOT)(1)
Current sense
ratio drift I
OUT
= 12 mA to 100 mA;
I
cal
= 50 mA; V
SENSE
=0.5V -50 50 %
K
0
I
OUT
/I
SENSE
I
OUT
=100mA; V
SENSE
=0.5V;
T
j
= -40°C to 150°C 1185 5770 10760
dK
0
/K
0(1)
Current sense
ratio drift I
OUT
=100mA; V
SENSE
=0.5V;
T
j
= -40°C to 150 °C -25 25 %
K
1
I
OUT
/I
SENSE
I
OUT
= 0.6 A; V
SENSE
=1V;
T
j
= -40°C...150°C
T
j
= 25°C...150°C 2225
3000 5350 8580
7500
dK
1
/K
1(1)
Current sense
ratio drift I
OUT
= 0.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C -20 20 %
K
2
I
OUT
/I
SENSE
I
OUT
= 1.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 2935
3250 4650 7305
6200
dK
2
/K
2(1)
Current sense
ratio drift I
OUT
= 1.6 A; V
SENSE
=1V;
T
j
= -40°C to 150°C -22 17 %
K
3
I
OUT
/I
SENSE
I
OUT
= 2.4 A; V
SENSE
=2V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 2800
2955 4200 6680
5560
dK
3
/K
3(1)
Current sense
ratio drift I
OUT
= 2.4 A; V
SENSE
=2V;
T
j
= -40°C to 150°C -16 23 %
K
4
I
OUT
/I
SENSE
I
OUT
= 3 A; V
SENSE
=4V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 2850
3170 4200 6000
5270
dK
4
/K
4(1)
Current sense
ratio drift I
OUT
= 3 A; V
SENSE
=4V;
T
j
= -40°C to 150°C -17 17 %
K
5
I
OUT
/I
SENSE
I
OUT
= 4.2 A; V
SENSE
=4V;
T
j
= -40°C to 150°C
T
j
= 25°C to 150°C 3200
3450 4200 5400
4965
dK
5
/K
5(1)
Current sense
ratio drift I
OUT
= 4.2 A; V
SENSE
=4V;
T
j
= -40°C to 150°C -13 13 %
K
6
I
OUT
/I
SENSE
I
OUT
=20A; V
SENSE
=4V;
T
j
= -40°C to 150°C 3940 4200 4535
dK
6
/K
6(1)
Current sense
ratio drift I
OUT
=20A; V
SENSE
=4V;
T
j
= -40°C to 150°C -4 4 %
dK/K
bulb1(TOT)(1)
Current sense
ratio drift I
OUT
= 1.6 A to 4.2 A;
I
OUTCAL
= 3 A; V
SENSE
=2V -15 50 %
dK/K
bulb2(TOT)(1)
Current sense
ratio drift I
OUT
= 0.6 A to 2.4 A;
I
OUTCAL
= 1.2 A; V
SENSE
=2V -30 25 %
I
SENSE0
Analog sense
leakage current
I
OUT
= 0 A; V
SENSE
=0V;
V
IN
=0V; T
j
= -40°C to 150°C 01
µA
I
OUT
= 0 A; V
SENSE
=0V;
V
IN
=5V; T
j
= -40°C to 150°C 02
DocID022687 Rev 4 13/31
VND5T016ASP-E Electrical specifications
30
V
SENSE
Max analog sense
output voltage I
OUT
=20A; R
SENSE
=3.9KΩ5V
V
SENSEH
Analog sense
output voltage in
fault condition
(2)
V
CC
=24V; R
SENSE
=3.9KΩ8V
I
SENSEH
Analog sense
output current in
fault condition
(2)
V
CC
=24V; V
SENSE
=5V 9 12 mA
t
DSENSE2H
Delay response
time from rising
edge of INPUT
pin
V
SENSE
<4V;
0.5 A < I
OUT
<20A;
I
SENSE
=90% of I
SENSE
max
(see Figure 7)
300 600 µs
Δt
DSEN
SE
2H
Delay response
time between
rising edg e of
output current and
rising edg e of
current sense
V
SENSE
<4V;
I
SENSE
= 90% of I
SENSEMAX,
I
OUT
= 90% of I
OUTMAX
I
OUTMAX
= 5A (see Figure 10)
450 µs
t
DSENSE2L
Delay response
time from falling
edge of INPUT
pin
V
SENSE
<4V;
0.5 A < I
OUT
<20A; I
SENSE
=10%
of I
SENSE
max
(see Figure 7)
520µs
1. Parameter guaranteed by design; it is not tested.
2. Fault condition includes: power limitation, overtemperature and open load in OFF-state condition.
Table 10.
Openload dete ction
(FR_Stby = 5 V )
Symbol Parameter Test conditions Min. Typ. Max. Unit
V
OL
Openlo ad Off St at e
voltage detection
threshold V
IN
=0V; 8V<V
CC
<36V 2 4 V
t
DSTKON
Output short circuit to
VCC detection delay at
turn off See Figure 8. 180 1800 µs
I
L(off2)
Off state out put cu rrent
at V
OUT
=4V V
IN
=0V; V
SENSE
=0V;
V
OUT
rising from 0 V to 4 V -120 0 µA
t
d_vol
Delay r espon se from
output rising edge to
V
SENSE
rising edge in
openload
V
OUT
=4V; V
IN
=0V;
V
SENSE
= 90% of V
SENSEH
;
R
SENSE
=3.9KΩ
20 µs
t
DFRSTK_ON
Output short circuit to
V
CC
detection delay at
FR_Stby activation
See Figure 6;
Input
1,2
=low 50 µs
Table 9. Current sense (8 V < V
CC
< 36 V) (continued)
Symbol Parameter Test conditions Min. Typ. Max. Unit
Electrical specifications VND5T016ASP-E
14/31 DocID022687 Rev 4
Figure 6. Output stuck to V
CC
detection delay time at FR_Stby activation
Figure 7. Current sense delay characteristics
Figure 8. Open-load off-state dela y timing
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V
CS
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CC
V
OUT
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OL
V
SENSEH
With FR_Stby = 5 V
DocID022687 Rev 4 15/31
VND5T016ASP-E Electrical specifications
30
Figure 9. Switching characteristics
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Electrical specifications VND5T016ASP-E
16/31 DocID022687 Rev 4
Figure 10. Delay response time between rising edge of output c urrent and rising edge
of current sense
Figure 11. Output voltage drop limitation
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DocID022687 Rev 4 17/31
VND5T016ASP-E Electrical specifications
30
Figure 12. Device behavior in overload condition
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Table 11. Truth table
Conditions Fault reset
standby Input Output Sense
Standby L L X 0
Normal operati on X
XL
HL
H0
Nominal
Overload X
XL
HL
H0
> Nominal
Overtemperature /
short to ground
X
L
H
L
H
H
L
Cycling
Latched
0
V
SENSEH
V
SENSEH
Undervoltage X X L 0
Short to V
BAT
L
H
X
L
L
H
H
H
H
0
V
SENSEH
< Nominal
Open load Off-state
(with pull-up)
L
H
X
L
L
H
H
H
H
0
V
SENSEH
0
Negative output
voltage clamp X L Negative 0
Electrical specifications VND5T016ASP-E
18/31 DocID022687 Rev 4
Table 12. Electrical transient requirements (p art 1)
ISO 7637-2:
2004(E)
Test pulse
Test levels
(1)
1. The above test levels must be considered referred to V
CC
= 24.5 V except for pulse 5b
Number of
pulses or
test times
Burst cycle/p ulse
repetition time Delays and
impedance
III IV
1 - 450 V - 600 V 5000
pulses 0.5 s 5 s 1 ms, 50 Ω
2a + 37 V + 50 V 5000
pulses 0.2 s 5 s 50 µs, 2 Ω
3a - 150 V - 200 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
3b + 150 V + 200 V 1h 90 ms 100 ms 0.1 µs, 50 Ω
4 - 12 V - 16 V 1 pulse 100 ms, 0.01
Ω
5b
(2)
2. Valid in case of external load dump clamp: 58 V maximum referred to ground.
+ 123 V + 174 V 1 pulse 350 ms, 1
Ω
Table 13. Electrical transient requirements (part 2)
ISO 7637-2:
2004(E)
Test pulse
Test level result s
III IV
1C C
(1)
1. With R
load
< 24Ω.
2a C C
3a C C
3b
(2)
2. Without capacitor betweeen V
CC
and GND.
EE
3b
(3)
3. With 10 nF betweeen V
CC
and GND.
CC
4C C
5b
(4)
4. External load dump clamp, 58 V maximum, referred to ground.
CC
Table 14. Electrical transient requirements (part 3)
Class Contents
C All functions of the device are performed as designed after exposure to disturbance.
EOne or m ore funct ions of th e device are not pe rformed as de signed a fter exposure to
disturba nce and canno t be returne d to proper opera tion with out repla cing th e devic e.
DocID022687 Rev 4 19/31
VND5T016ASP-E Electrical specifications
30
2.4 Electrical characteristics curves
Figure 13. Off-state output current Figure 14. High level input current
Figure 15. Input clamp voltage Figure 16. Input low level voltage
Figure 17. Input high level voltage Figure 18. Input hysteresis voltage
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Electrical specifications VND5T016ASP-E
20/31 DocID022687 Rev 4
Figure 19. On-state resistance vs T
case
Figure 20. On-state resistance vs V
CC
Figure 21. I
LIMH
vs T
case
Figure 22. Turn-on voltage slope
Figure 23. Turn-off voltage slope
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DocID022687 Rev 4 21/31
VND5T016ASP-E Electrical specifications
30
2.5 Maximum demagnetization energy (V
CC
=24V)
Figure 24. Maximum turn-off current versus inductance
Note: Values are generated with R
L
=0Ω. In case of repetitive pulses, T
jstart
(at the beginning of
each demagnetization) of every pulse must not exceed the temperature specified above for
curves A and B.
C: T
jstart
= 125°C repetitive pulse
A: T
jstart
= 150°C single pulse
B: T
jstart
= 100°C repetitive pulse
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Package and PCB thermal data VND5T016ASP-E
22/31 DocID022687 Rev 4
3 Package and PCB thermal data
3.1 PowerSO-16 thermal data
Figure 25. PowerSO-16 PC board
1. Layout condition of R
th
and Z
th
measurements (board finish thickness 1.6 mm +/- 10%; board double layer;
board dimension 77 mm x 86 mm; board material FR4; Cu thickness 70 µm (front and back side); thermal
vias separation 1.2 mm; thermal via diameter 0.3 mm +/- 0.08 m m; Cu thickness on vias 0.025 mm).
Figure 26. R
thj-amb
vs PCB copper area in open box free air condition (one channel
ON)
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DocID022687 Rev 4 23/31
VND5T016ASP-E Package and PCB thermal data
30
Figure 27. PowerSO-16 thermal impedance junction ambient single pulse (one
channel ON)
Figure 28. Thermal fitting model of a double channel HSD in PowerSO-16
1. The fitting model is a semplified thermal tool and is valid for transient evolutions where the embedded
protections (power limitation or thermal cycling during thermal shutdown) are not triggered.
Equation 1: pulse calculation formula
where δ=t
P
/T
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&X IRRWSULQW
("1($'5
ZTHδRTH δZTHtp 1δ–()+⋅=
Package and PCB thermal data VND5T016ASP-E
24/31 DocID022687 Rev 4
Table 15. Thermal parameters
Area/island (cm
2
)Footprint28
R1 = R 7 (°C/W) 0.1
R2 = R 8 (°C/W) 0.5
R3 (°C/W) 2
R4 (°C/W) 7
R5 (°C/W) 12 12 8
R6 (°C/W) 22 18 12
C1 = C7 (W.s/°C) 0.01
C2 = C8 (W.s/°C) 0.05
C3 (W.s/°C) 0.5
C4 (W.s/°C) 2
C5 (W.s/°C) 3 4 7
C6 (W.s/°C) 5 6 12
DocID022687 Rev 4 25/31
VND5T016ASP-E Package information
30
4 Package information
4.1 ECOPACK
®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK
®
packages, depending on their level of environmental compliance. ECOPACK
®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK
®
is an ST trademark.
4.2 PowerSO-16 mechanical data
Figure 29. PowerSO-16 package dimensions
P013Q
Package information VND5T016ASP-E
26/31 DocID022687 Rev 4
Table 16. PowerSO-16 mechanical data
Dim. mm
Min. Typ. Max.
A1 0 0.05 0.1
A2 3.4 3.5 3.6
A3 1.2 1.3 1.4
A4 0.15 0.2 0.25
a0.2
b 0.27 0.35 0.43
c 0.23 0.27 0.32
D9.4 9.5 9.6
D1 7.4 7.5 7.6
d 0 0.05 0.1
E (1) 1 3.8 5 14.1 14.35
E1 9.3 9.4 9.5
E2 7.3 7.4 7.5
E3 5.9 6.1 6.3
e0.8
e1 5.6
F0.5
G1.2
L0.8 1 1.1
R1 0.25
R2 0.8
T 2° 5° 8°
T1 6° (typ.)
T2 10° (typ.)
Package weight (typ.)
DocID022687 Rev 4 27/31
VND5T016ASP-E Package information
30
4.3 Packing information
Figure 30. PowerSO-16 tube shipment (no suffix)
Figure 31. PowerSO-16 tape and reel shipment (suffix “TR”)
C
A
B
All dimensions are in mm.
Base q.ty 50
Bulk q.ty 1000
A 4.9
B 17.2
C (± 0.1) 0.8
Tube length (± 0.5) 532
REEL DIMENSIONS
All dimensions are in mm.
Base q.ty 600
Bulk q.ty 600
A (max) 330
B (min) 1.5
C (± 0.2) 13
F20.2
G (+ 2 / -0) 24.4
N (min) 60
T (max) 30.4
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
All dimensions are in mm.
Tape width W 24
Tape hole spacing P0 (± 0.1) 4
Component spacing P 24
Hole diameter D ( + 0.1/-0) 1.5
Hole diameter D1 (min) 1.5
Hole position F (± 0.05) 11.5
Compartment depth K (max) 6.5
Hole spacing P1 (± 0.1) 2
Top
cover
tape
End
Start
No componentsNo components Components
500mm min
500mm min
Empty comp one nts po ckets
saled with cover tape.
User dire ct ion of fe e d
Package information VND5T016ASP-E
28/31 DocID022687 Rev 4
Figure 32. PowerSO-16 sugges ted pad layout
 





("1($'5
DocID022687 Rev 4 29/31
VND5T016ASP-E Order codes
30
5 Order codes
Table 17. Device summary
Package Order codes
Tube Tape and reel
PowerSO-16 VND5T016ASP-E VND5T016ASPTR-E
Revision history VND5T016ASP-E
30/31 DocID022687 Rev 4
6 Revision history
Table 18. Document revision history
Date Revision Changes
15-Feb-2012 1 Initial release.
13-Apr-2012 2
Updated Table :
Table 9: Current sense (8 V < VCC < 36 V):
– renam ed dK
led
/K
led
in dK
led
/K
led(TOT)
, dK/K
bulb1
in
dK/K
bulb1(TOT)
and
dK/K
bulb2
in dK/K
bulb2(TOT)
– dK/K
bulb1(TOT)
, dK/K
bulb2(TOT)
: updated test condition
18-Sep-2013 3 Updated disclaimer.
16-Feb-2016 4 Table 4: Thermal data:
–R
thj-case
: updated valu e
DocID022687 Rev 4 31/31
VND5T016ASP-E
31
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