VNH3SP30TR-E - STMicroelectronics

February 2008 Rev 7 1/33

VNH3SP30-E

Automotive fully integrated H-bridge motor driver

Features

■Output current: 30A

■5V logic level compatible inputs

■Undervoltage and overvoltage shutdown

■Overvoltage clamp

■Thermal shut down

■Cross-conduction protection

■Linear current limiter

■Very low standby power consumption

■PWM operation up to 10 kHz

■Protection against loss of ground and loss of

VCC

■Package: ECOPACK®

Description

The VNH3SP30-E is a full-bridge motor driver

intended for a wide range of automotive

applications. The device incorporates a dual

monolithic high-side driver (HSD) and two low-

side switches. The HSD switch is designed using

STMicroelectronics proprietary VIPower™ M0-3

technology that efficiently integrates a true Power

MOSFET with an intelligent signal/protection

circuit on the same die.

The low-side switches are vertical MOSFETs

manufactured using STMicroelectronics

proprietary EHD (“STripFET™”) process.The

three circuits are assembled in a MultiPowerSO-

30 package on electrically isolated lead frames.

This package, specifically designed for the harsh

automotive environment, offers improved thermal

performance thanks to exposed die pads.

Moreover, its fully symmetrical mechanical design

provides superior manufacturability at board level.

The input signals INA and INB can directly

interface with the microcontroller to select the

motor direction and the brake condition. Pins

DIAGA/ENA or DIAGB/ENB, when connected to an

external pull-up resistor, enable one leg of the

bridge. They also provide a feedback digital

diagnostic signal. The normal condition operation

is explained in The speed of the motor can be

controlled in all possible conditions by the PWM

up to kHz. In all cases, a low level state on the

PWM pin will turn off both the LSA and LSB

switches. When PWM rises to a high level, LSA or

LSB turn on again depending on the input pin

state.

Type RDS(on) Iout Vccmax

VNH3SP30-E 45mΩ max

(per leg) 30A 40V

MultiPowerSO-30™

Table 1. Device summary

Package

Order codes

Tube Tape & reel

MultiPowerSO-30 VNH3SP30-E VNH3SP30TR-E

www.st.com

Contents VNH3SP30-E

2/33

Contents

1 Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

2.3 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.1 Reverse battery protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.2 Open load detection in Off mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.3 Test mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

4 Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1 MultiPowerSO-30 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

4.1.1 Thermal calculation in clockwise and anti-clockwise operation in steady-

state mode 26

4.1.2 Thermal resistances definition

(values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26

4.1.3 Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . 26

4.1.4 Single pulse thermal impedance definition

(values according to the PCB heatsink area) . . . . . . . . . . . . . . . . . . . . . 26

5 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

5.2 MultiPowerSO-30 package mechanical data . . . . . . . . . . . . . . . . . . . . . . 29

5.3 Packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

VNH3SP30-E List of tables

3/33

List of tables

Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Table 2. Block description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Table 3. Pin definitions and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Table 4. Pin functions description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Table 5. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Table 6. Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 7. Logic inputs (INA, INB, ENA, ENB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Table 8. PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 9. Switching (VCC =13V, R

LOAD =1.1Ω, unless otherwise specified) . . . . . . . . . . . . . . . . . . 10

Table 10. Protection and diagnostic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Table 11. Truth table in normal operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 12. Truth table in fault conditions (detected on OUTA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Table 13. Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Table 14. Thermal calculation in clockwise and anti-clockwise operation in steady-state mode . . . . 26

Table 15. Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Table 16. MultiPowerSO-30 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Table 17. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

List of figures VNH3SP30-E

4/33

List of figures

Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Figure 2. Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Figure 3. Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Figure 4. Definition of the delay times measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 5. Definition of the low side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Figure 6. Definition of the high side switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 7. On state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 8. Off state supply current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 9. High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 10. Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 11. Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 12. Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 13. Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 14. High level enable pin current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 15. Delay time during change of operation mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 16. Enable clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 17. High level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 18. Low level enable voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 19. PWM high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 20. PWM low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 21. PWM high level current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 22. Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 23. Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 24. Current limitation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 25. On state high side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 26. On state low side resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 27. On state high side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 28. On state low side resistance vs Vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 29. Output voltage rise time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 30. Output voltage fall time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 31. Enable output low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 32. ON state leg resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit protection . . . . . 20

Figure 34. Half-bridge configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 35. Multi-motors configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 36. Waveforms in full bridge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 37. Waveforms in full bridge operation (continued) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 38. MultiPowerSO-30™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 39. Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 40. Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 25

Figure 41. MultiPowerSO-30 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . 27

Figure 42. MultiPowerSO-30 LSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . 27

Figure 43. Thermal fitting model of an H-bridge in MultiPowerSO-30 . . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 44. MultiPowerSO-30 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 45. MultiPowerSO-30 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 46. MultiPowerSO-30 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Figure 47. MultiPowerSO-30 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

VNH3SP30-E Block diagram and pins description

5/33

1 Block diagram and pins description

Figure 1. Block diagram

Table 2. Block description

Name Description

Logic control Allows the turn-on and the turn-off of the high side and the low side switches

according to the truth table

Overvoltage +

undervoltage Shuts down the device outside the range [5.5V..36V] for the battery voltage

High side and low

side clamp voltage

Protects the high side and the low side switches from the high voltage on the

battery line in all configurations for the motor

High side and low

side driver

Drives the gate of the concerned switch to allow a proper RDS(on) for the leg of

the bridge

Linear current limiter Limits the motor current by reducing the high side switch gate-source voltage

when short-circuit to ground occurs

Overtemperature

protection

In case of short-circuit with the increase of the junction’s temperature, shuts

down the concerned high side to prevent its degradation and to protect the die

Fault detection Signals an abnormal behavior of the switches in the half-bridge A or B by

pulling low the concerned ENx/DIAGx pin

Block diagram and pins description VNH3SP30-E

6/33

Figure 2. Configuration diagram (top view)

Table 3. Pin definitions and functions

Pin No Symbol Function

1, 25, 30 OUTA, Heat Slug3 Source of high side switch A / Drain of low side switch A

2, 4, 7, 9, 12,

14, 17, 22, 24,

NC Not connected

3, 13, 23 VCC, Heat Slug1 Drain of high side switches and power supply voltage

6EN

A/DIAGAStatus of high side and low side switches A; open drain output

5IN

AClockwise input

8 PWM PWM input

11 INBCounter clockwise input

10 ENB/DIAGBStatus of high side and low side switches B; open drain output

15, 16, 21 OUTB, Heat Slug2 Source of high side switch B / Drain of low side switch B

26, 27, 28 GNDASource of low side switch A(1)

1. GNDA and GNDB must be externally connected together.

18, 19, 20 GNDBSource of low side switch B(1)

VNH3SP30-E Block diagram and pins description

7/33

Table 4. Pin functions description

Name Description

VCC Battery connection

GNDA, GNDBPower grounds; must always be externally connected together

OUTA, OUTBPower connections to the motor

INA, INB

Voltage controlled input pins with hysteresis, CMOS compatible. These two pins

control the state of the bridge in normal operation according to the truth table (brake

to VCC, brake to GND, clockwise and counterclockwise).

PWM

Voltage controlled input pin with hysteresis, CMOS compatible. Gates of low side

FETs are modulated by the PWM signal during their ON phase allowing speed

control of the motor.

ENA/DIAGA,

ENB/DIAGB

Open drain bidirectional logic pins. These pins must be connected to an external pull

up resistor. When externally pulled low, they disable half-bridge A or B. In case of

fault detection (thermal shutdown of a high side FET or excessive ON state voltage

drop across a low side FET), these pins are pulled low by the device (see truth table

in fault condition).

Electrical specifications VNH3SP30-E

8/33

2 Electrical specifications

Figure 3. Current and voltage conventions

2.1 Absolute maximum ratings

Table 5. Absolute maximum ratings

Symbol Parameter Value Unit

Vcc Supply voltage -0.3...40 V

Imax1 Maximum output current (continuous) 30 A

IR Reverse output current (continuous) -30

IIN Input current (INA and INB pins) ±10

mAIEN Enable input current (DIAGA/ENA and DIAGB/ENB pins) ±10

Ipw PWM input current ±10

VESD

Electrostatic discharge (R = 1.5kΩ, C = 100pF)

– logic pins

– output pins: OUTA, OUTB, VCC

TjJunction operating temperature Internally limited

°CTcCase operating temperature -40 to 150

TSTG Storage temperature -55 to 150

VNH3SP30-E Electrical specifications

9/33

2.2 Electrical characteristics

Vcc = 9V up to 18V; -40°C < Tj< 150°C, unless otherwise specified.

Table 6. Power section

Symbol Parameter Test Conditions Min Typ Max Unit

VCC

Operating supply

voltage 5.5 36 V

ISSupply current

Off state:

INA=IN

B=PWM=0; T

j= 25°C; VCC =13V

INA=IN

B=PWM=0

20 30

µA

On state:

INA or INB=5V, no PWM 15 mA

RONHS

Static high side

resistance

IOUT = 12A; Tj= 25°C

IOUT = 12A; Tj= -40 to 150°C

23 30

60 mΩ

RONLS

Static low side

resistance

IOUT = 12A; Tj= 25°C

IOUT = 12A; Tj= -40 to 150°C

11 15

High side free-

wheeling diode

forward voltage

If = 12 A0.81.1V

IL(off)

High side off state

output current

(per channel)

Tj=25°C; V

OUTX =EN

X=0V; V

CC =13V

Tj= 125°C; VOUTX =EN

X=0V; V

CC =13V

5µA

Table 7. Logic inputs (INA, INB, ENA, ENB)

Symbol Parameter Test conditions Min Typ Max Unit

VIL Input low level voltage

Normal operation (DIAGX/ENX pin acts

as an input pin)

1.5

VIH Input high level voltage 3.25

VIHYST Input hysteresis voltage 0.5

VICL Input clamp voltage IIN =1mA 6 6.8 8

IIN = -1mA -1 -0.7 -0.3

IINL Input low current VIN =1.5V 1 µA

IINH Input high current VIN =3.25V 10

VDIAG

Enable output low level

voltage

Fault operation (DIAGX/ENX pin acts as

an output pin); IEN =1mA 0.4 V

Electrical specifications VNH3SP30-E

10/33

Table 8. PWM

Symbol Parameter Test Conditions Min Typ Max Unit

Vpwl PWM low level voltage 1.5 V

Ipwl

PWM low level pin

current Vpw =1.5V 1 µA

Vpwh PWM high level voltage 3.25 V

Ipwh

PWM high level pin

current Vpw = 3.25V 10 µA

Vpwhhyst PWM hysteresis voltage 0.5

Vpwcl PWM clamp voltage Ipw = 1mA VCC +0.3 V

CC +0.7 V

CC +1

Ipw = -1mA -5 -3.5 -2

Vpwtest

Test mode PWM pin

voltage -3.5 -2 -0.5 V

Ipwtest

Test mode PWM pin

current VIN = -2 V -2000 -500 µA

Table 9. Switching (VCC =13V, R

LOAD =1.1Ω, unless otherwise specified)

Symbol Parameter Test Conditions Min Typ Max Unit

f PWM frequency 0 10 kHz

td(on) Turn-on delay time Input rise time < 1µs

(see Figure 6)100 300

µs

td(off) Turn-off delay time Input rise time < 1µs

(see Figure 6)85 255

trRise time (see Figure 5)1.53

tfFall time (see Figure 5)25

tDEL

Delay time during change

of operating mode (see Figure 4) 600 1800

Table 10. Protection and diagnostic

Symbol Parameter Test Conditions Min Typ Max Unit

VUSD Undervoltage shut-down 5.5 V

VOV Overvoltage shut-down 36 43

ILIM Current limitation 30 45 A

TTSD Thermal shut-down temperature VIN = 3.25V 150 170 200

°CTTR Thermal reset temperature 135

THYST Thermal hysteresis 7 15

VNH3SP30-E Electrical specifications

11/33

Figure 4. Definition of the delay times measurement

Figure 5. Definition of the low side switching times

INB

INA

PWM

LOAD

DEL

PWM

OUTA, B

20%

90% 80%

10%

Electrical specifications VNH3SP30-E

12/33

Figure 6. Definition of the high side switching times

OUTA

INA

90%

10%

D(on)

D(off)

VNH3SP30-E Electrical specifications

13/33

Note: Notice that saturation detection on the low side power MOSFET is possible only if the

impedance of the short-circuit from the output to the battery is less than 100mΩ when the

device is supplied with a battery voltage of 13.5V.

Table 11. Truth table in normal operating conditions

INAINBDIAGA/ENADIAGB/ENBOUTAOUTBOperating mode

HH Brake to VCC

0 L Clockwise (CW)

01LH Counterclockwise (CCW)

0 L Brake to GND

Table 12. Truth table in fault conditions (detected on OUTA)

INAINBDIAGA/ENADIAGB/ENBOUTAOUTB

OPEN

01H

X0 OPEN

11H

Fault Information Protection Action

Electrical specifications VNH3SP30-E

14/33

Table 13. Electrical transient requirements

ISO T/R - 7637/1

Test Pulse

Test Level

III

Test Level

Test Levels

Delays and Impedance

1 -25V -50V -75V -100V 2ms, 10Ω

2 +25V +50V +75V +100V 0.2ms, 10Ω

3a -25V -50V -100V -150V 0.1µs, 50Ω

3b +25V +50V +75V +100V

4 -4V -5V -6V -7V 100ms, 0.01Ω

5 +26.5V +46.5V +66.5V +86.5V 400ms, 2Ω

ISO T/R - 7637/1

Test Pulse

Test Levels

Result I

Test Levels

Result II

Test Levels

Result III

Test Levels

Result IV

CCCC

5(1)

1. For load dump exceeding the above value a centralized suppressor must be adopted

EEE

Class Contents

CAll functions of the device are performed as designed after exposure to

disturbance.

One or more functions of the device are not performed as designed after

exposure to disturbance and cannot be returned to proper operation without

replacing the device.

VNH3SP30-E Electrical specifications

15/33

2.3 Electrical characteristics curves

Figure 7. On state supply current Figure 8. Off state supply current

Figure 9. High level input current Figure 10. Input clamp voltage

Figure 11. Input high level voltage Figure 12. Input low level voltage

Electrical specifications VNH3SP30-E

16/33

Figure 13. Input hysteresis voltage Figure 14. High level enable pin current

Figure 15. Delay time during change of

operation mode

Figure 16. Enable clamp voltage

Figure 17. High level enable voltage Figure 18. Low level enable voltage

VNH3SP30-E Electrical specifications

17/33

Figure 19. PWM high level voltage Figure 20. PWM low level voltage

Figure 21. PWM high level current Figure 22. Overvoltage shutdown

Figure 23. Undervoltage shutdown Figure 24. Current limitation

Electrical specifications VNH3SP30-E

18/33

Figure 25. On state high side resistance vs

Tcase

Figure 26. On state low side resistance vs

Tcase

Figure 27. On state high side resistance vs

Vcc

Figure 28. On state low side resistance vs Vcc

Figure 29. Output voltage rise time Figure 30. Output voltage fall time

VNH3SP30-E Electrical specifications

19/33

Figure 31. Enable output low level voltage Figure 32. ON state leg resistance

Application information VNH3SP30-E

20/33

3 Application information

In normal operating conditions the DIAGX/ENX pin is considered as an input pin by the

device. This pin must be externally pulled high.

PWM pin usage: In all cases, a “0” on the PWM pin will turn off both LSA and LSB switches.

When PWM rises back to “1”, LSA or LSB turn on again depending on the input pin state.

Figure 33. Typical application circuit for DC to 10 kHz PWM operation short circuit

protection

Note: The value of the blocking capacitor (C) depends on the application conditions and defines voltage and

current ripple onto supply line at PWM operation. Stored energy of the motor inductance may fly back

into the blocking capacitor, if the bridge driver goes into tri-state. This causes a hazardous overvoltage

if the capacitor is not big enough. As basic orientation, 500µF per 10A load current is recommended.

In case of a fault condition the DIAGX/ENX pin is considered as an output pin by the device.

The fault conditions are:

●overtemperature on one or both high sides

●short to battery condition on the output (saturation detection on the low side power

MOSFET)

µC

VNH3SP30-E Application information

21/33

Possible origins of fault conditions may be:

●OUTA is shorted to ground → overtemperature detection on high side A.

●OUTA is shorted to VCC → low side power MOSFET saturation detection(a).

When a fault condition is detected, the user can know which power element is in fault by

monitoring the INA, INB, DIAGA/ENA and DIAGB/ENB pins.

In any case, when a fault is detected, the faulty leg of the bridge is latched off. To turn on the

respective output (OUTX) again, the input signal must rise from low to high level.

3.1 Reverse battery protection

Three possible solutions can be considered:

1. a Schottky diode

connected to VCC pin

2. an N-channel MOSFET connected to the GND pin (see Figure 33: Typical application

circuit for DC to 10 kHz PWM operation short circuit protection on page 20

3. a P-channel MOSFET connected to the VCC pin

The device sustains no more than -30A in reverse battery conditions because of the two

body diodes of the power MOSFETs. Additionally, in reverse battery condition the I/Os of

VNH3SP30-E will be pulled down to the VCC line (approximately -1.5V). A series resistor

must be inserted to limit the current sunk from the microcontroller I/Os. If IRmax is the

maximum target reverse current through µC I/Os, the series resistor is:

3.2 Open load detection in Off mode

It is possible for the microcontroller to detect an open load condition by adding a simply

resistor (for example, 10k ohm) between one of the outputs of the bridge (for example,

OUTB) and one microcontroller input. A possible sequence of inputs and enable signals is

the following: INA = 1, INB = X, ENA = 1, ENB = 0.

● normal condition: OUTA = H and OUTB = H

● open load condition: OUTA = H and OUTB = L: In this case the OUTB pin is internally

pulled down to GND. This condition is detected on OUTB pin by the microcontroller as

an open load fault.

a. An internal operational amplifier compares the Drain-Source MOSFET voltage with the internal reference (2.7V

Typ.). The relevant low side power MOS is switched off when its Drain-Source voltage exceeds the reference

voltage.

VIOs VCC

–

IRmax

---------------------------------=

Application information VNH3SP30-E

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3.3 Test mode

The PWM pin can be used to test the load connection between two half-bridges. In the Test

mode (Vpwm = -2V) the internal power MOS gate drivers are disabled. The INA or INB inputs

can be used to turn on the high side A or B, respectively, in order to connect one side of the

load at VCC voltage. The check of the voltage on the other side of the load can be used to

verify the continuity of the load connection. In case of load disconnection, the DIADX/ENX

pin corresponding to the faulty output is pulled down.

Figure 34. Half-bridge configuration

Note: The VNH3SP30-E can be used as a high power half-bridge driver achieving an On

resistance per leg of 22.5mΩ.

Figure 35. Multi-motors configuration

Note: The VNH3SP30-E can easily be designed in multi-motors driving applications such as seat

positioning systems where only one motor must be driven at a time. DIAGX/ENX pins allow

to put unused half-bridges in high impedance.

OUT

PWM

DIAG

/EN

DIAG

/EN

GND

PWM

DIAG

/EN

DIAG

/EN

OUT

PWM

DIAG

/EN

DIAG

/EN

GND

PWM

DIAG

/EN

DIAG

/EN