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1
TGA2525
October 2008 © Rev D
Datasheet subject to change without notice.
Primary Applications
Product Description
Key Features
Measured Performance
2-18 GHz Low Noise Amplifier with AGC
•Chip Dimensions: 2.09 x 1.35 x 0.1 mm
•Technology: 3MI 0.15 um Power pHEMT
•Bias: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V, Vg2
= +1.3 V, Typical
•ESD Protection circuitry on Vg1 & Vg2
•22 dBm Nominal Psat, 18 dBm Nominal P1dB
•TOI: 29 dBm Typical
•>30 dB adjustable gain with Vg2
•Midband NF: 2 dB
•Gain: 17 dB
•Frequency Range: 2 - 18 GHz
•Electronic Warfare Applications
•X-Ku Point to Point Radio
•Wideband Gain Block / LNA
The TriQuint TGA2525 is a compact LNA Gain
Block MMIC with adjustable gain control (AGC).
The LNA operates from 2-18 GHz and is designed
using TriQuint’s proven standard 0.15 um Power
pHEMT production process.
The TGA2525 provides a nominal 18 dBm of
output power at 1 dB gain compression with a
small signal gain of 17 dB. Greater than 30 dB
adjustable gain can be achieved using Vg2 pin.
Typical noise figure is 2 dB at 8 GHz. Special
circuitry on both Vg1 and Vg2 pins provides ESD
protection.
The TGA2525 is suitable for a variety of wideband
systems such as point to point radios, radar
warning receivers and electronic counter
measures.
The TGA2525 is 100% DC and RF tested on-wafer
to ensure performance compliance. The TGA2525
has a protective surface passivation layer providing
environmental robustness.
Lead-Free & RoHS compliant.
Evaluation Boards are available upon request.
Bias conditions: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V,
Vg2 = +1.3 V Typical
0
1
2
3
4
5
6
7
8
9
10
2 4 6 8 10 12 14 16 18
Frequency (GHz)
NF (dB)
0
2
4
6
8
10
12
14
16
18
20
Gain (dB)
NF
Gain
-35
-30
-25
-20
-15
-10
-5
0
5
10
15
20
25
2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18
Frequency (GHz)
Gain, IRL, ORL (dB)
Gain
IRL
ORL
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2
TGA2525
October 2008 © Rev D
Table II
Recommended Operating Conditions
Table I
Absolute Maximum Ratings 1/
2/ 22 dBmInput Continuous Wave PowerPin
3/ -24 to 24 mA
-24 to 24 mA
Gate #1 Current Range
Gate #2 Current Range
Ig1
Ig2
2/144 mADrain CurrentId
-2 to 0 V
-2 to +3 V
Gate #1 Voltage Range
Gate #2 Voltage Range
Vg1
Vg2
2/7 VDrain VoltageVd
10 VDrain to Gate VoltageVd-Vg
NotesValueParameterSymbol
1/ These ratings represent the maximum operable values for this device. Stresses beyond those listed
under “Absolute Maximum Ratings” may cause permanent damage to the device and / or affect
device lifetime. These are stress ratings only, and functional operation of the device at these
conditions is not implied.
2/ Combinations of supply voltage, supply current, input power, and output power shall not exceed the
maximum power dissipation listed in Table IV.
3/ ESD protection diodes on both Vg1 and Vg2 will conduct current for voltages approaching turn-on
voltages. Diode turn-on voltage levels will decrease with decreasing temperature.
-0.6 V
1.3 V
Gate #1 Voltage
Gate #2 Voltage
Vg1
Vg2
130 mADrain Current under RF DriveId_Drive
75 mADrain CurrentId
5 VDrain VoltageVd
ValueParameter 1/Symbol
1/ See assembly diagram for bias instructions.
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3
TGA2525
October 2008 © Rev D
Table III
RF Characterization Table
Bias: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V, Vg2 = +1.3 V typical
-
4
6
-
-
-
-
-
-
-
-
-
-
-
-
-
-
MAX
-
-
-
-
-
14
15
13
11
-
-
9
10
8.5
10
10
14
14
MIN
dB / °C-0.008f = 2 - 18 GHzS21 Temperature
Dependence
S21/T
dB2
4
f = 2 - 14 GHz
f = 14 - 18 GHz
Noise FigureNF
dBm29
25
f = 2 - 14 GHz
f = 14 – 18 GHz
Output TOITOI
dBm18
17
17
15
f = 2 GHz
f = 4, 8 GHz
f = 10, 14 GHz
f = 18 GHz
Output Power @
1dB
Compression
P1dB
dBm22
20
f = 2 - 14 GHz
f = 14 – 18 GHz
Saturated Output
Power
Psat
dB15
15
f = 2 - 3 GHz
f = 4 - 18 GHz
Output Return LossORL
dB15
15
12
f = 2 GHz
f = 3 - 14 GHz
f = 14 - 18 GHz
Input Return LossIRL
dB17
17
f = 2 -14 GHz
f = 14 - 18 GHz
Small Signal GainGain
UNITSNOMINALTEST
CONDITIONS
PARAMETERSYMBOL
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4
TGA2525
October 2008 © Rev D
Table IV
Power Dissipation and Thermal Properties
Power De-rating Curve
1/ For a median life of 1E+6 hours, Power Dissipation is limited to
Pd(max) = (150 °C – Tbase °C)/θjc.
2/ Channel operating temperature will directly affect the device median time to failure (MTTF). For
maximum life, it is recommended that channel temperatures be maintained at the lowest possible
levels.
-65 to 150 °CStorage Temperature
320 °C30 SecondsMounting Temperature
θjc = 41.4 (°C/W)
Tchannel = 89 °C
Tm = 2.7 E+9 Hrs
Vd = 5 V
Id = 120 mA
Pout = 22 dBm
Pd = 0.45 W
Thermal Resistance, θjc
Under RF Drive
θjc = 41.4 (°C/W)
Tchannel = 86 °C
Tm = 4.3 E+9 Hrs
Vd = 5 V
Id = 75 mA
Pd = 0.375 W
Thermal Resistance, θjc
1/ 2/Pd = 1.01 W
Tchannel = 96 °C
Tm = 9.7 E+8 Hrs
Tbaseplate = 70 °CMaximum Power Dissipation
NotesValueTest ConditionsParameter
0
0.2
0.4
0.6
0.8
1
1.2
-50 -25 0 25 50 75 100 125 150
Baseplate Temp (C)
Power Dissipation (W)
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5
TGA2525
October 2008 © Rev D
Measured Data
Bias conditions: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V, Vg2 = +1.3 V Typical
0
5
10
15
20
25
2 4 6 8 10 12 14 16 18 20 22 24
Frequency (GHz)
Gain (dB)
-40
-30
-20
-10
0
2 4 6 8 10 12 14 16 18 20 22 24
Frequency (GHz)
Input RL and Output RL (dB)
IRL
ORL
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6
TGA2525
October 2008 © Rev D
Measured Data
-20
-10
0
10
20
30
0 5 10 15 20
Freq (GHz)
S21 (dB)
Id = 75 mA,
Vg2= +1.3 V
Id = 40.6 mA,
Vg2= -0.42 V
Id = 29.7 mA,
Vg2= -0.64 V
Id = 22.2 mA,
Vg2= -0.73 V
Id = 16.2 mA,
Vg2= -0.8 V
Id = 11.4 mA,
Vg2= -0.85 V
Id = 7.7 mA,
Vg2= -0.89 V
Id = 5 mA, Vg2=
-0.93 V
Gain tuned at Freq = 8 GHz by adjusting Vg2
0
1
2
3
4
5
6
7
8
9
10
2 4 6 8 10 12 14 16 18
Frequency (GHz)
NF (dB)
0
2
4
6
8
10
12
14
16
18
20
Gain (dB)
NF
Gain
Bias conditions: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V, Vg2 = +1.3 V Typical
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7
TGA2525
October 2008 © Rev D
Measured Data
0
5
10
15
20
25
30
-10 -8 -6 -4 -2 0 2 4 6 8 10
Pin (dBm)
Pout (dBm), Gain (dB)
0
25
50
75
100
125
150
Id (mA)
Pout @ 8 GHz
Gain @ 8 GHz
Id @ 8 GHz
0
5
10
15
20
25
30
0 2 4 6 8 10 12 14 16 18 20
Frequency (GHz)
Pout (dBm)
Psat
P1dB
Bias conditions: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V, Vg2 = +1.3 V Typical
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8
TGA2525
October 2008 © Rev D
Measured Data
0
5
10
15
20
25
30
35
2 4 6 8 10 12 14 16
Pout / tone (dBm)
OTOI (dBm)
8 GHz
0
5
10
15
20
25
30
35
40
0 2 4 6 8 10 12 14 16 18 20
Frequency (GHz)
OTOI (dBm) @ Pin = -8 dBm
Vg2 = +1.3V
Vg2 = -0.42 V
Vg2 = -0.64 V
Vg2 = -0.73 V
Vg2 = -0.80 V
Bias conditions: Vd = 5 V, Id = 75 mA, Vg1 = -0.6 V, Vg2 = +1.3 V Typical
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9
TGA2525
October 2008 © Rev D
Electrical Schematic
Bias Procedures
Turn Vd to 0 V
Turn Vg1 to 0 V
Apply RF signal to input
Adjust Vg2 to obtain desired gain.
Vg2 to 0 VAdjust Vg1 more positive until Id is 75 mA. This will
be ~ Vg1 = -0.6 V
Reduce Vg1 to -1.5V. Ensure Id ~ 0 mAVg2 set to +1 V
Reduce Vg2 to +1 V
Turn off RF supply
Vg1 set to -1.5 V
Vd set to +5 V
Bias-down ProcedureBias-up Procedure
TGA2525
RF
In RF
Out
Vd
100
pF
0.01
uF
Vg2
100
pF
0.01
uF
Vg1
0.01
uF 100
pF
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10
TGA2525
October 2008 © Rev D
GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should
be observed during handling, assembly and test.
Mechanical Drawing
Ground is backside of die
Chip edge to bond pad dimensions are shown to center of pad
Die x,y size tolerance: +/- 0.050
Thickness: 0.10
Units: millimeters
0.090 x 0.090Vg1Bond Pad #60.125 x 0.100Vd2 (Not
used)
Bond Pad #3
0.090 x 0.148RF OutBond Pad #50.090 x 0.090Vg2Bond Pad #2
0.100 x 0.125Vd1Bond Pad #40.090 x 0.148RF InBond Pad #1
0.000
0.095
1.971
2.091
0.230
0.390
1.242
1.351
0.742
1.208
1.983
0.099
0.968
1.131
1.212
0.104
0.000
1.230
1
24
3
5
6
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11
TGA2525
October 2008 © Rev D
GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should
be observed during handling, assembly and test.
Recommended Assembly Diagram
RF In
RF Out
Vd
Vg2
Vg1
0.01 uF 0.01 uF
100 pF 100 pF
0.01 uF
100 pF
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12
TGA2525
October 2008 © Rev D
GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should
be observed during handling, assembly and test.
Assembly Notes
Ordering Information
Component placement and adhesive attachment assembly notes:
• Vacuum pencils and/or vacuum collets are the preferred method of pick up.
• Air bridges must be avoided during placement.
• The force impact is critical during auto placement.
• Organic attachment (i.e. epoxy) can be used in low-power applications.
• Curing should be done in a convection oven; proper exhaust is a safety concern.
Reflow process assembly notes:
• Use AuSn (80/20) solder and limit exposure to temperatures above 300°C to 3-4 minutes, maximum.
• An alloy station or conveyor furnace with reducing atmosphere should be used.
• Do not use any kind of flux.
• Coefficient of thermal expansion matching is critical for long-term reliability.
• Devices must be stored in a dry nitrogen atmosphere.
Interconnect process assembly notes:
• Thermosonic ball bonding is the preferred interconnect technique.
• Force, time, and ultrasonics are critical parameters.
• Aluminum wire should not be used.
• Devices with small pad sizes should be bonded with 0.0007-inch wire.
EAR99
ECCN
GaAs MMIC DieTGA2525
Package StylePart
