Philips Semiconductors Application note
AN171NE558 applications
2
December 1988
INTRODUCTION
The 558 is a monolithic Quad Timer designed to be used in the
timing range from a few microseconds to a few hours. Four entirely
independent timing functions can be achieved using a timing resistor
and capacitor for each section. Two sections of the quad may be
interconnected for astable operation. All four sections may be used
together, in tandem, for sequential timing applications up to several
hours. No coupling capacitors are required when connecting the
output of one timer section to the input of the next.
FEATURES
•100mA output current per section
•Edge-triggered (no coupling capacitor)
•Output independent of trigger conditions
•Wide supply voltage range 4.5V to 16V
•Timer intervals from microseconds to hours
•Time period equals RC
CIRCUIT OPERATIONS
In the one-shot mode of operation, it is necessary to supply a
minimum of two external components (the resistor and capacitor) for
timing. The time period is equal to the product of R and C. An output
load must be present to complete the circuit due to the output
structure of the 558.
For astable operation, it is desirable to cross-couple two devices
from the 558 Quad. The outputs are direct-coupled to the opposite
trigger input. The duty cycle can be set by the ratio of R1C1 to R2C2,
from close to zero to almost 100%. An astable circuit using one
timer is shown in Figure 5b.
OUTPUT STRUCTURE 558
The 558 structure is open-collector which requires a pull-up resistor
to VCC and is capable of sinking 100mA per unit, but not to exceed
the power dissipation and junction temperature rating of the die and
package. The output is normally low and is switched high when
triggered.
RESET
A reset function has been made available to reset all sections
simultaneously to an output low state. During reset the trigger is
disabled. After reset is finished, the trigger voltage must be taken
high and then low to implement triggering.
The reset voltage must be brought below 0.8V to insure reset.
THE CONTROL VOLTAGE
The control voltage is also made available on the 558 timer. This
allows the threshold
VCC
R1
C1
C2
C3
C4
2
7
10
15
R4 R3
VCC
RESET
S1
5133
1
6
8
11
9
14
16
124
TR1RL1
S2
LOAD
SWITCH
(558)
(559)
R2
RL3
TR4RL4
TR2RL2
TR3
SL00990
Figure 1. 558 Test Circuit
voltage to be modulated, therefore controlling the output pulse width
and duty cycle with an external control voltage. The range of this
control voltage is from about 0.5V to VCC minus 1V. This will give a
cycle time variation of about 50:1. In a sequential timer with
voltage-controlled cycle time, the timing periods remain proportional
over the adjustment range.
TEST BOARD FOR 558
The circuit layout can be used to test and characterize the 558 timer.
S2 is used to connect the loads to either VCC or ground. The main
precaution, in layout of the 558 circuit, is the path of the discharge
current from the timing capacitor to ground (Pin 12). The path must
be direct to Pin 12 and not on the ground bus. This is to prevent
voltage spikes on the ground bus return due to current switching
transient. It is also wise to use good power supply bypassing when
large currents are being switched.