EB51F3A15N-12.288M
EB51F3 A 15 N -12.288M
Series
5.0Vdc 14-Pin DIP HCMOS/TTL TCXO
Operating Temperature Range
0°C to +50°C
Frequency Stability
±1.5ppm Maximum
Nominal Frequency
12.288MHz
Control Voltage
None (No Connect on Pin 1)
ELECTRICAL SPECIFICATIONS
Nominal Frequency 12.288MHz
Frequency Stability ±1.5ppm Maximum (Inclusive of Operating Temperature Range)
Frequency Stability vs. Input Voltage ±0.3ppm Maximum (±5%)
Aging at 25°C ±1ppm/Year Maximum
Frequency Stability vs. Load ±0.2ppm Maximum (±2pF)
Operating Temperature Range 0°C to +50°C
Supply Voltage 5.0Vdc ±5%
Input Current 30mA Maximum
Output Voltage Logic High (Voh) 2.4Vdc Minimum w/TTL Load, Vdd-0.5Vdc Minimum w/HCMOS Load
Output Voltage Logic Low (Vol) 0.4Vdc Maximum w/TTL Load, 0.5Vdc Maximum w/HCMOS Load
Rise/Fall Time 10nSec Maximum (Measured at 0.4Vdc to 2.4Vdc w/TTL Load, 20% to 80% of waveform w/HCMOS Load)
Duty Cycle 50% ±10% (Measured at 1.4Vdc w/TTL Load, at 50% of waveform w/HCMOS Load)
Load Drive Capability 10TTL Load or 15pF HCMOS Load Maximum
Output Logic Type CMOS
Control Voltage None (No Connect on Pin 1)
Internal Trim ±3ppm Minimum (Top of Can)
Modulation Bandwidth 10kHz Minimum (Measured at -3dB with a Control Voltage of 2.5Vdc)
Input Impedance 10kOhms Typical
Phase Noise -70dBc at 10Hz Offset, -100dBc at 100Hz Offset, -130dBc at 1kHz Offset, -140dBc at 10kHz Offset, -
145dBc at 100kHz Offset
Storage Temperature Range -40°C to +85°C
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS
Fine Leak Test MIL-STD-883, Method 1014 Condition A (Internal Crystal Only)
Gross Leak Test MIL-STD-883, Method 1014 Condition C (Internal Crystal Only)
Lead Integrity MIL-STD-883, Method 2004
Mechanical Shock MIL-STD-202, Method 213 Condition C
Resistance to Soldering Heat MIL-STD-202, Method 210
Resistance to Solvents MIL-STD-202, Method 215
Solderability MIL-STD-883, Method 2003
Temperature Cycling MIL-STD-883, Method 1010
Vibration MIL-STD-883, Method 2007 Condition A
www.ecliptek.com | Specification Subject to Change Without Notice | Rev C 2/16/2010 | Page 1 of 5
EB51F3A15N-12.288M
MECHANICAL DIMENSIONS (all dimensions in millimeters)
Internal Trim Access
Hole Ø3.5 ±0.5
11.7
±0.5
18.3 ±0.5
4.8 ±0.3 5.0 ±1.0
1
2
34
4.0 ±0.3
1.2 +0/-0.5
Ø0.50
±0.05
(x4)
2.5 ±0.3 15.24 ±0.40
7.62
±0.30
4.0 ±0.3
MARKING
ORIENTATION
PIN CONNECTION
1 No Connect
2 Case Ground
3 Output
4 Supply Voltage
LINE MARKING
1ECLIPTEK
212.288M
3XXYZZ
XX=Ecliptek Manufacturing
Code
Y=Last Digit of the Year
ZZ=Week of the Year
OUTPUT WAVEFORM
VOH
VOL
80% or 2.4VDC
50% or 1.4VDC
20% or 0.4VDC
Fall
Time
Rise
Time TW
T
Duty Cycle (%) = TW/T x 100
CLOCK OUTPUT
www.ecliptek.com | Specification Subject to Change Without Notice | Rev C 2/16/2010 | Page 2 of 5
EB51F3A15N-12.288M
Supply
Voltage
(VDD)
Test Circuit for TTL Output
Output
No Connect
or Tri-State
Ground
+ +
+
+
_
_
__
Power
Supply Voltage
Meter
Current
Meter
0.01µF
(Note 1) 0.1µF
(Note 1) CL
(Note 3)
RL
(Note 4)
Power
Supply
Oscilloscope Frequency
Counter
Probe
(Note 2)
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and VDD pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value CL includes sum of all probe and fixture capacitance.
Note 4: Resistance value RL is shown in Table 1. See applicable specification sheet for 'Load Drive Capability'.
Note 5: All diodes are MMBD7000, MMBD914, or equivalent.
Table 1: RL Resistance Value and CL Capacitance
Value Vs. Output Load Drive Capability
Output Load
Drive Capability RL Value
(Ohms) CL Value
(pF)
10TTL
5TTL
2TTL
10LSTTL
1TTL
390
780
1100
2000
2200
15
15
6
15
3
www.ecliptek.com | Specification Subject to Change Without Notice | Rev C 2/16/2010 | Page 3 of 5
EB51F3A15N-12.288M
Supply
Voltage
(VDD)
Test Circuit for CMOS Output
Output
No Connect
or Tri-State
Ground
+ +
+_
__
Power
Supply 0.01µF
(Note 1) 0.1µF
(Note 1) CL
(Note 3)
Note 1: An external 0.1µF low frequency tantalum bypass capacitor in parallel with a 0.01µF high frequency
ceramic bypass capacitor close to the package ground and VDD pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth
(>300MHz) passive probe is recommended.
Note 3: Capacitance value CL includes sum of all probe and fixture capacitance.
Voltage
Meter
Current
Meter
Oscilloscope Frequency
Counter
Probe
(Note 2)
www.ecliptek.com | Specification Subject to Change Without Notice | Rev C 2/16/2010 | Page 4 of 5
T Min
S
T Max
S
Critical Zone
T to T
L P
Ramp-up Ramp-down
TL
TP
t 25°C to Peak
t Preheat
StL
tP
Temperature (T)
Time (t)
Recommended Solder Reflow Methods
EB51F3A15N-12.288M
Low Temperature Solder Bath (Wave Solder)
TS MAX to TL (Ramp-up Rate) 5°C/second Maximum
Preheat
- Temperature Minimum (TS MIN) N/A
- Temperature Typical (TS TYP) 150°C
- Temperature Maximum (TS MAX) N/A
- Time (tS MIN) 30 - 60 Seconds
Ramp-up Rate (TL to TP)5°C/second Maximum
Time Maintained Above:
- Temperature (TL)150°C
- Time (tL)200 Seconds Maximum
Peak Temperature (TP)245°C Maximum
Target Peak Temperature (TP Target) 245°C Maximum 1 Time / 235°C Maximum 2 Times
Time within 5°C of actual peak (tp)5 seconds Maximum 1 Time / 15 seconds Maximum 2 Times
Ramp-down Rate 5°C/second Maximum
Time 25°C to Peak Temperature (t) N/A
Moisture Sensitivity Level Level 1
Low Temperature Manual Soldering
185°C Maximum for 10 seconds Maximum, 2 times Maximum.
High Temperature Manual Soldering
260°C Maximum for 5 seconds Maximum, 2 times Maximum.
Low Temperature Solder Bath (Wave Solder) Note 1
Device is non-hermetic; Post reflow aqueous wash is not recommended
Low Temperature Solder Bath (Wave Solder) Note 2
Temperatures shown are applied to back of PCB board and device leads only.
www.ecliptek.com | Specification Subject to Change Without Notice | Rev C 2/16/2010 | Page 5 of 5
